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2025-01-30Update README.md (#9959)qilian
Fixed the issue where the absence of the u-boot-tools package caused rttpkgtools to fail to compile normally.
2025-01-29bsp: cvitek: c906_littel: fixed build warnings for board.cChen Wang
When building bsp/cvitek/c906_little, compiler warns: ``` board/board.c: In function 'rt_hw_board_init': board/board.c:26:5: warning: implicit declaration of function 'rt_hw_tick_init'; did you mean 'rt_hw_stack_init'? [-Wimplicit-function-declaration] 26 | rt_hw_tick_init(); | ^~~~~~~~~~~~~~~ | rt_hw_stack_init board/board.c:29:5: warning: implicit declaration of function 'rt_hw_uart_init'; did you mean 'rt_hw_board_init'? [-Wimplicit-function-declaration] 29 | rt_hw_uart_init(); | ^~~~~~~~~~~~~~~ | rt_hw_board_init ``` To remove these build warnings, include header files which declare these functions. Plus, remove the decalartion of `tick_isr()`, this function does not exist. Signed-off-by: Chen Wang <[email protected]>
2025-01-29[bsp][doc]use the default mpu conf of cubemxkaidegit
2025-01-29[bsp][doc] add PeriphCommonClock_Config and MPU_Configyekai
2025-01-26bsp: cvitek: removed useless files after using rttpkgtoolChen Wang
Based on the patch "bsp: cvitek: use rttpkgtool to replace cvitek_bootloader", continue cleanup useless files. Signed-off-by: Chen Wang <[email protected]>
2025-01-26bsp: cvitek: use rttpkgtool to replace cvitek_bootloaderChen Wang
Originally, for riscv big and little cores under bsp/cvitek, after generating rtthread.bin, the cvitek_bootloader tool would be used to package it and generate fip.bin and boot.sd files that can be burned into sdcard. However, the cvitek_bootloader tool repository is relatively large, and it compiles and generates firmware such as fsbl, opensbi and uboot from the source code level. And when using it, it needs to be downloaded to the bsp/cvitek directory, which will introduce pollution to source files in the RTT repository under the original working path. The new solution uses rttpkgtool, which is similar to cvitek_bootloader, but it uses prebuilt firmware, so it is very small and does not introduce pollution to the source file. Signed-off-by: Chen Wang <[email protected]>
2025-01-24[bsp][nrf5x]added the cherryusb adapter for nrf52840 (#9939)hydevcode
2025-01-23Revert "[action] add cvitek/c906_little ci" (#9945)Chen Wang
Revert "[action] add cvitek/c906_little ci (#9901)" This reverts commit 969e0e01ef603d3929a186e8bd03f3657ec8227c.
2025-01-23[action] add cvitek/c906_little ci (#9901)Supper Thomas
* [action] add cvitek/c906_little ci * Update bsp_buildings.yml * Update rtconfig.py
2025-01-23[bsp/stm32f407-rt-spark/stm32l496zg-st-nucleo] add cherryusb support (#9929)Supper Thomas
[bsp/stm32f407-rt-spark/l496zg] add cherryusb support
2025-01-21Add pm driver for F472 and add lVD unlock in board_initJamie
2025-01-20[bsp][cvitek] fix c906_little build warning in cache.cimcu
build warning: passing argument 1 of 'inv_icache_range' makes integer from pointer without a cast [-Wint-conversion] Analyze: The passed parameter type is void*, which is a pointer type, but the required type is uintptr_t, which is an integer type. Therefore, there will be a 'makes integer from pointer without a cast' warning. Solution: casting the void* pointer to uintptr_t, ensure that the function receives the correct type. Signed-off-by: zdtyuiop4444 <[email protected]>
2025-01-19[BSP] add some bsp drivers for F448, F472 and add bsp test codesJamie
2025-01-18bsp: cvitek: optimze build operations for aarch64Chen Wang
For bsp/cvitek, duo256m, the operation process is slightly different when building images for riscv and arm64. To improve the user experience, unify the building process and steps of the two as follows: - Enter c906_little and execute `scons` - Enter cv18xx_riscv/cv18xx_aarch64 and execute `scons` That's all. Finally, we can get `fip.bin` and `boot.sd` under `bsp/cvitek/output/milkv-duo256m`. Update the README.md accordingly. Signed-off-by: Chen Wang <[email protected]>
2025-01-17[bsp/stm32] change the attach file of stm32f407-rt-spark to yml (#9926)hydevcode
2025-01-16bsp/cvitek: print arch info. during boot-up (#9919)Chen Wang
Duo's CPU combination is more complicated: | BSP | B/L core| ISA | UART | | ------------- | ------- |---------------- |-------| | cv18xx_risc-v | Big | RISC-V C906 | UART0 | | c906-little | Littel | RISC-V C906 | UART1 | | cv18xx_aarch64| Big | ARM Cortex A53 | UART0 | Printing ISA and big and small core information during the boot process helps developers/testers determine the CPU and serial port corresponding to the current console. In addition, the RTT logo printing has already distinguished whether it is smart, so the bsp printing no longer distinguishes. Updated README to sync with this change. Signed-off-by: Chen Wang <[email protected]>
2025-01-16[bsp][cvitek] add cache opration functions for cache coherenceimcu
By default, the small core enables D-Cache without ensuring cache coherence. Therefore, when using shared memory, inconsistencies can occur in the data read by the small core and the big core. Solution: Migrate cache-related functions from the official duo-buildroot-sdk library to implement cache-related operations in rthw.h. This allows you to either disable D-Cache or call the flush_dcache_range function before reading and after writing for synchronization. It is recommended to use the flush_dcache_range function, as disabling D-Cache can have a significant performance impact. Signed-off-by: zdtyuiop4444 <[email protected]>
2025-01-16bsp: cvitek: fix bug in setting PLIC_PRIORITY[n]kenneth.liu
description: In the bsp/cvitek/c906_little/board/interrupt.c, There is an issue with setting the PLIC_PRIORITY[n]. analysis: PLIC_PRIORITY[n] each register corresponds to the priority of a hardware interrupt number. Solution: Each register is 4 bytes. Multiply the total number of IRQs by 4 instead of dividing by 4. Signed-off-by: Liu Gui <[email protected]>
2025-01-15fix GPIO and SCI drivers for RZ series (#9908)DingDing
fix gpio and sci drivers for RZ series
2025-01-12[ht32][drv]新增了CAN、USB和SDIO的驱动文件QTbin
2025-01-10bsp: qemu-virt64-riscv: remove config RISCV_S_MODEChen Wang
RISCV_S_MODE configuration only affects the code in libcpu/risc-v/virt64, and the only bsp using this libcpu is qemu-virt64-riscv. Considering s-mode is the default mode RT-Thread running on virt64 machine, it seems unnecessary to make RISCV_S_MODE a Kconfig option. Solution: Remove RISCV_S_MODE from Kconfig and define it as a macro in the code in libcpu/risc-v/virt64. Plus, due to this macro is only related to virt64, rename RISCV_S_MODE to RISCV_VIRT64_S_MODE. Update the .config/rtconfig.h in this patch. Signed-off-by: Chen Wang <[email protected]>
2025-01-08[drivers] merge the software i2c driverkurisaw
2025-01-08[bsp][qemu-virt64-riscv]修正内存大小超限制的问题heyuanjie87
2025-01-08bsp: cvitek: remove support for spinor/spinandChen Wang
Confirmed with milkv, only the sd card version is sold by default for duo in the market. The spi pins are provided through stamp holes, so that users can solder the corresponding components on their baseboard during secondary development. In order to simplify maintenance work, the mainline will only support the sd-card version and no longer support spinor/spinand. Updated config files the same in this patch. Signed-off-by: Chen Wang <[email protected]>
2025-01-08[bsp][hpmicro] fix the alignement check logic and the cache-maintenance logicFan YANG
- corrected the alignement check logic - optimized the cache maintenance logic Signed-off-by: Fan YANG <[email protected]>
2025-01-04Fix: [CAN][STM32] GCC compile errorsGibby
error: a label can only be part of a statement and a declaration is not a statement 459 | rt_uint32_t errtype;
2025-01-01[bsp][stm32l496zg] add onchip configSupper Thomas
2025-01-01bsp: cvitek: remove RT_USING_VIRTIO for arm64Chen Wang
duo is a real hardware, no need for virtio. Disable RT_USING_VIRTIO and update configuration to latest. Signed-off-by: Chen Wang <[email protected]>
2024-12-30bsp: cvitek: update README for cv18xx_aarch64Chen Wang
Re-write README.md for aarch64. Signed-off-by: Chen Wang <[email protected]>
2024-12-30bsp: cvitek: update combine.sh for arm64Chen Wang
Move the combine.sh to under cv18xx_aarch64, so we can run this script the same as scons and no need to change cwd. Rename the folder boot to prebuild just becuase all the files under boot are prebuild binaries. Move the prebuilt fip.bin to under prebuild/milkv-duo256m because it's only for 256. Update combine.sh accordingly and output fip.bin to the output folder where we create fip.bin/boot.sd as other bsp. Signed-off-by: Chen Wang <[email protected]>
2024-12-30bsp: cvitek: use ioremap for arm64 coreChen Wang
For ARM, RT-smart and RT-standard both enable mmc (see rt_hw_board_init() in bsp/cvitek/cv18xx_aarch64/board/board.c, rt_hw_mmu_setup is called both for smart or standard). So ioremap is must to do for ARM. Signed-off-by: Chen Wang <[email protected]>
2024-12-26bsp: cvitek: doc updateChen Wang
Updated README for cvitek. Signed-off-by: Chen Wang <[email protected]>
2024-12-25Update Kconfig下里巴人
2024-12-25Update Kconfig file format下里巴人
2024-12-25[bsp][nxp][mcxa153] the full implementation of eFlexPWMhywing
2024-12-25bsp: qemu-virt64-riscv: Kconfig: remove duplicated RT_USING_VIRTIOChen Wang
There is problem in the Kconfig of qemu-virt64-riscv. RT_USING_VIRTIO is already defined in components/drivers/virtio/Kconfig, so it should not be defined again in the BSP kconfig. The solution is to rename RT_USING_VIRTIO to BSP_USING_VIRTIO. Also, refer to the configuration method for virtio device drivers in bsp/qemu-virt64-aarch64/drivers/Kconfig to rewrite the configuration of BSP_USING_VIRTIO_xxx. Updated default .config/rtconfig.h at the same time. Signed-off-by: Chen Wang <[email protected]>
2024-12-22[utest][klibc] add rt_sprintf family functions test casesMeco Man
2024-12-21[bsp/hc32]hc32f460 doesn't support CAN-FD, hc32_ll_can.h has no some ↵Lin-Chengqiu
definations.
2024-12-21[hc32]hc32f460 has only one CAN, and it is defined as CM_CAN in hc32f460.hLin-Chengqiu
2024-12-21[opt][SDIO_MAX_FREQ redundant define del]Gaogao
2024-12-20kernel: cleanup debug APIsChen Wang
- `dbg_log` is a “NOT RECOMMENDED API”, convert the calling of this API to LOG_x and remove this API. - `dbg_here`/`dbg_enter`/`dbg_exit`: no one use these APIs, remove them directly. Signed-off-by: Chen Wang <[email protected]>
2024-12-19bsp: cvitek: remove GPL license declarationChen Wang
GPL is conflict with Apache, which is used by RTT. See <https://www.apache.org/licenses/GPL-compatibility.html> Also clean up and remove some words such "LINUX". Signed-off-by: Chen Wang <[email protected]>
2024-12-18bsp: qemu-virt64-riscv: update README for booting with rootfsChen Wang
Now lwext4 is ready, and qemu-virt64-riscv smart can boot with rootfs. Updated README to introduce this. This patch also replace qemu-nographic.sh with run.sh, which has a more simple name and more robust to launch rootfs image binary. TBD: qemu-nographic.bat is not touched, hope some guys from Windows can give a hand. Signed-off-by: Chen Wang <[email protected]>
2024-12-18bsp: cvitek: update README for ext4 rootfs (#9785)Chen Wang
Now lwext4 package has supported ext4. Add description in README to introduce how to create rootfs of type ext4. Signed-off-by: Chen Wang <[email protected]>
2024-12-13[bsp][stm32] hardware i2c driver add support for STM32F1 serieszzk597
2024-12-13[BSP/FIXUP] Update init function export for driversGuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2024-12-13[BSP/FIXUP] remove old reset drivers for RK3500GuEe-GUI
Signed-off-by: GuEe-GUI <[email protected]>
2024-12-12[bsp][ch32] fix menuconfig error for risc-vTeng mengchen
2024-12-09[bsp][wch/arm][ch32] 1.fix iwdt driver is not reload counter to register;Chasel
2024-12-09[bsp][ESP32C3] support soft i2c and rt_hw_us_delaywumingzi