| Age | Commit message (Collapse) | Author |
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It does not satisfy AAPCS.
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The code is GPLv2 so I think we could use it for free(both free beer and
free speech).
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We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:
1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
channel 5 in enabled and connected to IRQ.
2, RTI driver is enabled and compare3 source is selected to counter1
and the compare3 will generate tick in the period of 10ms. This
value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.
In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
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printf("%s") will print a NULL terminated string, while rt_serial_write
should print buffer for size length. This also fix segfault when the
string is not null terminated but specified by size.
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pbuf_alloc failed.
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the large amount of data communication.
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update bsp/lpc178x/CMSIS/CM3/DeviceSupport/NXP/LPC177x_8x/startup/gcc/st...
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add powerpc bsp to travis-ci
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bsp/lpc178x/CMSIS/CM3/DeviceSupport/NXP/LPC177x_8x/startup/gcc/startup_LPC177x_8x.s
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Modify the interrupt interface implementations and changes some parameters definition
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Tested OK in RTGUI repo.
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parameter definition.
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version will be built with vs2010 in win7 64bit
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