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_dac_control() checked the enabled callback before invoking disabled for RT_DAC_CMD_DISABLE. That can reject DAC drivers that provide a disable callback without enable, and can call through a NULL disabled callback when only enable is implemented.
Check the disabled callback in the disable command path so the guard matches the operation being dispatched.
Generated-by: OpenAI Codex
Signed-off-by: Old-Ding <[email protected]>
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* feat[ADC V2]: add ADC V2 driver support
add ADC V2 core APIs, session state management, and sequence read support
add STM32 ADC V2 HAL backend with internal-channel and VREF handling
add per-series STM32 ADC V2 default configuration headers
wire ADC V2 Kconfig and SConscript integration for components and STM32 BSP drivers
keep ADC V2 mutually exclusive with the legacy ADC driver path
* feat[ADC V2]: add ADC V2 MSH special channel read support
add generic ADC V2 MSH commands for probing, configuring, raw reads, voltage reads, and sequence reads
add STM32 ADC V2 backend special commands for VREFINT, temperature sensor, and VBAT reads
add STM32 helper APIs for special logical channels, sampling time, resolution, and temperature calculation
wire ADC V2 MSH sources through Kconfig and SConscript
* feat[ADC V2]: add ADC V2 stream DMA support
add ADC V2 stream APIs with latest-frame and FIFO buffering policies
wire STM32 ADC V2 to circular DMA stream mode with per-instance Kconfig options
extend STM32 ADC config headers and DMA helpers for stream DMA configuration
add FinSH stream commands for start, read, cancel, and stop operations
handle Cortex-M7 cache-safe DMA buffers for STM32 stream sampling
* feat[ADC V2]: add timer trigger support for ADC V2 streams
add ADC V2 trigger configuration, validation, and lifecycle coordination
add timer update trigger support through clock timer TRGO controls
map STM32 ADC V2 timer update triggers to HAL external trigger selector fields
add Kconfig, SConscript, and MSH entries for ADC trigger setup and inspection
* feat[ADCV2]: add timer and comparator trigger selectors
add ADC V2 timer compare and analog comparator trigger configuration support
extend clock timer trigger config with compare event and channel fields
wire STM32 ADC external trigger selector mappings for TIM update, TIM compare, and COMP output
add FinSH trigger_set commands and Kconfig switches for timer and comparator trigger backends
* fix[ADC V2]: resolve ADC V1 compatibility Kconfig loop
* ci[ADC V2][stm32]: add ADC v2 peripheral config for stm32f407-rt-spark BSP
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* [DM][MISC] Make Kconfig(ADC/PWM) import for DM
* [Driver][MISC][ADC] Fixup ADC
1. Fixup error no.
2. Fixup type of control for args.
3. Fixup value no init.
* [Driver][MISC][PWM] Enable `rt_pwm_get` API
Signed-off-by: GuEe-GUI <[email protected]>
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[cpp_check.py 80 INFO] components/drivers/misc/adc.c:76:12:
error: Uninitialized variable: result [legacyUninitvar]
return result;
^
Signed-off-by: Chen Wang <[email protected]>
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gcc build warnings:
cast from pointer to integer of different size [-Wpointer-to-int-cast]
For rt_adc_ops.enabled, the type of second param is rt_int8_t,
original _adc_control also called with wrong type casting.
Convert first to rt_base_t, then cast to rt_int8_t to remove the
build warnings.
Signed-off-by: Chen Wang <[email protected]>
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整理 components/drivers 的 Kconfig
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The variable result_str is never used after this assignment.
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* [DFS] prepare for dfs_v2. dfs_fd -> dfs_file; dfs_fnode -> dfs_vnode.
* [BSP] fix code analysis warning
* [smart] fix the pointer overflow.
* code format
* [smart] fix the lwp->lwp_obj checking.
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rt_ssize_t can give negative error code, which follows the unix style correctly
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* Synchronize the code of the rt mart branch to the master branch.
* TTY device
* Add lwP code from rt-smart
* Add vnode in DFS, but DFS will be re-write for rt-smart
* There are three libcpu for rt-smart:
* arm/cortex-a, arm/aarch64
* riscv64
Co-authored-by: Rbb666 <[email protected]>
Co-authored-by: zhkag <[email protected]>
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1. 在c28x文件目录上一层再套一层文件夹ti,目前28379的项目路径为rt-thread\bsp\ti\c28x\tms320f28379d
2. 新增adc驱动与kconfig配置
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增加c28x芯片的pwm驱动
已经在TMS320F28379中通过测试
pwm设备框架增加如下方法:
#define PWM_CMD_SET_DEAD_TIME (RT_DEVICE_CTRL_BASE(PWM) + 8)
#define PWM_CMD_SET_PHASE (RT_DEVICE_CTRL_BASE(PWM) + 9)
#define PWM_CMD_ENABLE_IRQ (RT_DEVICE_CTRL_BASE(PWM) + 10)
#define PWM_CMD_DISABLE_IRQ (RT_DEVICE_CTRL_BASE(PWM) + 11)
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* [pwm]Improve the code
* 将与bsp无关的代码移植到框架部分
* 添加注释
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* Fix the bug of complementary output
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module is enabled,which may cause the compilation failure.
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* [rt_drv_pwm]增加API:增加单独设置PWM频率和脉宽的函数
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* 1. 在AT32的BSP的drv_gpio中增加了at32_pin_get函数,用于实现rt_pin_ops对象中的pin_get
2. 在MSH中增加了PIN的操作命令
3. 为了方便在MSH命令中解析字符串,增加了一些字符串相关的函数
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* add adc_get_vref
add stm32_adc_get_vref
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* Update adc.c
add finsh voltage conversion command
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* add finsh pwm function
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设备框架以及驱动错误码处理逻辑存在问题 (#5901)
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Co-authored-by: Wayne Lin <[email protected]>
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* first commit, keil test pass
* feat : n32g452xx direct structure base at32
1. 重新整理目录结构
* feat : 基于AT32,将各驱动移植整改待验证
1. 部分驱动已经整改,但未验证
2. 根据AT32整改目录结构
* feat : add README document
1. 完善配置文件
2. 添加说明文档
* feat : 验证添加的驱动
1. UART 1-3 验证通过
2. ADC 1-2 CH 6-9 验证通过
3. TIM 6-7 验证通过
* feat : complete readme document
* feat : format code
1. ref https://github.com/mysterywolf/formatting
* feat : 完成PWM驱动移植与自测
1. 添加PWM测试代码
2. 修正PWM驱动周期与脉冲错误问题
* feat : 删除多余代码与多余的文件,修正注释与函数命名
* feat : fix tim channel comment
* feat : 完成DEMO测试例子
1. 完成MAIN函数中的LED测试例子
2. 完善README文档
3. 更新添加许可文件
* feat : 根据BSP提交自查完善固件
1. 添加.ignore_format.yml文件
2. 修正main.c的注释
* feat : add last line in .ignore_format.yml
* feat : delet file_path in .ignore_format.yml
* fix: gPIO/ADC driver
1. add ADC temperature&vref channel.
2.add GPIO IPD/OD configration
* fix: 解决告警
1. 解决告警(rt_drv_pwm.c: warning: implicit declaration of function 'atoi')
* feat: add scons --dist function
* fix: 解决MDK5无法编译问题
* perf: delete invalid code
Co-authored-by: linyuanbo_breo_server <[email protected]>
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