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(cherry picked from commit 280bcfeec362f2164140606860b22026e5031c3d)
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- reorganize common Raspberry Pi drivers under the device framework
- add the Raspberry Pi 5 BSP, configuration and documentation
- add BCM2712 and DesignWare AXI DMA controller support
- distinguish BCM2712 DMA32 and DMA40 channels by channel mask
- restore DesignWare AXI DMA enable bits after controller reset
- support a shared AXI maximum burst length across DMA channels
Signed-off-by: GuEe-GUI <[email protected]>
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* [DM/OFW][PCI] Fix address translation and PCI resource enumeration
Rework OFW address translation to walk nested bus ranges in the correct
direction and cache "ranges" and "dma-ranges" independently. Handle PCI
three-cell addresses without treating the PCI flags cell as part of the
address, and fix CPU-to-DMA and DMA-to-CPU translation across nested
buses.
Fix PCI BAR sizing and assignment by disabling address decoding during
probing, preserving BAR attribute bits, and programming 64-bit BARs
correctly. Add device enable and disable helpers so resources and bus
mastering are enabled before driver probe.
Program bridge memory and prefetch windows while scanning downstream
buses, correctly link child buses into the PCI bus hierarchy, and avoid
unnecessary PCIe link retraining when the link is already active.
Allow host bridges without a device-tree pci-domain property by
allocating unique domains dynamically, while preserving explicit domain
assignments.
Fix MSI and MSI-X IRQ setup, rollback, vector addressing, and affinity
selection.
Add the Raspberry Pi PCI vendor ID for RP1 and other downstream devices.
Signed-off-by: GuEe-GUI <[email protected]>
* style: format code with clang-format
* style: format complete changed files with clang-format
* drivers: pci: address OFW review feedback
* style: format PCI and OFW changes for current master
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Signed-off-by: GuEe-GUI <[email protected]>
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* [dm][dma] update DMA interface
Extend DMA mapping to honor OFW dma-ranges even
when no reserved memory pool is present,
and add PCI host-bridge DMA-region translation for PCI devices.
Prefer 32-bit-addressable allocations for translated devices,
improve pool allocation fallbacks and synchronization,
and establish a linear mapping for installed DMA pools when possible.
Signed-off-by: GuEe-GUI <[email protected]>
* [dm][dma] fixup PL330 work flow
Fix PL330 channel allocation so device-tree cells
select peripheral request lines rather than execution channels.
Generate proper peripheral DMA microcode using DMAWFP, DMALDP, DMASTP, and DMAFLUSHP,
encode burst lengths correctly,
honor transfer direction and non-secure attributes,
and allocate microcode from DMA-coherent memory.
Signed-off-by: GuEe-GUI <[email protected]>
* style: format code with clang-format
* style: format complete changed files with clang-format
* drivers: dma: fix diagnostic format types
* style: format DMA changes for current master
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Signed-off-by: GuEe-GUI <[email protected]>
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* [DM/Input] Add ADC joystick, keyboard, and touchscreen drivers
Add polling input drivers for ADC-connected joysticks and resistor-
ladder keys. Parse Linux-compatible device-tree bindings, acquire ADC
channels through the IIO framework, and report absolute-axis and key
events.
Add an SPI touchscreen driver for ADS7843, ADS7845, ADS7846, ADS7873,
TSC2046, and XPT2046-compatible controllers. Support pen interrupts,
coordinate and pressure reporting, sample filtering, regulator control,
power management, and common touchscreen properties.
Add an I2C touchscreen driver for Goodix GT9xx controllers with
multi-touch reporting, GPIO-based reset and address selection, interrupt
handling with polling fallback, regulator control, panel configuration,
and alternate-address recovery.
Adapt the drivers to the RT-Thread device model and input framework,
following the corresponding Linux input drivers and device-tree
bindings.
Signed-off-by: GuEe-GUI <[email protected]>
* style: format code with clang-format
* drivers: input: address review feedback
* style: format input changes for current master
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Signed-off-by: GuEe-GUI <[email protected]>
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Add the ARM NVIC PIC driver, no-MMU I/O mapping, built-in FDT support, and Cortex-M CPU hooks required by the native RT-Thread device model.
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* [dm][clk] fixup the work flow of CLK
Add RT_CLK_F_SET_RATE_NO_REPARENT so clock providers can preserv
the currently selected parent during rate changes.
Round and re-read the effective clock rate after parent handling,
skip redundant gate toggles and hardware programming when
the target is already active, and fix error handling for parent-clock allocation failures.
Signed-off-by: GuEe-GUI <[email protected]>
* style: format code with clang-format
* style: format complete changed files with clang-format
---------
Signed-off-by: GuEe-GUI <[email protected]>
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* [dm][phye] Add Mode/State and MIPI D-PHY timing helper
Extend the generic PHY framework with cached mode and submode state,
avoiding redundant hardware mode changes.
Add MIPI D-PHY default timing calculation helpers based on
pixel clock or lane high-speed clock, and expose the new API through rtdevice.h.
Signed-off-by: GuEe-GUI <[email protected]>
* style: format code with clang-format
* style: format complete changed files with clang-format
---------
Signed-off-by: GuEe-GUI <[email protected]>
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* [dm][regulator] update regulator
Replace the regulator framework spinlock with a mutex
because regulator operations may sleep.
Move always-on policy into the regulator core,
keep an initial enable reference for always-on supplies,
prevent the last disable from turning them off,
and let fixed/GPIO providers report and control their actual hardware state.
Signed-off-by: GuEe-GUI <[email protected]>
* [dm][regulator] add PWM regulator support
Signed-off-by: GuEe-GUI <[email protected]>
* style: format code with clang-format
* style: format complete changed files with clang-format
---------
Signed-off-by: GuEe-GUI <[email protected]>
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* [dm][block] add 4K support for EFI partion
Signed-off-by: GuEe-GUI <[email protected]>
* [dm][ufs] fixup the linkup flow
Signed-off-by: GuEe-GUI <[email protected]>
* style: format code with clang-format
* style: format complete changed files with clang-format
* drivers: address UFS review feedback
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Signed-off-by: GuEe-GUI <[email protected]>
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1. Add FB_ACTIVATE_* cmd
2. Fixup the vsync
3. Update the graphic test
Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
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1. Fixup the cooling control flow.
2. Replace the spinlock to mutex.
3. Fixup the PWM args for PWM-FAN.
4. Add GPIO-FAN
Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
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They support PTP, too.
Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
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rt_data_queue_pop() holds the data queue spinlock while updating the ring
state, then calls rt_data_queue_len(). The length function tries to acquire
the same non-recursive spinlock again, causing an SMP deadlock when a pop
leaves the queue non-empty.
Add a private _data_queue_len_nolock() helper for callers which already hold
the queue lock. Keep the public rt_data_queue_len() protected by one spinlock
acquisition.
This does not change the public API, ABI, queue state transitions, low-water
mark wakeups, or event callback behavior.
Tested on a four-core Spacemit K1 with cyclic HDMI playback and by building the
SMP QEMU Virt64 RISC-V BSP with generic audio, Intel HDA and VirtIO Sound.
Signed-off-by: GuEe-GUI <[email protected]>
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Add rt_bus_probe_device() to retry driver matching for a registered
but unbound device. Use it when an OFW-created platform device
is requested again, while preserving native-bus ownership
for I2C, SPI, and other non-platform devices.
Also instantiate eligible child platform devices after a parent node is registered.
Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
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Application traffic should be bound via a higher layer later.
And debug.
Signed-off-by: GuEe-GUI <[email protected]>
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Link: https://github.com/RT-Thread/rt-thread/issues/11604
Signed-off-by: GuEe-GUI <[email protected]>
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rt_pci_ep_set_msi() checked the set_msix callback before calling set_msi. That rejects endpoint controllers that implement MSI without MSI-X, and can call through a NULL set_msi pointer when only MSI-X is provided.
The same helper converts a requested MSI vector count into the log2 field passed to the controller. Stop after the first value large enough for the request so smaller requests are not widened by later loop iterations.
Generated-by: OpenAI Codex
Signed-off-by: Old-Ding <[email protected]>
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rt_pic_linear_irq() stores irq_nr as a count and assigns pic->pirqs to the first entry in that range. rt_pic_find_pirq() therefore must treat the upper bound as exclusive.
The inclusive check could return pic->pirqs[irq_nr] when irq equals irq_start + irq_nr, which is one entry past the allocated range.
Generated-by: OpenAI Codex
Signed-off-by: Old-Ding <[email protected]>
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Valid slew_rates indices are 0 through RT_ARRAY_SIZE(slew_rates) - 1.
The current check rejects only values greater than the table size,
allowing slew_idx == RT_ARRAY_SIZE(slew_rates) to index one element
past the table.
Generated-by: OpenAI Codex
Signed-off-by: Old-Ding <[email protected]>
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_dac_control() checked the enabled callback before invoking disabled for RT_DAC_CMD_DISABLE. That can reject DAC drivers that provide a disable callback without enable, and can call through a NULL disabled callback when only enable is implemented.
Check the disabled callback in the disable command path so the guard matches the operation being dispatched.
Generated-by: OpenAI Codex
Signed-off-by: Old-Ding <[email protected]>
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* feat[ADC V2]: add ADC V2 driver support
add ADC V2 core APIs, session state management, and sequence read support
add STM32 ADC V2 HAL backend with internal-channel and VREF handling
add per-series STM32 ADC V2 default configuration headers
wire ADC V2 Kconfig and SConscript integration for components and STM32 BSP drivers
keep ADC V2 mutually exclusive with the legacy ADC driver path
* feat[ADC V2]: add ADC V2 MSH special channel read support
add generic ADC V2 MSH commands for probing, configuring, raw reads, voltage reads, and sequence reads
add STM32 ADC V2 backend special commands for VREFINT, temperature sensor, and VBAT reads
add STM32 helper APIs for special logical channels, sampling time, resolution, and temperature calculation
wire ADC V2 MSH sources through Kconfig and SConscript
* feat[ADC V2]: add ADC V2 stream DMA support
add ADC V2 stream APIs with latest-frame and FIFO buffering policies
wire STM32 ADC V2 to circular DMA stream mode with per-instance Kconfig options
extend STM32 ADC config headers and DMA helpers for stream DMA configuration
add FinSH stream commands for start, read, cancel, and stop operations
handle Cortex-M7 cache-safe DMA buffers for STM32 stream sampling
* feat[ADC V2]: add timer trigger support for ADC V2 streams
add ADC V2 trigger configuration, validation, and lifecycle coordination
add timer update trigger support through clock timer TRGO controls
map STM32 ADC V2 timer update triggers to HAL external trigger selector fields
add Kconfig, SConscript, and MSH entries for ADC trigger setup and inspection
* feat[ADCV2]: add timer and comparator trigger selectors
add ADC V2 timer compare and analog comparator trigger configuration support
extend clock timer trigger config with compare event and channel fields
wire STM32 ADC external trigger selector mappings for TIM update, TIM compare, and COMP output
add FinSH trigger_set commands and Kconfig switches for timer and comparator trigger backends
* fix[ADC V2]: resolve ADC V1 compatibility Kconfig loop
* ci[ADC V2][stm32]: add ADC v2 peripheral config for stm32f407-rt-spark BSP
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Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
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add serial v2 RX DMA event mode configuration for DMA-enabled builds
support STM32 UART RX DMA half/full transfer interrupt policy selection
validate RX DMA event mode before applying serial configuration
restore serial configuration when backend configure fails
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