| Age | Commit message (Collapse) | Author |
|---|
|
|
|
memory access
|
|
for vDSO building.
|
|
|
|
- Implemented vDSO functionality for the RISC-V architecture, including the necessary source files and linker scripts.
- Introduced a new `vdso_sys.c` file for RISC-V, containing functions to handle time retrieval using the vDSO mechanism.
- Created architecture-specific linker scripts (`vdso.lds.S`) for both AArch64 and RISC-V.
- Updated the build system to support vDSO compilation for RISC-V, including necessary adjustments in `SConstruct` files.
- Refactored existing vDSO code to improve compatibility and maintainability across architectures.
- Adjusted the maximum number of PTY devices in the terminal configuration from 64 to 32 for better resource management.
- Fixed minor issues in existing code, including correcting the path for the vDSO shared library and ensuring proper function definitions.
|
|
* [lwp/riscv]修正用户态参数空间占用堆空间的问题
|
|
- `dbg_log` is a “NOT RECOMMENDED API”, convert the calling of this
API to LOG_x and remove this API.
- `dbg_here`/`dbg_enter`/`dbg_exit`: no one use these APIs, remove
them directly.
Signed-off-by: Chen Wang <[email protected]>
|
|
This patch optimizes the user-space context handling in the ARM64
architecture, specifically improving how the context is saved and
restored during system calls and interrupts. The changes make the
code more efficient and easier to maintain, while ensuring proper
preservation of user context during system transitions.
Changes:
- Introduced a parameter for context saving to improve flexibility.
- Replaced hardcoded stack pointer operations with frame-relative
references for better readability and code reuse.
- Simplified context restoration, removing redundant operations like
loading/storing floating-point registers.
Signed-off-by: Shell <[email protected]>
|
|
This patch focuses on the ARM64 general context handling code.
The modifications are aimed at enhancing performance by simplifying
context save/restore operations.
Changes include:
- Adjusted stack alignment in `arch_set_thread_context` function.
- Updated `lwp_gcc.S` to reset frame pointer and link register.
- Refined `rt_hw_backtrace_frame_unwind` to handle user space address checks.
- Added `GET_THREAD_SELF` macro in `asm-generic.h`.
- Simplified context saving/restoring in `context_gcc.h` and related files.
- Optimized `rt_hw_context_switch_interrupt` and related assembly routines.
Signed-off-by: Shell <[email protected]>
|
|
Add VDSO functionality under the aarch64 architecture
|
|
* [dfs] fixup compiler warning
Signed-off-by: Shell <[email protected]>
* [format] libcpu/arm64: separate context switching codes
Signed-off-by: Shell <[email protected]>
* [format] libcpu/arm64: separate vector
Signed-off-by: Shell <[email protected]>
* [format] libcpu/arm64: separate context_gcc.S
Signed-off-by: Shell <[email protected]>
* [format] libcpu/arm64: moving headers to include directory
Signed-off-by: Shell <[email protected]>
* style: replace tab with space
---------
Signed-off-by: Shell <[email protected]>
|
|
|
|
* [rv/virt/stackframe.h]添加GP寄存器保存偏移量宏
* 【rv/c906/stackframe.h]定义GP寄存器存储偏移量
* [rv]信号处理切换到用户态前恢复gp
|
|
* [libcpu] support for ARCH_REMAP_KERNEL
These changes introduce support for the ARCH_REMAP_KERNEL configuration,
which isolates kernel space in high virtual address regions. This feature
is necessary to enhance memory protection and management by segregating
user and kernel spaces more effectively.
Changes:
- Updated conditional macros to check for ARCH_REMAP_KERNEL instead of
ARCH_KERNEL_IN_HIGH_VA in board initialization files to reflect the new
configuration option.
- Modified qemu-virt64-riscv Kconfig and SConstruct files to include and
utilize ARCH_REMAP_KERNEL.
- Created a new linker script `link_smart.lds` for smart linking in qemu-virt64-riscv.
- Updated rtconfig.py to use a more flexible execution path setup.
- Enhanced user address space definitions in `lwp_arch.h` to support the
new virtual address mappings.
- Adjusted kernel memory initialization and mapping logic in `c906/mmu.c`
and `virt64/mmu.c` to account for high virtual address regions.
- Added Kconfig option to enable ARCH_REMAP_KERNEL for RISCV64 architectures.
- Enhanced memory setup functions to support new mapping scheme, including
updates to early page table setup and address relocation logic.
These modifications ensure that the system can utilize high memory
addresses for the kernel, improving memory isolation and system stability.
Signed-off-by: Shell <[email protected]>
* fixup: CI run failed
* bsp: default config without using smart
* fixup: static checks
* restore rt_hw_mmu_kernel_map_init for D1
---------
Signed-off-by: Shell <[email protected]>
|
|
|
|
Signed-off-by: Shell <[email protected]>
|
|
* [libcpu] rv64: discard rt_current_thread
* arm: using rt_thread_self to fetch current TCB
|
|
* [smart] fixup arm64 aspace switch
Signed-off-by: Shell <[email protected]>
* fixup: arm add arch_kernel_mmu_table_get
---------
Signed-off-by: Shell <[email protected]>
|
|
Signed-off-by: xqyjlj <[email protected]>
Signed-off-by: Shell <[email protected]>
Co-authored-by: xqyjlj <[email protected]>
|
|
Signed-off-by: Shell <[email protected]>
Co-authored-by: Shell <[email protected]>
|
|
Signed-off-by: Shell <[email protected]>
|
|
|
|
|
|
Signed-off-by: shell <[email protected]>
Signed-off-by: shell <[email protected]>
Signed-off-by: Shell <[email protected]>
|
|
Signed-off-by: Shell <[email protected]>
|
|
Signed-off-by: Shell <[email protected]>
|
|
Signed-off-by: Shell <[email protected]>
|
|
Signed-off-by: GuEe-GUI <[email protected]>
|
|
|
|
* [mm/page] multi-list page manager
[mm/page] page debugger
[libcpu/aarch64] hugepage support
* [quality] remove void-arith
* [format] remove kasan codes
|
|
|
|
|
|
[rt-smart] handling kernel from accessing unmapped user stack
|
|
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes
|
|
* [dfs] sync cromfs
* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration
* [format] fix some format issue.
|
|
* [risc-v/libcpu] porting Smart & RTOS
* [fix] rv64 plic
* [risc-v/rv64] remove macro in rtdef
|
|
* Synchronize the code of the rt mart branch to the master branch.
* TTY device
* Add lwP code from rt-smart
* Add vnode in DFS, but DFS will be re-write for rt-smart
* There are three libcpu for rt-smart:
* arm/cortex-a, arm/aarch64
* riscv64
Co-authored-by: Rbb666 <[email protected]>
Co-authored-by: zhkag <[email protected]>
|
|
|
|
|
|
|
|
修改cpu目录名及相关修改
|
|
|
|
|
|
|
|
|
