| Age | Commit message (Collapse) | Author |
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We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:
1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
channel 5 in enabled and connected to IRQ.
2, RTI driver is enabled and compare3 source is selected to counter1
and the compare3 will generate tick in the period of 10ms. This
value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.
In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2566 bbd45198-f89e-11dd-88c7-29a3b14d5316
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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2560 bbd45198-f89e-11dd-88c7-29a3b14d5316
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system default memory heap.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2554 bbd45198-f89e-11dd-88c7-29a3b14d5316
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convert the tabs to spaces
convert the file format to unix style
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2483 bbd45198-f89e-11dd-88c7-29a3b14d5316
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please see this commit with revision 2478
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2482 bbd45198-f89e-11dd-88c7-29a3b14d5316
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it will be used by doxygen
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