| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2024-11-24 | feat: arm64 ASID support | Shell | |
| Support for ARM64 ASID to enhance virtual memory management efficiency by reducing the need for TLB flushes during address space switches. These changes improve performance especially for multi-process systems. Changes: - Added `ARCH_USING_ASID` configuration in `libcpu/aarch64/Kconfig`. - Defined ASID-related constants in `mmu.h`. - Updated `TLBI_ARG` macro to include ASID manipulation. - Implemented ASID allocation mechanism with spinlock synchronization. - Enhanced TLB invalidation to support ASID-specific operations. - Modified `rt_hw_aspace_switch` to use ASIDs when switching address spaces. - Adjusted debug logging and function documentation to reflect ASID usage. - Refactored AArch64 MMU and TLB handling for ASID integration. Signed-off-by: Shell <[email protected]> | |||
| 2024-06-28 | [format] cleanup libcpu/aarch64 (#8950) | Shell | |
| * [dfs] fixup compiler warning Signed-off-by: Shell <[email protected]> * [format] libcpu/arm64: separate context switching codes Signed-off-by: Shell <[email protected]> * [format] libcpu/arm64: separate vector Signed-off-by: Shell <[email protected]> * [format] libcpu/arm64: separate context_gcc.S Signed-off-by: Shell <[email protected]> * [format] libcpu/arm64: moving headers to include directory Signed-off-by: Shell <[email protected]> * style: replace tab with space --------- Signed-off-by: Shell <[email protected]> | |||
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