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针对不同的 Aarch64 BSP 针对 KERNEL_VADDR_START 宏定义进行区分
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1. Configure the kernel default vaddr by RAM and TEXT offset.
2. Check the p_addr 2M align when set the stride in `rt_hw_mmu_map`.
Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: Cliff Chen <[email protected]>
Signed-off-by: mouch6131 <[email protected]>
Co-authored-by: Cliff Chen <[email protected]>
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This patch introduces a tagged pages allocator to address the existing problems
of page aliasing on specific platforms and the requirement of page coloring.
It implements an affinity-id aware page manager by separating the runtime page
list into two types: a normal single linked-list and a multi-dimensional affinity-list.
Changes:
- Introduced tagged pages allocator and managing algorithm for affinity pages list
- Modified components to support affinity-id list management
- Updated page allocation and freeing functions to handle tagged pages
- Added configuration options for page affinity block size and debugging
- Modified mmap and elf loading to respect affinity settings
- Enhanced page list management to support multi-dimensional affinity-list
Signed-off-by: Shell <[email protected]>
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Improves the memory mapping process by dynamically selecting the optimal
paging stride (4K or 2M) based on virtual address alignment and mapping
size. This eliminates the need for upfront stride determination, enhancing
flexibility and maintainability in memory management.
Changes:
- Replaced fixed stride selection logic with a dynamic decision loop.
- Removed `npages` calculation and replaced with `remaining_sz` to track
unprocessed memory size.
- Added assertions to ensure `size` is properly aligned to the smallest
page size.
- Adjusted loop to dynamically determine and apply the appropriate stride
(4K or 2M) for each mapping iteration.
- Updated virtual and physical address increments to use the dynamically
selected stride.
Signed-off-by: Shell <[email protected]>
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Support for ARM64 ASID to enhance virtual memory management efficiency
by reducing the need for TLB flushes during address space switches.
These changes improve performance especially for multi-process systems.
Changes:
- Added `ARCH_USING_ASID` configuration in `libcpu/aarch64/Kconfig`.
- Defined ASID-related constants in `mmu.h`.
- Updated `TLBI_ARG` macro to include ASID manipulation.
- Implemented ASID allocation mechanism with spinlock synchronization.
- Enhanced TLB invalidation to support ASID-specific operations.
- Modified `rt_hw_aspace_switch` to use ASIDs when switching address spaces.
- Adjusted debug logging and function documentation to reflect ASID usage.
- Refactored AArch64 MMU and TLB handling for ASID integration.
Signed-off-by: Shell <[email protected]>
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mmu log fixup
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* memory setup using memblock
* map pages later
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* [ofw] dealing with mem region out of kernel space
- Fix parameter checking in _out_of_range() that NULL is excluded for
fixed mapping
- Split page install with a deferred stage to avoid mapping over
ARCH_EARLY_MAP_SIZE
Signed-off-by: Shell <[email protected]>
* fixup: restrict vstart for using of RT_NULL
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Signed-off-by: Shell <[email protected]>
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[bsp/rpi4] fixup startup issues
Signed-off-by: Shell <[email protected]>
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Signed-off-by: Shell <[email protected]>
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Signed-off-by: xqyjlj <[email protected]>
Signed-off-by: Shell <[email protected]>
Co-authored-by: xqyjlj <[email protected]>
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Including the patch for memory allocation, testsuites and fixups of
static analysis.
Signed-off-by: Shell <[email protected]>
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Signed-off-by: Shell <[email protected]>
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Signed-off-by: Shell <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
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* [mm/page] multi-list page manager
[mm/page] page debugger
[libcpu/aarch64] hugepage support
* [quality] remove void-arith
* [format] remove kasan codes
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* [errno code]fix that use RT_ENOSYS without -
* Update bsp/airm2m/air32f103/libraries/rt_drivers/drv_hwtimer.c
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Co-authored-by: Man, Jianting (Meco) <[email protected]>
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* [fix] implementation fault on avl
* [fix] mm may free varea allocated statically
* [test] add test and benchmark for avl
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fix bugs on cache maintenance when starting user app
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* [rt-smart/mem] remove pv_offset
* [rt-smart] list kernel space command
* [rt-smart] restore ioremap region
* [revert] restore kernel space isolation
* [rt-smart/pv_off] code format
* [rt-smart] add get_pvoff()
* [pvoffset] pvoff as constant for C codes
* [pvoff] pvoff as interfaces
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synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes
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* [smart/aarch64] sync aarch64
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