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2021-05-27[lts 3,1,x] format codesMeco Man
2019-12-17Sync from master (75a3f3dd3a930eab1dc58fa0258a9d1605a0ac11)armink
2019-01-28Sync from master (aa1e41d04f6b7b37786b1d88f492701e9d4acf5a)armink
2019-01-19Sync from master (0889bafda8e03c6809d43ec87ee28b940efb28aa).armink
2018-12-28[libcpu] Sync to latest version.armink
2018-10-15[license] Change the license of libarm to Apache.Bernard Xiong
2018-06-04[libcpu][arm][arm926] Using C header file to define stack and heap size.ArdaFu
2017-12-21[libcpu]: add 8-byte alignment for arm architecture && optimize code formatSummerGift
2017-10-19[bsp][at91sam9260] Fix the problem of the finsh function failure by using ↵weety
component initialization.
2015-06-05Align thread stack to 8 byte.aozima
2015-06-04implement __user_initial_stackheapaozima
2015-06-04Align stack address to 8 byte.aozima
2015-05-04[libcpu][arm926] Optimize irq trap code.ardafu
2015-04-22[libcpu][arm926] Optimize codeardafu
1. Combine code for IAR and GCC in file mmu.c and cpuport.c 2. Remove remap code in start_xxx.S. User should config MMU to map vector table to visual address 0x0
2015-04-16[libcpu][arm926] Remove unused SPSR register PUSH/POP when os switch thread.ardafu
2015-04-16[libcpu][arm926] Define vector table start at BSP/{board}/platform/ assemble ↵ardafu
INC files.
2015-04-151. [bsp][sam9260] Fix the bug that auto reset after boot 20s. Disable ↵ardafu
watchdog in rt_lovel_level_init function. 2. [bsp][sam9260] Modify SCONS scripts to support IAR tool chain. 3. [bsp][sam9260] Move link strips in to folder link_scripts. 4. [libcpu][arm926] Add copy right to source file and format code.
2015-04-141. [cpu] split ARM926 cpu code from AT91SAM9260 BSPardafu
2013-07-21Embedded GPLv2 license.weety
2013-07-21fix compiling errorweety
2013-07-21commit againweety
2013-07-21update at91sam9260 project directory structure.weety
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