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2022-01-20[asm] 解决tab和空格混用的问题Meco Man
2021-10-13修复部分bsp编译报错mazhiyuan
2021-09-26[update] support armclangliukangcc
2021-08-28FINSH_USING_BUILT_IN_COMMANDS改MSH_USING_BUILT_IN_COMMANDSMeco Man
2021-08-25[finsh] finsh组件可以选择是否包含内置命令Meco Man
2021-07-05调整代码,以支持cpu usagefenghuijie
2021-07-05调整异常处理代码结构,以支持backtrace功能fenghuijie
2021-07-05修改irq handle接口rt_hw_trap_irq,支持核间IPI中断处理fenghuijie
2021-07-03添加dcache invalidate/dcache clean&invalidate接口fenghuijie
2021-07-03Adjust the stack_top to bsswanghaijing
2021-07-02[libcpu] remove gtimer/pmu from cortex-aBernard Xiong
2021-05-27[add] ↵zhouji
在cortex-a中增加,打开RT_USING_CPU_FFS宏定义时的_rt_ffs实现。
2021-05-14[update] 增加获取cortex-a generic timer频率接口zhouji
2021-05-14[add] ↵zhouji
添加gicv3中断控制器代码,更新menuconfig配置选项与utest的config.h
2021-05-14[update] 整理cortex-a aarch32启动代码zhouji
1. 去除start_gcc.s中set_secondary_cpu_boot_address代码,这部分提取到qemu-vexpress-a9 bsp中。 2. 移动cpu.c中rt_hw_cpu_id函数到cp15_gcc.s,使用汇编实现,采用wake属性,方便bsp根据cpu特性获取CPU ID(多cpu集群中,不同厂家使用组合不一样). 3. 整理start_gcc.s 适应多核启动,原来的代码只考虑到双核的情况。
2021-04-09Merge pull request #4583 from fenghuijie/masterBernard Xiong
[Cortex-A]add gic&gtimer interface
2021-04-09add type modifier for immediate datafenghuijie
2021-04-08add gic&gtimer interfacefenghuijie
2021-04-08优化未定义异常时自动开启FPU的判断条件,当FPU末开启时� ↵zhouji
��自动开启。
2021-03-27[libcpu] auto formattedMeco Man
2020-12-28resolve Conflictsyangjie
bsp/nrf52832/board/Sconscript bsp/nrf52832/startups/Sconscript bsp/raspberry-pi/raspi4-32/driver/SConscript
2020-12-19[SConscript]update group nameyangjie
2020-11-30[SConscript] change libcpu to LIBARCH,and correcte letter caseyangjie11
2020-11-20[SConscript]rename group nameyangjie11
2020-11-20[libcpu][update]重启与关机函数:rt_hw_cpu_shutdown、rt_hw_cpu_reset ↵张世争
,补充WEAK属性
2020-06-30fix gic ack irq problemshaojinchun
2020-06-04fix startup code address relative jumpbigmagic
2020-05-25add raspi4 32bit mode bspbigmagic
2019-10-22fixed linker script and stack align issues.aozima
2019-09-27开放spinlock相关函数shaojinchun
2019-06-19fix cortex-a cahceZYH
2019-05-29add cortex-a fpu supportshaojinchun
2019-05-12[BSP][qemu-vexpress-a9] code cleaup for compiling warning.Bernard Xiong
2019-05-11fix signal codeshaojinchun
2019-05-09[libcpu][arm/cortex-a] Add correct comments.Bernard Xiong
2019-04-27修改lwp支持中arm cortex-a的swi入口函数处理shaojinchun
2019-04-26Rename 'platform.h' in 'imx6ul' and 'qemu-vexpress-a9' BSPs.qz721
This filename conflicts with the 'mbedtls' package. They are renamed in the name of the corresponding chips and included in 'board.h'. Files that rely on this file should include 'board.h' instead.
2019-04-01Disable the data alignment check.qz721
2019-03-29Add standard rt-thread cache interfaces for arm/cortex-a.qz721
Add cache invalidate and clean interfaces. Adjust the default cache type of memory to 'WriteBach with WriteAllocate'.
2019-03-25Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.qz721
2019-01-07[libcpu] Add SConscript in libcpu.Bernard Xiong
2018-12-05[libcpu/arm/cortex-a]rt_hw_interrupt_install函数name参数增加const限定liruncong
2018-10-15[license] Change the license of libarm to Apache.Bernard Xiong
2017-12-21[libcpu]: add 8-byte alignment for arm architecture && optimize code formatSummerGift
2017-11-01[BSP] add i.MX 6UL BSPBernard Xiong