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* Revert safety MMU initialization.
Co-authored-by: Wayne Lin <[email protected]>
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* [utest/mm] add testcase for create/init
format codes of create/init in components/mm
* [libcpu/aarch64] fix user stack check routine
* [kservice] export API for utest
* [utest/mm] testcase for aspace_map
format & modify the files under components/mm related with aspace_map
* [lwp/user_mm] add user_map_varea for mmap feature
* [mm] rename rt_mm_fault_try_fix to rt_aspace_fault_try_fix
* [utest/mm] testcase for synchronization
* [mm] modify unmap api to improve throughput
* [utest/mm] testcases for cache and varea map
* [format] remove extra space
* [utest/mm] fix testcase problem in header
* [lwp] extend map_user_varea with a flag
* [utest/mm] testcase for lwp_map_user_varea
* [libcpu/arm/cortex-a] fix kernel space layout
* [utest/mm] adjust for armv7 arch
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* [syscall] move sys_cacheflush to lwp_syscall.c
* [syscall] improve assertion
* [format] rename to rt_ctassert
* [debug] modified ct assertion on mm_page.c
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fix bugs on cache maintenance when starting user app
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* [rt-smart/mem] remove pv_offset
* [rt-smart] list kernel space command
* [rt-smart] restore ioremap region
* [revert] restore kernel space isolation
* [rt-smart/pv_off] code format
* [rt-smart] add get_pvoff()
* [pvoffset] pvoff as constant for C codes
* [pvoff] pvoff as interfaces
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synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes
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* [dfs] sync cromfs
* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration
* [format] fix some format issue.
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* [rtdef] rename RT_WEAK attribute as rt_weak
* [rtdef] rename RT_USED attribute as rt_used
* [rtdef] rename RT_SECTION attribute as rt_section
* [rtdef] rename ALIGN attribute as rt_align
* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support
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* Synchronize the code of the rt mart branch to the master branch.
* TTY device
* Add lwP code from rt-smart
* Add vnode in DFS, but DFS will be re-write for rt-smart
* There are three libcpu for rt-smart:
* arm/cortex-a, arm/aarch64
* riscv64
Co-authored-by: Rbb666 <[email protected]>
Co-authored-by: zhkag <[email protected]>
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If the application defines dozens of global variables,
the speed of clearing the bss segment will be slower.
Because icache can be enabled before the mmu enabled.
Therefore, in order to speed up the process of clearing the BSS segment,
enable icache needs to be put ahead.
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IAR统一使用iccarm作为判断条件而不是是用IDE的名字来进行判断
因为不确定后续IAR是否会像Keil一样内含有不同的编译工具链
此外，将判断条件改为列表方式，这样更方便后续增加其他可能的IAR编译链
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将GCC判断条件改为列表方式，方便后续增加新的编译工具链
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used in GCC4.7 and later versions.
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* [gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM
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在cortex-a中增加，打开RT_USING_CPU_FFS宏定义时的_rt_ffs实现。
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添加gicv3中断控制器代码，更新menuconfig配置选项与utest的config.h
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1. 去除start_gcc.s中set_secondary_cpu_boot_address代码，这部分提取到qemu-vexpress-a9 bsp中。
2. 移动cpu.c中rt_hw_cpu_id函数到cp15_gcc.s，使用汇编实现，采用wake属性，方便bsp根据cpu特性获取CPU ID（多cpu集群中，不同厂家使用组合不一样）.
3. 整理start_gcc.s 适应多核启动，原来的代码只考虑到双核的情况。
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[Cortex-A]add gic>imer interface
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��自动开启。
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bsp/nrf52832/board/Sconscript
bsp/nrf52832/startups/Sconscript
bsp/raspberry-pi/raspi4-32/driver/SConscript
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，补充WEAK属性
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