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path: root/libcpu/risc-v/common64/cpuport.c
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2025-02-22libcpu: riscv: fixed ARCH_RISCV_VECTOR issuekenneth.liu
description: Using the vector instruction set to trigger an illegal instruction exception when ARCH_SISCV_VECTOR=y. analysis: When initializing the thread stack, the rt_cw_stack_init function did not enable VS for SSTATUS. Solution: When ARCH_SISCV_VECTOR=y, increment the initial value of sstatus by 0x600(SSTATUS_VS). Signed-off-by: Liu Gui <[email protected]>
2024-09-13feat: remove redundant codes under virt64, c906Shell
Changes: - create new folder name `common64` and save all common codes of rv64 inside Signed-off-by: Shell <[email protected]>