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2025-12-04[libcpu-riscv]: [surpport SMP]: Add SMP support for qemu-virt64-riscvTm-C-mT
1.Add the necessary function declarations for SMP enablement and implement the corresponding functionalities, including rt_hw_secondary_cpu_up, secondary_cpu_entry, rt_hw_local_irq_disable, rt_hw_local_irq_enable, rt_hw_secondary_cpu_idle_exec, rt_hw_spin_lock_init, rt_hw_spin_lock, rt_hw_spin_unlock, rt_hw_ipi_send, rt_hw_interrupt_set_priority, rt_hw_interrupt_get_priority, rt_hw_ipi_init, rt_hw_ipi_handler_install, and rt_hw_ipi_handler. 2.In the two functions (rt_hw_context_switch_to and rt_hw_context_switch) in context_gcc.S, add a call to rt_cpus_lock_status_restore to update the scheduler information. 3.If the MMU is enabled, use the .percpu section and record different hartids by configuring special page tables; if the MMU is not enabled, record them directly in the satp register. Additionally, add dynamic startup based on core configuration.The .percpu section is only used when both ARCH_MM_MMU and RT_USING_SMP are enabled. However, there is a certain amount of space waste since no macro guard is added for it in the link script currently. 4.The physical memory of QEMU started in CI is 128MB, so RT_HW_PAGE_END is modified from the original +256MB to +128MB. Modify the SConscript file under the common64 directory to include common/atomic_riscv.c in the compilation process. Signed-off-by: Mengchen Teng <[email protected]>
2025-11-16Reorganize Group names in build system for clarity and IDE integration #10923Copilot
2025-09-01fix(risc-v, mmu): fix type mismatch of `_query`Haojin Tang
2025-09-01fix(riscv, cpp): remove `rt_hw_cpu_id` in `cpuport.h` to fix errorHaojin Tang
2025-07-23[lwp][rv64] restore tp register in arch_thread_signal_enter to fix user-mode ↵Yulong Wang
memory access
2025-05-28[libcpu][risc-v]:add comment for the round down of symb_pczhangjing
2025-05-28[libcpu][risc-v] fix:only map the 1GB space where the original code segment ↵zhangjing
is located
2025-04-11libcpu: riscv: declare external symbols insideChen Wang
libcpu/risc-v/common64/mmu.c uses the external symbol "__bss_end" (this symbol generally is defined in the link script file) and depends on the extern declaration of this symbol in the bsp's "board.h". This is not a problem in implementation, but it is not a good habit. If this extern symbol is used locally, just declare it locally should be better. In this way, there will be no dependency of the kernel core on the bsp header file. And there will be no special requirements for the bsp board code, such as the need to make extern declarations for these "__bss_end" symbols in "board.h". This patch currently only explicitly externly declares "__bss_end" inside libcpu itself. The code of "#include <board.h>" is kept, because the modification involved is too large, it is necessary to clean up the bsp involved before cleaning this include code line uniformly. Signed-off-by: Chen Wang <[email protected]>
2025-04-11libcpu: cleanup undefined rt_hw_mmu_kernel_map_init (#10177)Chen Wang
* libcpu: cleanup undefined rt_hw_mmu_kernel_map_init rt_hw_mmu_kernel_map_init() is declared in header files but no definition found, cleanup the code. Signed-off-by: Chen Wang <[email protected]> * bsp: allwinner: d1: remove calling of rt_hw_mmu_kernel_map_init rt_hw_mmu_kernel_map_init is an undefined function, calling it is meaningless. Signed-off-by: Chen Wang <[email protected]> --------- Signed-off-by: Chen Wang <[email protected]>
2025-03-17[libcpu][risc-v]add code for handling exception scenarios in _unmap_area.ligr
2025-03-17[libcpu][risc-v]remove unused parameter 'size' for func _unmap_area.ligr
Signed-off-by: ligr <[email protected]>
2025-03-12[libcpu][risc-v]add comments for rt_hw_mem_setup_early. (#10102)Guorui Li
2025-03-02[libcpu][risc-v]add comments for rv64 sv39 mmu APIs. (#10053)Guorui Li
2025-02-28[bugfix][risc-v]fix the PPN length error in GET_PPN(pte). (#10020)Guorui Li
2025-02-22libcpu: riscv: fixed ARCH_RISCV_VECTOR issuekenneth.liu
description: Using the vector instruction set to trigger an illegal instruction exception when ARCH_SISCV_VECTOR=y. analysis: When initializing the thread stack, the rt_cw_stack_init function did not enable VS for SSTATUS. Solution: When ARCH_SISCV_VECTOR=y, increment the initial value of sstatus by 0x600(SSTATUS_VS). Signed-off-by: Liu Gui <[email protected]>
2025-01-10bsp: qemu-virt64-riscv: remove config RISCV_S_MODEChen Wang
RISCV_S_MODE configuration only affects the code in libcpu/risc-v/virt64, and the only bsp using this libcpu is qemu-virt64-riscv. Considering s-mode is the default mode RT-Thread running on virt64 machine, it seems unnecessary to make RISCV_S_MODE a Kconfig option. Solution: Remove RISCV_S_MODE from Kconfig and define it as a macro in the code in libcpu/risc-v/virt64. Plus, due to this macro is only related to virt64, rename RISCV_S_MODE to RISCV_VIRT64_S_MODE. Update the .config/rtconfig.h in this patch. Signed-off-by: Chen Wang <[email protected]>
2024-11-29[libcpu/riscv]解决smp下cpuport.h中的编译问题 (#9714)heyuanjie87
2024-11-21[libcpu][riscv]纠正pv_offset的对齐检查heyuanjie87
2024-11-15[libcpu]riscv使用call指令解决长跳转问题heyuanjie87
2024-10-16[libcpu]添加对riscv vector的支持 (#9531)heyuanjie87
[libcpu]添加对riscv vector的支持
2024-10-11[libcpu][risc-v] fix the bug when using ASID in the RV64 MMUzhangjing0303
* (fix) mmu: satp value should be 64-bit Corrected the SATP register to ensure it uses the correct 64-bit format as required by the system architecture. * use __asm__ instead of asm for the GNU C compiler Co-authored-by: Shell <[email protected]> --------- Co-authored-by: Shell <[email protected]>
2024-10-09[libcpu][risc-v]remove the redundant "0x" from the printed information when ↵zhangjing0303
cpu is in exception (#9516) Remove redundant '0x' from printed output
2024-10-08[libcpu][risc-v]add README for RV64zhangjing0303
2024-09-13feat: remove redundant codes under virt64, c906Shell
Changes: - create new folder name `common64` and save all common codes of rv64 inside Signed-off-by: Shell <[email protected]>