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feat: [libcpu/c906] support ARCH_REMAP_KERNEL
This change was necessary to enable the remapping of the kernel image to
a high virtual address region on the c906 platform.
Changes:
- Introduced new configuration options `ARCH_REMAP_KERNEL`, and
`ARCH_USING_ASID` under the `ARCH_RISCV64` section.
- Updated MMU initialization and switching functions to incorporate
remapping handling.
- Modified page table setup for proper memory attribute settings.
- Added support for early memory setup, kernel remapping
- Added conditional compilation for ASID support in the `rt_aspace` struct,
since this is not enable currently for most architecture.
Signed-off-by: Shell <[email protected]>
Co-authored-by: Shell <[email protected]>
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* [rv/virt/stackframe.h]添加GP寄存器保存偏移量宏
* 【rv/c906/stackframe.h]定义GP寄存器存储偏移量
* [rv]信号处理切换到用户态前恢复gp
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* [libcpu] support for ARCH_REMAP_KERNEL
These changes introduce support for the ARCH_REMAP_KERNEL configuration,
which isolates kernel space in high virtual address regions. This feature
is necessary to enhance memory protection and management by segregating
user and kernel spaces more effectively.
Changes:
- Updated conditional macros to check for ARCH_REMAP_KERNEL instead of
ARCH_KERNEL_IN_HIGH_VA in board initialization files to reflect the new
configuration option.
- Modified qemu-virt64-riscv Kconfig and SConstruct files to include and
utilize ARCH_REMAP_KERNEL.
- Created a new linker script `link_smart.lds` for smart linking in qemu-virt64-riscv.
- Updated rtconfig.py to use a more flexible execution path setup.
- Enhanced user address space definitions in `lwp_arch.h` to support the
new virtual address mappings.
- Adjusted kernel memory initialization and mapping logic in `c906/mmu.c`
and `virt64/mmu.c` to account for high virtual address regions.
- Added Kconfig option to enable ARCH_REMAP_KERNEL for RISCV64 architectures.
- Enhanced memory setup functions to support new mapping scheme, including
updates to early page table setup and address relocation logic.
These modifications ensure that the system can utilize high memory
addresses for the kernel, improving memory isolation and system stability.
Signed-off-by: Shell <[email protected]>
* fixup: CI run failed
* bsp: default config without using smart
* fixup: static checks
* restore rt_hw_mmu_kernel_map_init for D1
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Signed-off-by: Shell <[email protected]>
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* [smart] fixup: precise mm fault type
Also, fixup arm64 read access fault
* arm64: using meaningful macro on trap
* fixup: renaming macro
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* [libcpu] rv64: discard rt_current_thread
* arm: using rt_thread_self to fetch current TCB
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support cvitek sdhci drvier
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Signed-off-by: LiuLingze <[email protected]>
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Signed-off-by: LiuLingze <[email protected]>
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Signed-off-by: Shell <[email protected]>
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Signed-off-by: shell <[email protected]>
Signed-off-by: shell <[email protected]>
Signed-off-by: Shell <[email protected]>
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Signed-off-by: Shell <[email protected]>
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and remvoe duplicated default functions in each cpu/bsp level
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* [utest/mm] add testcase for create/init
format codes of create/init in components/mm
* [libcpu/aarch64] fix user stack check routine
* [kservice] export API for utest
* [utest/mm] testcase for aspace_map
format & modify the files under components/mm related with aspace_map
* [lwp/user_mm] add user_map_varea for mmap feature
* [mm] rename rt_mm_fault_try_fix to rt_aspace_fault_try_fix
* [utest/mm] testcase for synchronization
* [mm] modify unmap api to improve throughput
* [utest/mm] testcases for cache and varea map
* [format] remove extra space
* [utest/mm] fix testcase problem in header
* [lwp] extend map_user_varea with a flag
* [utest/mm] testcase for lwp_map_user_varea
* [libcpu/arm/cortex-a] fix kernel space layout
* [utest/mm] adjust for armv7 arch
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Co-authored-by: flyingcys <flyingcys!163.com>
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* [syscall] move sys_cacheflush to lwp_syscall.c
* [syscall] improve assertion
* [format] rename to rt_ctassert
* [debug] modified ct assertion on mm_page.c
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* [libcpu/risc-v] support noncached normal memory
* [mm] check before dereference in _fetch_page
* [mm] add comments on ioremap
* [ioremap] report more info on failed
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MAX_ASID最大为0x10000，在next_asid==MAX_ASID时进入下一个generation。因此next_asid不能只有16位，否则将不能进入下一个generation。修改rt_uint16_t为rt_uint32_t。
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[rt-smart] handling kernel from accessing unmapped user stack
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fix bugs on cache maintenance when starting user app
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* [rt-smart/mem] remove pv_offset
* [rt-smart] list kernel space command
* [rt-smart] restore ioremap region
* [revert] restore kernel space isolation
* [rt-smart/pv_off] code format
* [rt-smart] add get_pvoff()
* [pvoffset] pvoff as constant for C codes
* [pvoff] pvoff as interfaces
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* [rt-smart] asid for c906
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* [rv64/bsp] porting to mm
* [mm] report more info for debugging
* [fix] code format
* [libcpu/c906] porting to RTOS
* [fix] using rtdbg api
* [fix] add return
* [fix] report more information for debugging
* [fix] use assert 0 for unrecoverable error
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synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes
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* add new bsp-bl808
* support ARCH_RISCV_FPU_S && update rtconfig.py
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* [dfs] sync cromfs
* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration
* [format] fix some format issue.
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* [rtdef] rename RT_WEAK attribute as rt_weak
* [rtdef] rename RT_USED attribute as rt_used
* [rtdef] rename RT_SECTION attribute as rt_section
* [rtdef] rename ALIGN attribute as rt_align
* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support
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* Synchronize the code of the rt mart branch to the master branch.
* TTY device
* Add lwP code from rt-smart
* Add vnode in DFS, but DFS will be re-write for rt-smart
* There are three libcpu for rt-smart:
* arm/cortex-a, arm/aarch64
* riscv64
Co-authored-by: Rbb666 <[email protected]>
Co-authored-by: zhkag <[email protected]>
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rt_hw_interrupt_disable/rt_hw_interrupt_enable bug
使用不同的优化等级会出现不同的效果
当使用-O0 等级时，无法正确得到关闭中断之前的状态
Using different optimization levels will have different effects
When the - o0 level is used, the state before the shutdown interrupt cannot be obtained correctly
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bsp/nrf52832/board/Sconscript
bsp/nrf52832/startups/Sconscript
bsp/raspberry-pi/raspi4-32/driver/SConscript
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，补充WEAK属性
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