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2024-06-21[rv]信号处理进入用户态前恢复gp (#9072)heyuanjie87
* [rv/virt/stackframe.h]添加GP寄存器保存偏移量宏 * 【rv/c906/stackframe.h]定义GP寄存器存储偏移量 * [rv]信号处理切换到用户态前恢复gp
2024-06-18[libcpu] rv64: support for ARCH_REMAP_KERNEL (#9067)Shell
* [libcpu] support for ARCH_REMAP_KERNEL These changes introduce support for the ARCH_REMAP_KERNEL configuration, which isolates kernel space in high virtual address regions. This feature is necessary to enhance memory protection and management by segregating user and kernel spaces more effectively. Changes: - Updated conditional macros to check for ARCH_REMAP_KERNEL instead of ARCH_KERNEL_IN_HIGH_VA in board initialization files to reflect the new configuration option. - Modified qemu-virt64-riscv Kconfig and SConstruct files to include and utilize ARCH_REMAP_KERNEL. - Created a new linker script `link_smart.lds` for smart linking in qemu-virt64-riscv. - Updated rtconfig.py to use a more flexible execution path setup. - Enhanced user address space definitions in `lwp_arch.h` to support the new virtual address mappings. - Adjusted kernel memory initialization and mapping logic in `c906/mmu.c` and `virt64/mmu.c` to account for high virtual address regions. - Added Kconfig option to enable ARCH_REMAP_KERNEL for RISCV64 architectures. - Enhanced memory setup functions to support new mapping scheme, including updates to early page table setup and address relocation logic. These modifications ensure that the system can utilize high memory addresses for the kernel, improving memory isolation and system stability. Signed-off-by: Shell <[email protected]> * fixup: CI run failed * bsp: default config without using smart * fixup: static checks * restore rt_hw_mmu_kernel_map_init for D1 --------- Signed-off-by: Shell <[email protected]>
2024-06-13[kservice] Enhance support for backtrace service (#9037)Shell
[feat] Enhance support for backtrace service rt_backtrace_formatted_print() and rt_backtrace_to_buffer() to help debug routines. Also, following modification are included: - make rt_backtrace_frame patchable with weak attr - replace lwp backtrace with sync output Signed-off-by: Shell <[email protected]>
2024-06-07[mm] precise & readable mm fault type (#9047)Shell
* [smart] fixup: precise mm fault type Also, fixup arm64 read access fault * arm64: using meaningful macro on trap * fixup: renaming macro
2024-05-26[libcpu] discard rt_current_thread (#8976)Shell
* [libcpu] rv64: discard rt_current_thread * arm: using rt_thread_self to fetch current TCB
2024-05-08[ipc] support of lockless rt_completion (#8887)Shell
* [ipc] lockless rt_completion implementation The new rt_completion implemented by lockless algorithm can improve timer resolution for up to ~12%, compare to sem IPC. Signed-off-by: Shell <[email protected]> * fixup: error * remove useless changes --------- Signed-off-by: Shell <[email protected]>
2024-04-30Fix compiling eror in hpmicro bsp (#8889)Fan Yang
- added 'DEVICE' to rtconfig.py - fixed compiling error cuased by change in interrupt_gcc.S Signed-off-by: Fan YANG <[email protected]>
2024-04-24[bsp]support cvitek sdhci drvier (#8849)flyingcys
support cvitek sdhci drvier
2024-03-21[libcpu/rv64] fixup for parameter passing on backtrace (#8655)Shell
Signed-off-by: Shell <[email protected]>
2024-03-19[bsp][cv1800b] fix a implicit-function-declaration warningLiuLingze
Signed-off-by: LiuLingze <[email protected]>
2024-03-19[bsp][cv1800b] fix a int-conversion warningLiuLingze
Signed-off-by: LiuLingze <[email protected]>
2024-02-23🎯 Sync smart & scheduler codes (#8537)Shell
Signed-off-by: Shell <[email protected]> Co-authored-by: xqyjlj <[email protected]>
2024-02-20[ci] open ci check with function declaration warning (#8546)Yuqiang Wang
2024-02-20[ci] fix errors under strick compiling modeMeco Man
2024-02-20[libcpu][SConscript]规范group名为libcpuMeco Man
2024-01-28add libcpu/risc-v/rv64 (#8511)flyingcys
2023-11-02🐞 fix: fix d1s smart build (#8212)xqyjlj
2023-10-21[kservice] improve backtrace service in kernel (#8144)Shell
Signed-off-by: Shell <[email protected]>
2023-10-20[smart] fixup: mmap support (#8154)Shell
Signed-off-by: Shell <[email protected]>
2023-10-17Sync dfs lwp (#8123)geniusgogo
2023-09-09[smart/syscall] fix exit(2) and add exit_group(2) (#8005)Shell
Signed-off-by: shell <[email protected]> Signed-off-by: shell <[email protected]> Signed-off-by: Shell <[email protected]>
2023-08-16[components/mm] add unmap page API (#7834)Shell
Signed-off-by: Shell <[email protected]>
2023-08-11[libcpu][risc-v][common] Fix application crash on risc-v soc if FPU isFan YANG
enabled - Defined ARCH_RISCV_FPU once the __riscv_flen macro was detected Signed-off-by: Fan YANG <[email protected]>
2023-08-09[libcpu][risc-v][common] Avoid using t0 before being savedFan YANG
- Fixed the issue that t0 was modified unexpectedly before being saved Signed-off-by: Fan YANG <[email protected]>
2023-08-08rt_hw_cpu_shutdown: implement default weak functionMeco Man
and remvoe duplicated default functions in each cpu/bsp level
2023-07-27🐞 fix(ktime): fix wrong boottimexqyjlj
因为tick从中断到设置中间的时延特别大，因此暂不采用tick做基准时间，直接取gtime的cnt做基准时间
2023-07-17[time]时钟框架重构 (#7794)xqyjlj
2023-06-30[bsp]add cv1800b (#7753)flyingcys
2023-06-07[risc-v][libcpu] 删去无用局部变量 (#7634)Liu,Yuan
2023-05-20[atomic] add stdc atomic detection. (#7536)Bernard Xiong
2023-05-14[libcpu][component][debug] add debug info for gdb (#7033)Shell
2023-04-24[libcpu/risc-v/c906] add ioremap && default param (#7345)flyingcys
2023-04-04[kernel] 将rt_thread结构体改为显式继承rt_object (#7131)Shicheng Chu
2023-03-30[utest][atomic]添加返回值测试 (#7124)Yaochenger
* [utest][atomic]添加返回值测试
2023-03-30[rt-smart] testcase & improvements for memory management (#7099)Shell
* [utest/mm] add testcase for create/init format codes of create/init in components/mm * [libcpu/aarch64] fix user stack check routine * [kservice] export API for utest * [utest/mm] testcase for aspace_map format & modify the files under components/mm related with aspace_map * [lwp/user_mm] add user_map_varea for mmap feature * [mm] rename rt_mm_fault_try_fix to rt_aspace_fault_try_fix * [utest/mm] testcase for synchronization * [mm] modify unmap api to improve throughput * [utest/mm] testcases for cache and varea map * [format] remove extra space * [utest/mm] fix testcase problem in header * [lwp] extend map_user_varea with a flag * [utest/mm] testcase for lwp_map_user_varea * [libcpu/arm/cortex-a] fix kernel space layout * [utest/mm] adjust for armv7 arch
2023-03-29[bsp]fix esp32_c3 compile error (#7107)flyingcys
* fix rt_hw_interrupt_install return value * add __rt_rvstack
2023-03-23[atomic]添加arm与risc-v下的常用原子操作函数 (#7053)Yaochenger
* Update Kconfig * Update trap_gcc.S * Update bsp/hifive1/drivers/SConscript Co-authored-by: Man, Jianting (Meco) <[email protected]> * Update SConscript * [atomic]提交一份arm与risc-v架构下的常用原子操作函数 * 修改变量类型 * 更新rtatomic.h与atomic_port.c * 更新rt-thread\libcpu\arm\common\atomic_port.c * 更新include/rtatomic.h与libcpu/arm/common/SConscript * 更新include/rtatomic.h * 修正格式与Kconfig * 修正格式与文件结构 * 规范文件格式与文件重命名 * 添加测试用例与CI * 添加函数声明 * 修改virt64/SConscript 添加atomic_riscv.c * 1.规范代码风格 * 2.添加RISC-V64原子指令支持 解决在RV64下编译器将32-bit运算结果扩展为64-bit 导致判断错误 * 添加C11标准库原子操作测试 --------- Co-authored-by: Man, Jianting (Meco) <[email protected]>
2023-03-19[bsp] add bl808 lp core (#7069)flyingcys
* Add riscv_32e support * add bl808 lp core * update README.md
2023-03-19add bl60x/bl70x/bl61x/bl808 (#7063)flyingcys
Co-authored-by: flyingcys <flyingcys!163.com>
2023-03-17[rt-smart] move sys_cacheflush to lwp_syscall.c (#7048)Shell
* [syscall] move sys_cacheflush to lwp_syscall.c * [syscall] improve assertion * [format] rename to rt_ctassert * [debug] modified ct assertion on mm_page.c
2023-03-16[libcpu/risc-v] support noncached normal memory (#7051)Shell
* [libcpu/risc-v] support noncached normal memory * [mm] check before dereference in _fetch_page * [mm] add comments on ioremap * [ioremap] report more info on failed
2023-03-11[libcpu/riscv/virt64] fix (#5979) (#7040)zilong
2023-03-09[libcpu/riscv/c906] fix "next_asid" type error (#7031)chenhy0106
MAX_ASID最大为0x10000，在next_asid==MAX_ASID时进入下一个generation。因此next_asid不能只有16位，否则将不能进入下一个generation。修改rt_uint16_t为rt_uint32_t。
2023-03-07[libcpu/risc-v]更新移植readmeYaochenger
2023-03-05[libcpu/risc-v]迁移libcpu/risc-v/e310与rv32m1文件中内容至bsp (#7015)Yaochenger
2023-03-02[libcpu/riscv]迁移libcpu/riscv/ch32中文件至bsp (#7004)Yaochenger
2023-03-02[libcpu/risc-v]迁移libcpu/risc-v/hpmicro中的文件至bspYaochenger
2023-03-02[libcpu/risc-v]移除bumblebee文件夹与nuclei文件夹中的内容至bspYaochenger
2023-03-01[libcpu/risc-v]将cv32e40p文件夹中文件移至BSP (#7002)Yaochenger
2023-03-01[libcpu][riscv]整合libcpu/riscv中的移植文件 ↵Yaochenger
提供一份公共代码于common (#6941) 整合libcpu/riscv中的移植文件 提供一份公共代码于common 在提交本pr时，除hpmicro的内核，rv32内核bsp已完成去除大部分的冗余，大部分代码采用common中的实现。本pr的作用是进一步统一common中的文件，从而提供一份公用代码，新移植的RV32内核的BSP可以全部使用common代码。 - 在common中提供一份公用文件：interrupt_gcc.S - 修改原有的文件，将原有的中断中上下文切换代码替换为interrupt_gcc.S - 基于上述修改，修改仓库中risc-v内核的BSP与移植相关的部分 (主要包含中断入口函数 中断栈等) - 在common中提供一份公用文件：trap_common.c；提供统一中断入口函数，中断入口函数初始化，中断入口注册等函数，并完善异常时的信息输出 - 在common中提供一份公用文件：rt_hw_stack_frame.h；将栈帧结构体剥离，供用户使用 - 在上述工作完成后，在上述工作的基础上测试仓库中risc-v内核的BSP - 完善函数中的命名，完善中断栈的获取 - 提供一份详细的基于现有common文件的移植指南 #### 在什么测试环境下测试通过 - 1.CH32V307V-R1-R0 - 2.CH32V208W-R0-1V4 - 3.HPM6750EVKMINI - 4.GD32VF103V-EVAL - 5.qemu(CORE-V-MCU ) > 与上述开发板使用同样芯片的BSP均测试通过 在CH32V307V-R1-R0与HPM6750EVKMINI上基于现有移植文件进行多线程复杂场景下的长时间测试，测试过程系统运行正常。
generated by cgit v1.3.1 (git 2.54.0) at 2026-10-24 03:59:48 +0000