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Add standard rt-thread cache interfaces for arm/cortex-a.
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Add cache invalidate and clean interfaces.
Adjust the default cache type of memory to 'WriteBach with WriteAllocate'.
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Make 'qemu-vexpress-a9' and 'imx6ul' use the same libcpu code.
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* the initial support of synopsys designware arc processor
* the initial support of synospsy ARC EM Starter Kit
* the bsp code is based on embarc which is a common SDK for
all synopsys ARC-based boards
* use "scons --gdb" to debug emsk with em9d configuration
* for detailed board information, pls go embarc.org
Signed-off-by: Wayne Ren <[email protected]>
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* Add get_free_heap_size function;
* Increase shell stack for KPU module.
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添加cpu复位函数
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RT_WEAK void rt_hw_cpu_reset(void)
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st限定
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添加对 TI C2000 DSP 的移植
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