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2023-03-03[fix] mm bugs (#7010)Shell
* [fix] implementation fault on avl * [fix] mm may free varea allocated statically * [test] add test and benchmark for avl
2023-03-02[libcpu/riscv]迁移libcpu/riscv/ch32中文件至bsp (#7004)Yaochenger
2023-03-02[libcpu/risc-v]迁移libcpu/risc-v/hpmicro中的文件至bspYaochenger
2023-03-02[libcpu/risc-v]移除bumblebee文件夹与nuclei文件夹中的内容至bspYaochenger
2023-03-01[libcpu/risc-v]将cv32e40p文件夹中文件移至BSP (#7002)Yaochenger
2023-03-01[libcpu][riscv]整合libcpu/riscv中的移植文件 ↵Yaochenger
提供一份公共代码于common (#6941) 整合libcpu/riscv中的移植文件 提供一份公共代码于common 在提交本pr时，除hpmicro的内核，rv32内核bsp已完成去除大部分的冗余，大部分代码采用common中的实现。本pr的作用是进一步统一common中的文件，从而提供一份公用代码，新移植的RV32内核的BSP可以全部使用common代码。 - 在common中提供一份公用文件：interrupt_gcc.S - 修改原有的文件，将原有的中断中上下文切换代码替换为interrupt_gcc.S - 基于上述修改，修改仓库中risc-v内核的BSP与移植相关的部分 (主要包含中断入口函数 中断栈等) - 在common中提供一份公用文件：trap_common.c；提供统一中断入口函数，中断入口函数初始化，中断入口注册等函数，并完善异常时的信息输出 - 在common中提供一份公用文件：rt_hw_stack_frame.h；将栈帧结构体剥离，供用户使用 - 在上述工作完成后，在上述工作的基础上测试仓库中risc-v内核的BSP - 完善函数中的命名，完善中断栈的获取 - 提供一份详细的基于现有common文件的移植指南 #### 在什么测试环境下测试通过 - 1.CH32V307V-R1-R0 - 2.CH32V208W-R0-1V4 - 3.HPM6750EVKMINI - 4.GD32VF103V-EVAL - 5.qemu(CORE-V-MCU ) > 与上述开发板使用同样芯片的BSP均测试通过 在CH32V307V-R1-R0与HPM6750EVKMINI上基于现有移植文件进行多线程复杂场景下的长时间测试，测试过程系统运行正常。
2023-02-27[libcpu.aarch64] add rt_backtrace function. (#6982)Bernard Xiong
* [libcpu.aarch64] add rt_backtrace function.
2023-02-25[libcpu/aarch64] stop when no page is freewangxiaoyao
2023-02-24[rt-smart] handling kernel from accessing unmapped user stack (#6957)Shell
[rt-smart] handling kernel from accessing unmapped user stack
2023-02-21[fix] typowangxiaoyao
2023-02-21[fix] pipelinewangxiaoyao
2023-02-21[fixup] add cache maintenance ops;wangxiaoyao
fix bugs on cache maintenance when starting user app
2023-02-14[rt-smart] PV_OFFSET as a variable (#6904)Shell
* [rt-smart/mem] remove pv_offset * [rt-smart] list kernel space command * [rt-smart] restore ioremap region * [revert] restore kernel space isolation * [rt-smart/pv_off] code format * [rt-smart] add get_pvoff() * [pvoffset] pvoff as constant for C codes * [pvoff] pvoff as interfaces
2023-02-07rt_device_write/read return data type as rt_ssize_tMeco Man
rt_ssize_t can give negative error code, which follows the unix style correctly
2023-02-07[cortex-m7]rt_hw_cpu_dcache_ops函数uint32_t替换为rt_uint32_twdfk-prog
2023-02-06Add ADT Kconfig and fix MMU kconfig issue in Cortex-A (#6901)Bernard Xiong
* Add ADT Kconfig and fix MMU kconfig issue in Cortex-A * [BSP] enable ADT
2023-01-28为c906添加asid支持 (#6870)chenhy0106
* [rt-smart] asid for c906
2023-01-16[rt-smart] porting c906 and D1s to mm (#6848)Shell
* [rv64/bsp] porting to mm * [mm] report more info for debugging * [fix] code format * [libcpu/c906] porting to RTOS * [fix] using rtdbg api * [fix] add return * [fix] report more information for debugging * [fix] use assert 0 for unrecoverable error
2023-01-08format Kconfig and sconscriptMeco Man
2023-01-08[rt-smart] kernel virtual memory management layer (#6809)Shell
synchronize virtual memory system works. adding kernel virtual memory management layer for page-based MMU enabled architecture porting libcpu MMU codes porting lwp memory related codes
2023-01-07[bsp]add new bsp-bl808 (#6824)flyingcys
* add new bsp-bl808 * support ARCH_RISCV_FPU_S && update rtconfig.py
2023-01-04[libcpu][riscv]移除ch32中的冗余文件,使用common下的文件 (#6813)Yaochenger
* [libcpu][riscv]移除ch32中的冗余文件,使用common下的文件 * 修正cpuport.h宏定义 * 规范宏定义格式
2023-01-02[libcpu][riscv]移除cv32e40p中部分文件，采用common中的文件Yaochenger
2022-12-28[libcpu][riscv] 添加宏用于区别是否开启FPU，更新ch32v208v-r0 ↵Yaochenger
->ch32v208w-r0，更新注释
2022-12-27[bsp][ch32v208]添加ch32v208BSP,合并libcpu/riscv 中ch系列的port文件 ↵Yaochenger
(#6780) 【1】添加ch32v208-r0 bsp 【2】合并libcpu/riscv 下ch系列mcu的port文件
2022-12-26fix compiling warning.bernard
2022-12-26[bsp][smart] fix virt64 aarch64 link script for smart.bernard
2022-12-22[ch32]对接了rt_hw_context_switch_interrupt接口 (#6749)linshire
* 对接了rt_hw_context_switch_interruptC(rt_ubase_t from, rt_ubase_t to, rt_thread_t from_thread, rt_thread_t to_thread)接口 * Update libcpu/risc-v/ch32v1/cpuport.c Co-authored-by: Man, Jianting (Meco) <[email protected]>
2022-12-20[smart/aarch64] code sync (#6750)Shell
* [smart/aarch64] sync aarch64
2022-12-16[rt-smart] 弱化 RT_USING_LWP，使用 RT_USING_SMART 作为宏配置 (#6740)guo
* [dfs] sync cromfs * [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration * [format] fix some format issue.
2022-12-14[libcpu] fix cpp11 errorguozhanxin
2022-12-11[rtdef] use lower-case to define attributes (#6728)Man, Jianting (Meco)
* [rtdef] rename RT_WEAK attribute as rt_weak * [rtdef] rename RT_USED attribute as rt_used * [rtdef] rename RT_SECTION attribute as rt_section * [rtdef] rename ALIGN attribute as rt_align * [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support
2022-12-10对接了rthw.h的接口，修复了不能编译的问题 (#6722)linshire
2022-12-10[smart][risc-v/libcpu] port rv64 cpu code (#6704)Shell
* [risc-v/libcpu] porting Smart & RTOS * [fix] rv64 plic * [risc-v/rv64] remove macro in rtdef
2022-12-08[bsp] add core-v-mcu bsp (#6705)Yaochenger
* add core-v-mcu bsp * 规范bsp格式 添加readme * 修改readme Co-authored-by: [email protected] <ws051000>
2022-12-03sync branch rt-smart. (#6641)guo
* Synchronize the code of the rt mart branch to the master branch. * TTY device * Add lwP code from rt-smart * Add vnode in DFS, but DFS will be re-write for rt-smart * There are three libcpu for rt-smart: * arm/cortex-a, arm/aarch64 * riscv64 Co-authored-by: Rbb666 <[email protected]> Co-authored-by: zhkag <[email protected]>
2022-11-25[bsp] faster startup for cortex-axiaoguang_ma
If the application defines dozens of global variables, the speed of clearing the bss segment will be slower. Because icache can be enabled before the mmu enabled. Therefore, in order to speed up the process of clearing the BSS segment, enable icache needs to be put ahead.
2022-10-19[bsp][c28x] add support to not disable global interrupt in context-switch to ↵Yunjie Gu
enable zero-latency isr for critical interrupts.
2022-10-11Move gtimer driver to libcpu.Wayne Lin
2022-10-11Revert "[libcpu] remove gtimer/pmu from cortex-a"Wayne
2022-09-22bsp beaglebone: add IAR support (#6443)YangZhongQing
* bsp beaglebone: add IAR template files and fix it's build error ATTENTION: project.* was generated by scons, so I add it to gitignore. rtconfig.py *FLAGS located in "PLATFORM == 'iccarm'" are unverified and maybe wrong. （我只是从STM32里面抄来，然后根据自己的理解改了一下，并没有验证这些参数的正确性， 我也不知道怎么用命令行调用这些参数来编译） * bsp beaglebone: add beaglebone_ram.icf ROM address from uboot_cmd.txt am335x_DDR.icf use 0x82000000, different to uboot_cmd.txt & gcc beaglebone_ram.lds, the difference will easy cause later developer got below error: => go 0x80200000 ## Starting application at 0x80200000 ... undefined instruction pc : [<8200956c>] lr : [<8ff62497>] reloc pc : [<728a956c>] lr : [<80802497>] sp : 8df37358 ip : 00000000 fp : 00000002 r10: 8df4d448 r9 : 8df3feb8 r8 : 8ffd30f8 r7 : 8ff78089 r6 : 00000002 r5 : 80200000 r4 : 8df4d44c r3 : 80200000 r2 : 8df4d44c r1 : 8df4d44c r0 : 00000001 Flags: nzCv IRQs off FIQs on Mode SVC_32 Code: 5dbffcdd bb9bdf7f abf85423 eff1f77f (7ed7daaf) Resetting CPU ... resetting ... * libcpu am335x: context_iar.S rt_hw_context_switch: add thumb mode support IAR new project defualt Processor mode is Thumb, this will cause user easy occur the following error: ... msh />Execption: r00:0x8800aaa8 r01:0x802080c5 r02:0x00000000 r03:0x88009b4c r04:0x00001000 r05:0x00000000 r06:0x00001403 r07:0x00100000 r08:0x00000000 r09:0x00000000 r10:0x0000000a fp :0x0000000a ip :0x65687374 sp :0x00006c6c lr :0x0000008a pc :0x88008be0 cpsr:0x880001bc software interrupt shutdown... (0) assertion failed at function:rt_hw_cpu_shutdown, line number:160 * bsp beaglebone: change IAR template.ewp code use Arm mode Arm mode bin size will bigger than Thumb mode * libcpu am335x: IAR: use rt_hw_cpu_dcache_enable instead of rt_cpu_dcache_enable Reviewer mysterywolf say: 麻烦把rt_cpu_icache_enable 和 rt_cpu_dcache_enable, 统一改成 rt_hw_cpu_icache_enable 和 rt_hw_cpu_dcache_enable rt_hw_cpu_icache_enable 和 rt_hw_cpu_dcache_enable 是其他bsp也是这么命名的 这是个命名统一的函数
2022-09-15完善bsp beaglebone的基本使用 (#6434)Man, Jianting (Meco)
* bsp beaglebone: rerun menuconfg * bsp beaglebone: add uart0 support * bsp beaglebone: use uart0 as console * bsp beaglebone: add heap init fix rt_application_init() error: (m != RT_NULL) assertion failed at function:rt_smem_alloc, line number:288 * bsp beaglebone: add mmu & interrupt init must init mmu, otherwise no interrupt is generated, cause scheduler can't work. I don't know why need mmu, just seen: bsp/rockchip/rk3568/driver/board.c * libcpu am335x: reset interrupt controller before init vector I think reset before init is more better AM335X_StarterWare_02_00_01_01\system_config\armv7a\am335x\interrupt.c IntAINTCInit() * bsp beaglebone: full gpio driver support * bsp beaglebone: add tftpboot way to uboot_cmd.txt * bsp beaglebone: optimize am33xx_gpio_hdr, check irqstatus is the last one Co-authored-by: YangZhongQing <[email protected]>
2022-09-06Add BSP for HPM6750EVK and HPM6750EVKMINI (#6374)Fan Yang
* Add CANFD support and correct typos - Added CANFD required fields to can.h - Fixed typos in can.h and can.c - Corrected all the projects affected by the typo - Fixed wrong line-ending in some affected can driver files Signed-off-by: Fan YANG <[email protected]> * update * bsp: support boards from hpmicro - Supported HPM6750EVKMINI - Supported HPM6750EVK Signed-off-by: Fan YANG <[email protected]> Signed-off-by: Fan YANG <[email protected]> Co-authored-by: Meco Man <[email protected]>
2022-09-05fix: 修复arm926异常时打印栈名乱码Zhang WenBin
2022-08-29tms320f28379d fix init (#6343)YuQi
解决 tms320f28379d bsp 启动的问题。主要改动如下。 修正context.s中汇编代码错误。在旧版的代码中，操作数为32位而汇编命令却使用了针对16位数据的命令MOV，导致程序在某些情况无法正常启动线程。 由于C28x的平台下，SP只支持16bit寻址，所以用于线程空间存放的heap以及ebss段都需要放在低16位的空间，针对这个问题修改了CMD文件。此外还增加基于CMD文件基于RAM的支持，方便调试。 新增rtdef.h中RT_SECTION，RT_USED，ALIGN和RT_WEAK的定义。旧版bsp中这些定义为空，导致INIT_EXPORT注册的函数失效。 修改程序启动代码，在程序入口直接调用原生启动代码 以上改动在LAUNCHXL-F28379D 通过了测试。
2022-08-22fix sconsliyangyang
2022-08-22libcpu 支持 ch32v3系列单片机liyangyang
2022-08-20[bsp][tms320f28379d] Fix compile ti (#6254)Yunjie Gu
* compile_ok Issues fixed: (1) update .config: select FINSH_USING_SYMTAB (2) add rt_size_t in rtconfig_project.h (3) fix finsh problems of using sym table (4) update .project to include ipc source codes. Todo list: (1) automate the build source selection of ccs and reconcile it with scons * change compiler * msh can run now the key step is to swap the order of rt_interrupt_nest -- and RT_OBJECT_HOOK_CALL(rt_interrupt_leave_hook,()) in irq.c. This is an improvised solution and an issue has been raised. * Update 2837x_FLASH_lnk_cpu1.cmd The original one is also fine. Just to make it more rigorous since FSymTab is in data section. * update readme.md Complier selection and maintainer update. Co-authored-by: YuQi <[email protected]>
2022-08-13[libcpu][arm] fix rt_hw_cpu_dcache_ops clean invalid bugMartin
clean_invalid must be set at the same time, and call clean_invalid, or call clean/invalid
2022-08-11[libcpu][arm] fix armclang error when enable LTOtfx2001
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