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2017-10-09[libcpu] code cleanup for nds32.bernard
2017-10-06Update cpuport.cBernard Xiong
2017-10-06Merge pull request #826 from ArcherChang/masterBernard Xiong
[BSP] Add Andes N1068 porting and simple bsp.
2017-09-14Merge pull request #845 from caogos/masterBernard Xiong
[BSP] Add FPU option for loongson1c.
2017-09-13在配置文件“rtconfig.h”中增加硬浮点FPU的配置项,勤为本
浮点经常会用到,所以默认使用硬浮点。
2017-09-01update libcpu: cortex-m0 fault handlers always enable.aozima
2017-08-26[BSP] cleanup for hifive1 bsp.Bernard Xiong
2017-08-25[1] Andes N1068体系移植ArcherChang
a. Libc改用官方版本(工具链附带版本); b. 去除未使用文件;
2017-08-25Merge pull request #827 from caogos/masterBernard Xiong
[BSP] Add EMAC driver in loongson1C (ported by chinesebear, https://github.com/chinesebear/rtt-net)
2017-08-25[1] 添加Andes N1068体系;ArcherChang
[2] 基于AE210P EVB板; [3] 详细信息参阅bsp/AE210P/readme文件夹; 《Andes工程创建和调试》文档;等。
2017-08-23update cortex-m libcpu: fixed compile error.aozima
2017-08-23添加龙芯1C片内网卡的驱动(原创作者是chinesebear,https://g ↵勤为本
ithub.com/chinesebear/rtt-net)
2017-08-18update libcpu: ensure fault enable.aozima
2017-08-10Merge pull request #784 from zhangjun1996/masterBernard Xiong
[BSP] add bsp for sifive(risc-v e310).
2017-08-10增加龙芯1c硬浮点的支持(可以使用硬浮点了)勤为本
2017-07-31modify: drivers/cpuusage.czhangjun
modify: ../../libcpu/risc-v/e310/stack.c rmove unused macro definition modify: ../../src/idle.c Return to the original version
2017-07-31Merge branch 'master' of https://github.com/RT-Thread/rt-threadzhangjun
add new bsp for risc-v
2017-07-31new file: ../../libcpu/risc-v/e310/trap.czhangjun
add file that forget to submit before auto change timer mtimercmp register on the base of RT_TICK_PER_SECOND in rtconfig.h no flashing led new file: ../../src/idle.c recover old file
2017-07-31fix bug in context_gcc.s and start_gcc.s:zhangjun
save mie into stack msh running normaly
2017-07-30fix bug in rt_hw_context_switch_interrupt_dozhangjun
save sp to old thread clear rt_thread_switch_interrupt_flag always enable interrupt after rt_hw_context_switch judeg the type of interrupt in trap_entry, then call handler(Machine timer interrupt of Machine external interrupt)
2017-07-30 修改: ../../libcpu/risc-v/e310/context_gcc.Szhangjun
enable interrupt after return form rt_hw_context_switch
2017-07-29fix trap_entryzhangjun
2017-07-26 modified: ../../libcpu/risc-v/e310/context_gcc.Szhangjun
fix open timer intrrupt
2017-07-26remove "csrrc a5, mstatus, MSTATUS_MIE" in rt_hw_interrupt_enable();zhangjun
it will lead to interrupt again in interrupt
2017-07-20支持GPIO中断(外部中断)勤为本
2017-07-20将支持的中断个数从32个扩展到160个,至此可以支持所有中断勤为本
2017-07-18修正龙芯1c的中断号勤为本
2017-07-17deleted: rtthread.s /*just for debug*/zhangjun
modified: ../../libcpu/risc-v/e310/context_gcc.S change ret to mret and switch to new task with mepc
2017-07-17add context_gcc.szhangjun
2017-02-06Add libcpu/arm/am335x/context_iar.S filezchong-cht
2016-06-15flush cache after exception code installkontais
2016-05-20[BSP] Update VFP code in armv6.Bernard Xiong
committed by FH.
2016-05-20[BSP] Enable VFP.Bernard Xiong
committed by FH.
2016-04-24[BSP] Add BSP for Ingenic X1000 CPUBernard Xiong
2016-04-19start exception by chinesebearchinesebear
2016-04-18[BSP] Add fh8620 bsp from Shanghai Fullhan Microelectronics Co., Ltd.Bernard Xiong
FH8620 BSP Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd. All rights reserved
2015-11-11 Add iar compiler support for am335x.zchong_cht
2015-09-24[BSP] update stm32f7-discoBernard Xiong
code cleanup.
2015-09-15[BSP] fix x86 bsp compiling issueBernard Xiong
2015-09-04Add the license.weety
2015-09-04Add dm365 porting.weety
2015-08-07[bsp]add the stm32f74x bsp.nongxiaoming
2015-07-09chinesebear add bsp & libcpuchinesebear
2015-06-05Align thread stack to 8 byte.aozima
2015-06-04implement __user_initial_stackheapaozima
2015-06-04Align stack address to 8 byte.aozima
2015-05-22fixed assembly warnings.aozima
2015-05-13fixed assembly warnings.aozima
2015-05-11[libcpu][am335x] Fix the booting failure when enabling MMUAdrian Huang
Since the 16 domains are configured as the client domains in mmu_setttbase(), a Permission fault is generated if the XN bit (Execute-never) is set in the short-descriptor translation table (for section and supersection). This leads to the booting failure when enabling MMU for beagleboard bsp. Here is log: ---------------------------------------------------------------- SD/MMC found on device 0 reading uEnv.txt 117 bytes read in 3 ms (38.1 KiB/s) Loaded environment from uEnv.txt Importing environment from mmc ... Running uenvcmd ... reading rtthread.bin 162624 bytes read in 24 ms (6.5 MiB/s) \## Starting application at 0x80200000 ... ---------------------------------------------------------------- This commit removes the XN bit configuration in the section of the short-descriptor translation table. The OS can be booted successfully with applying this commit.
2015-05-04[libcpu][arm926] Optimize irq trap code.ardafu