| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2015-06-05 | Align thread stack to 8 byte. | aozima | |
| 2015-06-04 | implement __user_initial_stackheap | aozima | |
| 2015-06-04 | Align stack address to 8 byte. | aozima | |
| 2015-05-22 | fixed assembly warnings. | aozima | |
| 2015-05-13 | fixed assembly warnings. | aozima | |
| 2015-05-11 | [libcpu][am335x] Fix the booting failure when enabling MMU | Adrian Huang | |
| Since the 16 domains are configured as the client domains in mmu_setttbase(), a Permission fault is generated if the XN bit (Execute-never) is set in the short-descriptor translation table (for section and supersection). This leads to the booting failure when enabling MMU for beagleboard bsp. Here is log: ---------------------------------------------------------------- SD/MMC found on device 0 reading uEnv.txt 117 bytes read in 3 ms (38.1 KiB/s) Loaded environment from uEnv.txt Importing environment from mmc ... Running uenvcmd ... reading rtthread.bin 162624 bytes read in 24 ms (6.5 MiB/s) \## Starting application at 0x80200000 ... ---------------------------------------------------------------- This commit removes the XN bit configuration in the section of the short-descriptor translation table. The OS can be booted successfully with applying this commit. | |||
| 2015-05-04 | [libcpu][arm926] Optimize irq trap code. | ardafu | |
| 2015-04-22 | [libcpu][arm926] Optimize code | ardafu | |
| 1. Combine code for IAR and GCC in file mmu.c and cpuport.c 2. Remove remap code in start_xxx.S. User should config MMU to map vector table to visual address 0x0 | |||
| 2015-04-16 | [libcpu][arm926] Remove unused SPSR register PUSH/POP when os switch thread. | ardafu | |
| 2015-04-16 | [libcpu][arm926] Define vector table start at BSP/{board}/platform/ assemble ↵ | ardafu | |
| INC files. | |||
| 2015-04-15 | 1. [bsp][sam9260] Fix the bug that auto reset after boot 20s. Disable ↵ | ardafu | |
| watchdog in rt_lovel_level_init function. 2. [bsp][sam9260] Modify SCONS scripts to support IAR tool chain. 3. [bsp][sam9260] Move link strips in to folder link_scripts. 4. [libcpu][arm926] Add copy right to source file and format code. | |||
| 2015-04-14 | 1. [cpu] split ARM926 cpu code from AT91SAM9260 BSP | ardafu | |
| 2015-03-09 | Fix compile warning: | Bright Pan | |
| ..\..\libcpu\arm\cortex-m3\context_rvds.S(207): warning: A1581W: Added 2 bytes of padding at address 0xd6 | |||
| 2014-11-12 | support rx62n | limxuzheng | |
| 2014-09-20 | Merge pull request #2 from RT-Thread/master | 陈豪 | |
| sync | |||
| 2014-09-11 | [libcpu] Add builtin ffs implementation for Cortex-M4. | bernard | |
| 2014-08-18 | mips/loongson_1b: format code | Grissiom | |
| 2014-08-18 | mips/loongson_1b: install NULL handler is OK | Grissiom | |
| 2014-08-18 | mips/loongson_1b: fix rt_interrupt_dispatch | Grissiom | |
| 2014-08-12 | [libcpu]am335x edit vector | 陈豪 | |
| vector_undef and vector_dabt | |||
| 2014-07-31 | Fix some spell error; | aozima | |
| 2014-07-12 | [bsp] Remove none-released porting | Bernard Xiong | |
| 2014-06-27 | bsp: add zynq7000 | Grissiom | |
| 2014-04-08 | [bsp/rva8] enable group{0,1} interrupt forwarding in gic initialization | Grissiom | |
| When RT-Thread is running stand alone, it forgot to enable the distributor of GIC. | |||
| 2014-04-08 | [libcpu/arm] remove useless cpsr updating in rt_hw_context_switch_to | Grissiom | |
| This piece of code will enable the interrupt early before switching to the first thread. Although it is harmless, but not prefect. | |||
| 2014-04-03 | [vmm] add realview-pb-a8 VMM support | Grissiom | |
| 2014-01-11 | add CM_PER_UARTx_CLKCTRL | RTsien | |
| 2013-11-17 | cortex-r4: use byte to allocate the stack | Grissiom | |
| Unit of "byte" is more intuitive than "long". | |||
| 2013-11-17 | cortex-r4: let svc mode reuse the stack of IRQ on startup | Grissiom | |
| As the svc stack is the stack of threads, there is no need to allocate a separate stack for the startup. Reuse the IRQ stack should be OK. Tested on rm48 board. | |||
| 2013-11-04 | Fix hardfault bug for gcc port | Bright Pan | |
| for 2013-02-20 aozima commmit "port for gcc", but the commit is not tested,and the kernel is breakdown in context_gcc.S, the file is a copy from cortex-m3,but not port for cortex-m0, so i complete this port for aozima, test it in stm32f0discovery board , and it works fine. | |||
| 2013-10-20 | cortex-r4: dump register on traps | Grissiom | |
| We could not handle any traps except IRQ/FIQ. | |||
| 2013-10-20 | cortex-r4: remove RM48x50.h and add armv7.h | Grissiom | |
| 2013-10-20 | rm48: move some asm file to libcpu | Grissiom | |
| 2013-10-20 | rm48x50: add GCC support | Grissiom | |
| 2013-09-22 | Delete SConscript | Bernard Xiong | |
| 2013-09-20 | Import beaglebone porting | bernard | |
| 2013-09-04 | sim/posix: move rt_hw_context_switch_interrupt after it's definition | Grissiom | |
| This fix a compile error in Clang. | |||
| 2013-07-29 | Merge pull request #132 from MrVan/sep6200 | Bernard Xiong | |
| SEP6200 Support | |||
| 2013-07-21 | Embedded GPLv2 license. | weety | |
| 2013-07-21 | fix compiling error | weety | |
| 2013-07-21 | commit again | weety | |
| 2013-07-21 | update at91sam9260 project directory structure. | weety | |
| 2013-07-21 | update AT91SAM9260 usart driver， using serial driver component. | weety | |
| 2013-07-17 | Cleanup and add licencse | Peng Fan | |
| 2013-07-17 | SEP6200 Support | Peng Fan | |
| 2013-07-09 | enhancement hard fault exception handler. | aozima | |
| 2013-06-24 | fix spelling error. | aozima | |
| 2013-06-23 | update libcpu/arm/cortex-m4: support lazy stack optimized. | aozima | |
| 2013-06-23 | fixed bug: correct cortex-m SCB->VTOR address. | aozima | |
| 2013-06-23 | format code by Astyle. | aozima | |
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index : rt-thread.git | |
| Unnamed repository; edit this file 'description' to name the repository. |
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