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Signed-off-by: supperthomas <[email protected]>
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kservice.c:474: warning: The following parameter of rt_backtrace_to_buffer(rt_thread_t thread, struct rt_hw_backtrace_frame *frame, long skip, rt_ubase_t *buffer, long buflen) is not documented:
parameter 'thread'
kernel.h:157: warning: unable to resolve reference to '_rt_errno' for \ref command
Signed-off-by: supperthomas <[email protected]>
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fix shutdown log
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[feat] Enhance support for backtrace service
rt_backtrace_formatted_print() and rt_backtrace_to_buffer() to help
debug routines.
Also, following modification are included:
- make rt_backtrace_frame patchable with weak attr
- replace lwp backtrace with sync output
Signed-off-by: Shell <[email protected]>
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Signed-off-by: xqyjlj <[email protected]>
Signed-off-by: Shell <[email protected]>
Co-authored-by: xqyjlj <[email protected]>
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BUG (#8575)
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Signed-off-by: Shell <[email protected]>
Co-authored-by: xqyjlj <[email protected]>
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Signed-off-by: Shell <[email protected]>
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Signed-off-by: Shell <[email protected]>
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Including the patch for memory allocation, testsuites and fixups of
static analysis.
Signed-off-by: Shell <[email protected]>
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(#8362)
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Signed-off-by: Shell <[email protected]>
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this code will not be used in here, but will be used in other user apps
related:
8e6f9cf1be2b08704ff02992dc57d3022bfb073a
ecf2d8215961ca7c539132b62a72df6072cc3e14
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and remvoe duplicated default functions in each cpu/bsp level
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Co-authored-by: Man, Jianting (Meco) <[email protected]>
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warnings in Doxygen.
将Doxygen输入文件（由Doxyfile中的INPUT定义）中的失效Doxygen分组指令（如/*@*/和/*@}*/）更改为有效的分组指令（如/**@*/和/**@}*/）；（此处只对INPUT中的文件做了修改，bsp目录下和libcpu目录下存在近万个失效的Doxygen分组指令，但由于不作为文档的输入文件且这些文件过于庞大老旧，没有对这些文件中的无效指令做修改）
将图片文件统一放入了images目录下；
修改了Doxyfile和部分Doxygen注释，使得Doxyfile能够定位到新的代码路径且不受重复实现的影响；
解决了一些注释中的参数名不匹配、参数多余/缺失等问题。
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* [utest/mm] add testcase for create/init
format codes of create/init in components/mm
* [libcpu/aarch64] fix user stack check routine
* [kservice] export API for utest
* [utest/mm] testcase for aspace_map
format & modify the files under components/mm related with aspace_map
* [lwp/user_mm] add user_map_varea for mmap feature
* [mm] rename rt_mm_fault_try_fix to rt_aspace_fault_try_fix
* [utest/mm] testcase for synchronization
* [mm] modify unmap api to improve throughput
* [utest/mm] testcases for cache and varea map
* [format] remove extra space
* [utest/mm] fix testcase problem in header
* [lwp] extend map_user_varea with a flag
* [utest/mm] testcase for lwp_map_user_varea
* [libcpu/arm/cortex-a] fix kernel space layout
* [utest/mm] adjust for armv7 arch
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* [dfs] sync cromfs
* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration
* [format] fix some format issue.
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* [rtdef] rename RT_WEAK attribute as rt_weak
* [rtdef] rename RT_USED attribute as rt_used
* [rtdef] rename RT_SECTION attribute as rt_section
* [rtdef] rename ALIGN attribute as rt_align
* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support
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* Synchronize the code of the rt mart branch to the master branch.
* TTY device
* Add lwP code from rt-smart
* Add vnode in DFS, but DFS will be re-write for rt-smart
* There are three libcpu for rt-smart:
* arm/cortex-a, arm/aarch64
* riscv64
Co-authored-by: Rbb666 <[email protected]>
Co-authored-by: zhkag <[email protected]>
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版本控制规范：https://semver.org/
目前的版本子号不是很规范，其中RT_VERSION甚至和VS那边造成了冲突
```c
/* RT-Thread version information */
#define RT_VERSION 4L /**< major version number */
#define RT_SUBVERSION 1L /**< minor version number */
#define RT_REVISION 1L /**< revise version number */
```
参考ESP32：
```c
/** Major version number (X.x.x) */
#define ESP_ARDUINO_VERSION_MAJOR 2
/** Minor version number (x.X.x) */
#define ESP_ARDUINO_VERSION_MINOR 0
/** Patch version number (x.x.X) */
#define ESP_ARDUINO_VERSION_PATCH 3
```
建议改成：
```c
/* Major version number (X.x.x) */
#define RT_VERSION_MAJOR 4
/* Minor version number (x.X.x) */
#define RT_VERSION_MINOR 2
/* Patch version number (x.x.X) */
#define RT_VERSION_PATCH 0
```
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和 RT_PRINTF_SPECIAL 做了相应处理 (#6361)
* 增加printf格式2进制和8进制，RT_KPRINTF_USING_LONGLONG 和 RT_PRINTF_SPECIAL 做了相应处理
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For compatibility with 16bit addressing 32bit CPU (e.g. TI C28x).
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