From 574e22bdbd1a2d907016c953b230782215190a1a Mon Sep 17 00:00:00 2001 From: 勤为本 <1207280597@qq.com> Date: Wed, 13 Sep 2017 15:21:09 +0800 Subject: 在配置文件“rtconfig.h”中增加硬浮点FPU的配置项, 浮点经常会用到,所以默认使用硬浮点。 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/ls1cdev/drivers/board.c | 2 ++ bsp/ls1cdev/rtconfig.h | 2 ++ libcpu/mips/loongson_1c/stackframe_fpu.h | 4 ++++ 3 files changed, 8 insertions(+) diff --git a/bsp/ls1cdev/drivers/board.c b/bsp/ls1cdev/drivers/board.c index 29d7fa7142..cb5fbdae09 100644 --- a/bsp/ls1cdev/drivers/board.c +++ b/bsp/ls1cdev/drivers/board.c @@ -94,8 +94,10 @@ void rt_hw_board_init(void) /* init operating system timer */ rt_hw_timer_init(); +#ifdef RT_USING_FPU /* init hardware fpu */ rt_hw_fpu_init(); +#endif rt_kprintf("current sr: 0x%08x\n", read_c0_status()); } diff --git a/bsp/ls1cdev/rtconfig.h b/bsp/ls1cdev/rtconfig.h index 99bb973b90..8f87497875 100644 --- a/bsp/ls1cdev/rtconfig.h +++ b/bsp/ls1cdev/rtconfig.h @@ -75,6 +75,8 @@ #define RT_UART_RX_BUFFER_SIZE 64 // +#define RT_USING_FPU + //
#define RT_USING_CONSOLE // diff --git a/libcpu/mips/loongson_1c/stackframe_fpu.h b/libcpu/mips/loongson_1c/stackframe_fpu.h index 58e9271833..93b8ef10c3 100644 --- a/libcpu/mips/loongson_1c/stackframe_fpu.h +++ b/libcpu/mips/loongson_1c/stackframe_fpu.h @@ -37,6 +37,7 @@ .macro SAVE_FPU .set push .set noreorder +#ifdef RT_USING_FPU move k1, sp /* ±£´æÏֳ¡ */ and k0, k1, 0xFFFFFFF8 /* 8×ֽڶÔÆë */ PTR_SUBU sp, k0, PT_FPU_SIZE /* ¼ÆËãջµ× */ @@ -57,6 +58,7 @@ s.d $f28, PT_FPU_R28(sp) s.d $f30, PT_FPU_R30(sp) move sp, k1 /* »ָ´Ïֳ¡ */ +#endif .set reorder .set pop .endm @@ -65,6 +67,7 @@ .macro RESTORE_FPU .set push .set noreorder +#ifdef RT_USING_FPU move k1, sp /* ±£´æÏֳ¡ */ and k0, k1, 0xFFFFFFF8 /* 8×ֽڶÔÆë */ PTR_SUBU sp, k0, PT_FPU_SIZE /* ¼ÆËãջµ×*/ @@ -85,6 +88,7 @@ l.d $f28, PT_FPU_R28(sp) l.d $f30, PT_FPU_R30(sp) move sp, k1 /* »ָ´Ïֳ¡ */ +#endif .set reorder .set pop .endm -- cgit v1.3.1 From 96f3600bdecf127033a6f95b9f6fd6510cfb88ba Mon Sep 17 00:00:00 2001 From: 勤为本 <1207280597@qq.com> Date: Thu, 14 Sep 2017 12:14:55 +0800 Subject: 将异常向量间隔从0x20改为0x80,mips系列cpu的异常向量的间隔为0x80(十进制的128)字节 详细内容请参见《see mips run》中的5.3节——异常向量:异常处理开始的地方 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/ls1cdev/applications/startup.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/bsp/ls1cdev/applications/startup.c b/bsp/ls1cdev/applications/startup.c index ed2854e97e..cb1025dec6 100644 --- a/bsp/ls1cdev/applications/startup.c +++ b/bsp/ls1cdev/applications/startup.c @@ -51,9 +51,9 @@ void rtthread_startup(void) rt_hw_interrupt_init(); /* copy vector */ - rt_memcpy((void *)A_K0BASE, tlb_refill_exception, 0x20); - rt_memcpy((void *)(A_K0BASE + 0x180), general_exception, 0x20); - rt_memcpy((void *)(A_K0BASE + 0x200), irq_exception, 0x20); + rt_memcpy((void *)A_K0BASE, tlb_refill_exception, 0x80); + rt_memcpy((void *)(A_K0BASE + 0x180), general_exception, 0x80); + rt_memcpy((void *)(A_K0BASE + 0x200), irq_exception, 0x80); invalidate_writeback_dcache_all(); invalidate_icache_all(); -- cgit v1.3.1