From 7c53d46ba781fbf156cbe3dfe9d6e2d325aaae3a Mon Sep 17 00:00:00 2001 From: Sherman <56910863+ShermanShao@users.noreply.github.com> Date: Fri, 11 Mar 2022 09:17:46 +0800 Subject: [update] 添加 RA 系列 BSP 开发教程： (#5598) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - 添加 RA 系列 BSP 开发教程 - 添加 ra6m4-iot PPP 上网 - 整理 驱动文件 --- bsp/renesas/README.md | 22 + ...210\266\344\275\234\346\225\231\347\250\213.md" | 383 ++++++++++++ ...275\277\347\224\250\346\225\231\347\250\213.md" | 93 +++ ...244\226\350\256\276\351\251\261\345\212\250.md" | 324 ++++++++++ ...267\273\345\212\240\346\214\207\345\215\227.md" | 63 ++ ...251\261\345\212\250\344\273\213\347\273\215.md" | 62 ++ bsp/renesas/docs/figures/1635909864954.png | Bin 0 -> 34028 bytes bsp/renesas/docs/figures/1635929089445.png | Bin 0 -> 11350 bytes bsp/renesas/docs/figures/Kconfig.png | Bin 0 -> 100933 bytes bsp/renesas/docs/figures/Peripheral.png | Bin 0 -> 23233 bytes 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bsp/renesas/ra6m4-iot/drivers/drv_usart_v2.h delete mode 100644 bsp/renesas/ra6m4-iot/drivers/drv_wdt.c delete mode 100644 bsp/renesas/ra6m4-iot/ports/SConscript delete mode 100644 bsp/renesas/ra6m4-iot/ports/fal/SConscript delete mode 100644 bsp/renesas/ra6m4-iot/ports/fal/fal_cfg.h delete mode 100644 bsp/renesas/ra6m4-iot/ports/rw007/SConscript delete mode 100644 bsp/renesas/ra6m4-iot/ports/rw007/drv_rw007.c create mode 100644 bsp/renesas/tools/sdk_dist.py diff --git a/bsp/renesas/README.md b/bsp/renesas/README.md new file mode 100644 index 0000000000..fbaaa21db9 --- /dev/null +++ b/bsp/renesas/README.md @@ -0,0 +1,22 @@ + +# RA BSP 说明 + +RA 系列 BSP 目前支持情况如下表所示： + +| **BSP 文件夹名称** | **开发板名称** | +|:------------------------- |:-------------------------- | +| **RA6 系列** | | +| [ra6m4-cpk](ra6m4-cpk) | Renesas 官方 CPK-RA6M4 开发板 | +| [ra6m4-iot](ra6m4-iot) | Renesas 官方 IOT-RA6M4 开发板 | + +可以通过阅读相应 BSP 下的 README 来快速上手，如果想要使用 BSP 更多功能可参考 docs 文件夹下提供的说明文档，如下表所示： + +| **BSP 使用教程** | **简介** | +|:-------------------- |:------------------------------------------------- | +| [外设驱动使用教程](docs/RA系列BSP外设驱动使用教程.md) | 讲解 BSP 上更多外设驱动的使用方法 | +| [外设驱动介绍与应用](docs/RA系列驱动介绍.md) | 讲解 RA 系列 BSP 驱动的支持情况，以及如何利用驱动框架开发应用程序 | +| [使用 FSP 配置外设驱动](docs/RA系列使用FSP配置外设驱动.md) | 介绍如何使用 FSP 工具添加和配置外设 | +| **BSP 制作与提交** | **简介** | +| [BSP 制作教程](docs/RA系列BSP制作教程.md) | 讲解 RA 系列 BSP 的制作方法，以及在制作 BSP 和提交 BSP 时应当遵守的规范 | +| [外设驱动添加指南](docs/RA系列外设驱动添加指南.md) | 讲解 BSP 添加更多设备驱动的方法 | + diff --git "a/bsp/renesas/docs/RA\347\263\273\345\210\227BSP\345\210\266\344\275\234\346\225\231\347\250\213.md" "b/bsp/renesas/docs/RA\347\263\273\345\210\227BSP\345\210\266\344\275\234\346\225\231\347\250\213.md" new file mode 100644 index 0000000000..ffc0615de1 --- /dev/null +++ "b/bsp/renesas/docs/RA\347\263\273\345\210\227BSP\345\210\266\344\275\234\346\225\231\347\250\213.md" @@ -0,0 +1,383 @@ +# RA 系列 BSP 制作教程 + +本文主要介绍 RENESAS RA 系列开发板的 BSP 制作教程，此教程能够帮助开发者更加方便快捷的制作新的 RA 系列 BSP，更好的理解 RA 系列 BSP 的框架结构。 + +在 RA 系列的每个 BSP 目录中包含 RA 模板工程、board、RT-Thread 的工程配置及构建脚本等，而对接到 RT-Thread 系统的通用驱动文件则存放在`renesas\libraries\HAL_Drivers`中。这两个部分共同组成一个完整的 BSP 工程。 + +在 RA 系列的 BSP 中引入了瑞萨电子的**[灵活配置软件包](https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp)**（下文简称 FSP）配置工具，为使用 RA 系列 ARM 微控制器的嵌入式系统设计提供简单易用且可扩展的高质量软件。FSP 包括高性能、低内存占用的业界一流的 HAL 驱动程序，具有图形化配置界面和智能代码生成器。 + +RA 系列 BSP 框架的主要特性如下： + +- 使用 FSP 生成的 RA 模板工程，降低新 BSP 的添加难度； +- 通用的驱动文件，开发者可以方便地使用所有驱动； +- 使用 FSP 配置工具对芯片外设进行图形化配置； + +## 1. BSP 框架介绍 + +BSP 框架结构如下图所示： + +![BSP 框架图](./figures/frame.png) + +每一个 BSP 主要由两部分组成，分别是通用驱动库、特定开发板 BSP，下面的表格以 ra6m4-cpk 为例介绍这几个部分： + +|项目|文件夹|说明| +| - | - | :-- | +| 通用库 | renesas\libraries\HAL_Drivers | 用于存放对接 RT-Thread 驱动框架的通用外设驱动 | +| 特定开发板 BSP | renesas\ra6m4-cpk | CPK-RA6M4 开发板的 BSP 工程 | + +## 2. 知识准备 + +制作一个 BSP 的过程就是构建一个新系统的过程，因此想要制作出好用的 BSP，要对 RT-Thread 系统的构建过程有一定了解，需要的知识准备如下所示： + +- 掌握 RA 系列 BSP 的使用方法 + + 了解 BSP 的使用方法，可以阅读 [BSP 说明文档](../README.md) 中使用教程表格内的文档。了解外设驱动的添加方法可以参考《外设驱动添加指南》。 + +- 了解 [Scons](https://www.rt-thread.org/document/site/#/development-tools/scons/scons) 工程构建方法 + + RT-Thread 使用 Scons 作为系统的构建工具，因此了解 Scons 的常用命令对制作新 BSP 是基本要求。 + +- 了解[设备驱动框架](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/device) + + 在 RT-Thread 系统中，应用程序通过设备驱动框架来操作硬件，因此了解设备驱动框架，对添加 BSP 驱动是很重要的。 + +- 了解 [Kconfig](https://www.rt-thread.org/document/site/#/development-tools/kconfig/kconfig) 语法 + + RT-Thread 系统通过 menuconfig 的方式进行配置，而 menuconfig 中的选项是由 Kconfig 文件决定的，因此想要对 RT-Thread 系统进行配置，需要对 kconfig 语法有一定了解。 + +- 熟悉 [FSP](https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp) 配置工具的使用 + + FSP 提供了图形化配置工具和智能代码生成器，在制作和使用 BSP 的过程中经常会用到 FSP 配置工具。 + +## 3. BSP 制作方法 + +本节以制作 CPK-RA6M4 开发板的 BSP 为例，讲解如何为一个新的开发板添加 BSP，最终制作完成的 BSP 将支持 MDK 和 scons 两种方式构建。 + +BSP 的制作过程分为如下步骤： + +1. 创建 BSP 目录 +2. 创建 RA 模板工程 +3. 配置模板工程 +4. 修改 Kconfig 文件 +5. 修改工程构建和配置文件 +6. 重新生成工程 +7. 添加 GCC 格式链接脚本 +8. 修改 rtconfig.py 中的编译参数 + +在接下来的章节中将会详细介绍这些步骤，帮助开发者创建所需要的 BSP。 + +### 3.1 创建 BSP 目录 + +- 创建 BSP 目录不需要直接创建空文件夹，只要复制 BSP 模板 `\renesas\libraries\bsp-template` 文件夹到 `\renesas` 目录并将名称修改为待添加的开发板名即可。命令可参考 **CPK-RA6M4** 的 BSP 命名为 **ra6m4-cpk**，因为 ra6m4-cpk 已经存在，所以本教程使用 **ra6m4-test** 作为新创建的 BSP 名称。 + +![image-20220217155725977](figures/bsp_crate.png) + +![image-20220217160140135](figures/bsp_crate1.png) + +![image-20220217161302858](figures/bsp_crate2.png) + +### 3.2 创建 RA 模板工程 + +第一步是使用 FSP 来创建一个 RA 模板工程。 + +- 在 FSP 安装目录下找到 /eclipse/rasc.exe 双击打开，开启后会自动进入创建工程界面。 + +![fsp_crate](figures/fsp_crate.png) + +![fsp_crate1](figures/fsp_crate1.png) + +![fsp_crate2](figures/fsp_crate2.png) + +![fsp_crate3](figures/fsp_crate3.png) + +![fsp_crate4](figures/fsp_crate4.png) + +![fsp_crate5](figures/fsp_crate5.png) + +![image-20220211182959790](figures/fsp_crate6.png) + +创建完成后会得到一个 RA 模板工程和 BSP 最基本的配置文件和驱动文件，如上图所示。 + +### 3.3 配置模板工程 + +RA 模板工程创建完成后，需要做些修改并添加基础外设 GPIO、UART。 + +- 打开模板工程 `template.uvprojx` + +![image-20220214174740157](figures/template_open.png) + +- 修改 MDK 工程配置 +> **Debug 配置：** 先截图记录下修改前的 Debug 页配置，修改 Device 后 Debug 页的部分配置会发生修改，改完 Device 后手动修改到默认配置。 + +![img](figures/template_config4.png) + +> **Device 配置：**修改 Device 选项，根据开发板使用的具体芯片型号选择 device。 + +![img](figures/template_config.png) + +> **Output 配置：** 修改 `Name of Exexutable`为 rtthread，勾选 `Create HEX File`，因为最终烧录的是 HEX 文件。 + +![image-20220218144358105](figures/template_config1.png) + +> **User 配置：**在用到 TrustZone 时，有额外调用的划分 Secure & Non-Secure 用到的一些指令，如果开发时用的都是 Flat mode 的话，这部分可以忽略。如果需要可以添加命令【cmd /c "start "Renesas" /w cmd /c ""$Slauncher\rasc_launcher.bat" "3.5.0" --gensecurebundle --compiler ARMv6 "$Pconfiguration.xml" "$L%L" 2> "%%TEMP%%\rasc_stderr.out"""】 + +![img](figures/template_config2.png) + +> **C/C++ 配置：**修改编译参数选项关闭部分警告，删除“-Wextra“、”-Wconversion“、”-Wshadow ” 。 +> +> 以 ra6m4-cpk 为例修改后为：-Wno-license-management -Wuninitialized -Wall -Wmissing-declarations -Wpointer-arith -Waggregate-return -Wfloat-equal + +![img](figures/template_config3.png) + +> **Utilities 配置：**如图勾选`Use External Tool for Flash Programming`。配置完成点击 `OK` 保存配置。 + +![img](figures/template_config5.png) + +- 从 MDK 打开 FSP + +> **如何在 MDK 中打开 FSP：** +> +> 1. 打开 MDK，选择 “Tools -> Customize Tools Menu…” +> 2. 点击 “new” 图标，添加一条自定义命令: RA Smart Configurator +> 3. Command 输入工具的安装路径， 点击“…”找到安装路径下的“rasc.exe”文件并选中 (setup_fsp_xxxxx 安装目录下) +> 4. Initial Folder 输入参数: $P +> 5. Arguments 输入参数: --device $D --compiler ARMv6 configuration.xml +> 6. 点击 OK 保存命令“Tools -> RA smart Configurator” + ![img](figures/fsp_config.png) +> 7. 点击添加的命令打开配置工具：**RA Smart Config** + ![img](figures/fsp_config1.png) + +- 添加 UART 端口 +> 选择 Stacks 配置页，点击 New Stack 找到 UART。 + ![image](figures/fsp_uart.png) +> 确认开发板可用于 msh 的 UART 通道。配置 UART 参数，因为需要适配 RT-Thread 驱动中使用的命名所以需要修改，设置 **name** 、**channel** 、**callback** 为一致的标号。格式：channel = **X**，name = g_uart**X**、callback = user_uart**X**_callback + ![image](figures/fsp_uart1.png) + +### 3.4 修改 Kconfig 选项 + +在本小节中修改 `board/Kconfig` 文件的内容有如下两点： + +- 芯片型号和系列 +- BSP 上的外设支持选项 + +芯片系列的定义在`renesas\libraries\Kconfig` 中，修改前先确认是否存在添加的芯片系列定义，如果是一个未添加的系列，需要先添加该芯片系列的定义。芯片型号和系列的命名格式如下表所示。 + +| 宏定义 | 意义 | 格式 | +| ------------------ | -------- | ------------------ | +| SOC_R7FA6M4AF | 芯片型号 | SOC_R7FAxxxxx | +| SOC_SERIES_R7FA6M4 | 芯片系列 | SOC_SERIES_R7FAxxx | + +关于 BSP 上的外设支持选项，一个初次提交的 BSP 仅仅需要支持 GPIO 驱动和串口驱动即可，因此在配置选项中只需保留这两个驱动配置项，如下图所示： + +![修改 Kconfig](./figures/Kconfig.png) + +### 3.5 修改工程构建和配置文件 +接下来需要修改用于构建工程相关的文件。 + +- 修改启动文件 startup.c + +> 源文件路径：**ra6m4-cpk\ra\fsp\src\bsp\cmsis\Device\RENESAS\Source\startup.c** + +```c +#ifdef __ARMCC_VERSION + main(); +#elif defined(__GNUC__) + extern int entry(void); + entry(); +#endif +``` + +![img](figures/startup_c.png) + +- 修改 SRAM 大小配置 + +![image-20220303113833249](figures/board_config.png) + +- 修改 GPIO 中断配置 + +根据 BSP 使用芯片支持的 IRQ 中断情况修改配置文件。可以使用 FSP 配置工具对照查看 IO 引脚号对应的 IRQ 通道。 + +![image-20220217174433724](figures/bsp_gpio.png) + +- 修改初始应用层代码 + +在 RA 系列的 BSP 中，应用层代码存放在 `src/hal_entry.c` 中。使用 FSP 生成的默认应用代码需要全部替换为如下代码，如果开发板没有板载 LED 可以将 `while(1)` 中的代码删除。 + +```c +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-10 Sherman first version + */ + +#include +#include "hal_data.h" +#include + +#define LED_PIN BSP_IO_PORT_01_PIN_06 /* Onboard LED pins */ + +void hal_entry(void) +{ + rt_kprintf("\nHello RT-Thread!\n"); + + while (1) + { + rt_pin_write(LED_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED_PIN, PIN_LOW); + rt_thread_mdelay(500); + } +} +``` + + + +### 3.6 重新生成工程 + +重新生成工程需要使用 Env 工具。 + +- 重新生成 rtconfig.h 文件 + +在 Env 界面输入命令 menuconfig 对工程进行配置，并生成新的 rtconfig.h 文件。如下图所示： + +![输入menuconfig进入配置界面](./figures/menuconfig_1.png) + +打开 GPIO 和 console 使用的 UART 端口。 + +![选择要打开的外设](./figures/menuconfig_2.png) + +修改 console 输出使用的设备名称。 + +![image-20220303103240414](figures/menuconfig2.png) + +- 生成 MDK 应用工程 +下面以重新生成 MDK 工程为例，介绍如何重新生成 BSP 工程。 + +使用 env 工具输入命令 `scons --target=mdk5` 重新生成工程，如下图所示： + +![重新生成 BSP 工程](./figures/menuconfig_3.png) + +重新生成工程成功： + +![重新生成 BSP 工程](./figures/menuconfig_4.png) + +到这一步，基于 MDK 开发的 BSP 就可以使用了。如果要使用 GCC 工具链编译还需加入 GCC 格式的链接脚本。 + +### 3.7 添加 GCC 格式链接脚本 + +GCC 格式的链接脚本需要使用到瑞萨的 IDE 工具 e2studio。在 e2studio 中创建新的工程，步骤如下： + +![image-20220218114041568](figures/e2studio1.png) + +![image-20220218113955219](figures/e2studio.png) + +![image-20220218114633339](figures/e2studio2.png) + +![image-20220218114839257](figures/e2studio3.png) + +![image-20220218115035562](figures/e2studio4.png) + +![image-20220218115332866](figures/e2studio5.png) + +工程创建完成后，我们需要将工程中的两个 xxx.ld 文件 copy 到 BSP 中的 script 目录下。 + +![image-20220218115715957](figures/e2studio6.png) + +- 修改链接脚本 + +> 链接脚本文件路径：**ra6m4-cpk\script\fsp.ld** + +![image-20220215182642126](figures/linkscript1.png) + +> 将下面的代码复制到 text 段中，**注意要添加到 text{ } 括号内** + +```shell +/* section information for finsh shell */ +. = ALIGN(4); +__fsymtab_start = .; +KEEP(*(FSymTab)) +__fsymtab_end = .; + +. = ALIGN(4); +__vsymtab_start = .; +KEEP(*(VSymTab)) +__vsymtab_end = .; + +/* section information for initial. */ +. = ALIGN(4); +__rt_init_start = .; +KEEP(*(SORT(.rti_fn*))) +__rt_init_end = .; + +. = ALIGN(4); +KEEP(*(FalPartTable)) +``` + +> 添加后如下图所示： + +![img](figures/linkscript.png) + +### 3.8 修改 rtconfig.py 中的编译参数 + +![image-20220303165348085](figures/rtconfig_py.png) + +除了上图的内核类型，还有编译参数的配置需要确认。相关配置项说明可查看文档中心对于 scons 工具的介绍。[跳转链接](https://www.rt-thread.org/document/site/#/development-tools/scons/scons?id=编译器选项) + + + +至此，一个基础的支持 GCC 和 MDK 的 BSP 工程就创建完成了，接着就可以使用 MDK 或 scons 验证开发的工程是否可编译、可运行。 + +感谢每一位贡献代码的开发者，RT-Thread 将与你一同成长。 + +## 4. 规范 + +本章节介绍 RT-Thread RA 系列 BSP 制作与提交时应当遵守的规范 。开发人员在 BSP 制作完成后，可以根据本规范提出的检查点对制作的 BSP 进行检查，确保 BSP 在提交前有较高的质量 。 + +### 4.1 BSP 制作规范 + +RA 的制作规范主要分为 3 个方面：工程配置，ENV 配置和 IDE 配置。在已有的 RA 系列 BSP 的模板中，已经根据下列规范对模板进行配置。在制作新 BSP 的过程中，拷贝模板进行修改时，需要注意的是不要修改这些默认的配置。BSP 制作完成后，需要对新制作的 BSP 进行功能测试，功能正常后再进行代码提交。 + +下面将详细介绍 BSP 的制作规范。 + +#### 4.1.1 工程配置 + +- 遵从RT-Thread 编码规范，代码注释风格统一 +- main 函数功能保持一致 + - 如果有 LED 的话，main 函数里**只放一个** LED 1HZ 闪烁的程序 +- 在 `rt_hw_board_init` 中需要完成堆的初始化：调用 `rt_system_heap_init` +- 默认只初始化 GPIO 驱动和 FinSH 对应的串口驱动，不使用 DMA +- 当使能板载外设驱动时，应做到不需要修改代码就能编译下载使用 +- 提交前应检查 GCC、MDK 编译器直接编译或者重新生成后编译是否成功 +- 使用 `scons --dist` 命令对 BSP 进行发布，检查使用 `dist` 命令生成的工程是否可以正常使用 + +#### 4.1.2 ENV 配置 + +- 系统心跳统一设置为 1000（宏：RT_TICK_PER_SECOND） +- BSP 中需要打开调试选项中的断言（宏：RT_DEBUG） +- 系统空闲线程栈大小统一设置为 256（宏：IDLE_THREAD_STACK_SIZE） +- 开启组件自动初始化（宏：RT_USING_COMPONENTS_INIT） +- 需要开启 user main 选项（宏：RT_USING_USER_MAIN） +- 默认关闭 libc（宏：RT_USING_LIBC） +- FinSH 默认只使用 MSH 模式（宏：FINSH_USING_MSH_ONLY） + +#### 4.1.3 IDE 配置 + +- 使能下载代码后自动运行 +- 使能 C99 支持 +- 使能 One ELF Section per Function（MDK） +- MDK/IAR 生成的临时文件分别放到build下的 MDK/IAR 文件夹下 +- MDK/GCC/IAR 生成 hex 文件名字统一成 rtthread.hex + +### 4.2 BSP 提交规范 + +- 提交前请认真修改 BSP 的 README.md 文件，README.md 文件的外设支持表单只填写 BSP 支持的外设，可参考其他 BSP 填写。查看文档[《RA系列驱动介绍》](./RA系列驱动介绍.md)了解驱动分类。 +- 提交 BSP 分为 2 个阶段提交： + - 第一阶段：基础 BSP 包括串口驱动和 GPIO 驱动，能运行 FinSH 控制台。完成 MDK5 、IAR 和 GCC 编译器支持，如果芯片不支持某款编译器（比如MDK4）可以不用做。 BSP 的 README.md 文件需要填写第二阶段要完成的驱动。 + - 第二阶段：完成板载外设驱动支持，所有板载外设使用 menuconfig 配置后就能直接使用。若开发板没有板载外设，则此阶段可以不用完成。不同的驱动要分开提交，方便 review 和合并。 +- 只提交 BSP 必要的文件，删除无关的中间文件，能够提交的文件请对照其他 BSP。 +- 提交前要对 BSP 进行编译测试，确保在不同编译器下编译正常 +- 提交前要对 BSP 进行功能测试，确保 BSP 的在提交前符合工程配置章节中的要求 diff --git "a/bsp/renesas/docs/RA\347\263\273\345\210\227BSP\345\244\226\350\256\276\351\251\261\345\212\250\344\275\277\347\224\250\346\225\231\347\250\213.md" "b/bsp/renesas/docs/RA\347\263\273\345\210\227BSP\345\244\226\350\256\276\351\251\261\345\212\250\344\275\277\347\224\250\346\225\231\347\250\213.md" new file mode 100644 index 0000000000..35f218a862 --- /dev/null +++ "b/bsp/renesas/docs/RA\347\263\273\345\210\227BSP\345\244\226\350\256\276\351\251\261\345\212\250\344\275\277\347\224\250\346\225\231\347\250\213.md" @@ -0,0 +1,93 @@ +# RA系列BSP外设驱动使用教程 + +## 1. 简介 + +本文档是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + +主要包括以下内容： + +1. 如何使用开发板上更多的板载资源 +2. 如何使用更多的片上资源 +3. 如何添加更多片上资源选项 + +## 2. 前提要求 + +- 学会如何使用 ENV 工具，参考：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/programming-manual/env/env/) +- 熟悉 [FSP](https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp) 配置工具的使用 + +## 3. 如何使用更多的外设资源 + +开发板上一般有很多外设资源，如 SPI、SDIO、ADC 等，但是 BSP 工程默认没有开启这些外设驱动。RT-Thread 提供了 ENV 工具来开启或关闭 BSP 的外设驱动。本文以 RA6M4-CPK 开发板上开启 SPI 驱动为例，一步步地展示如何使用 ENV 工具对 BSP 进行配置。 + +### 3.1 打开配置工具 + +在 BSP 目录下打开 menuconfig 配置界面。 + +![image-20220218162910778](figures/menuconfig_ra6m4cpk.png) + +打开的配置工具界面如下所示： + ![config1](figures/config1.png) + +通过键盘上的上下键移动光标，选中 `Hardware Drivers Config`然后按回车键进入硬件驱动配置菜单。 + +### 3.2 进入硬件驱动配置菜单 + +在硬件配置菜单里有三个选项，分别是 **板载外设配置菜单**、**片上外设配置菜单**和**扩展模块配置菜单**，使用下键切换到片上外设，按回车键进入配置菜单。 + +![硬件驱动配置菜单](figures/config2.png) + +### 3.3 在板载外设配置菜单里开启 SPI Flash 选项 + +![image-20220218163357420](figures/menuconfig_spi.png) + +![image-20220218163714429](figures/menuconfig_spi1.png) + + + +### 3.4 保存退出 + +然后右移光标选中 Save 按回车键保存，然后按 Esc 键退出配置工具。 + +![保存退出](figures/save.png) + + + +### 3.5 生成 MDK5 工程 + +输入命令 `scons --target=mdk5` 重新生成 MDK5 的工程。 + +![image-20220218164532436](figures/scons_mdk5.png) + +### 3.6 FSP 添加 SPI 外设 + +![image-20220218171841353](figures/fsp_spi.png) + +![image-20220218172446068](figures/fsp_spi1.png) + +在 Pins 中配置 SPI1 端口引脚。**注意： SSLx 片选引脚设为 None，片选引脚的控制在驱动程序中由软件控制。** + +配置完成，保存退出 FSP。 + +![image-20220218174145848](figures/fsp_spi2.png) + +### 3.7 测试验证 + +回到生成的 MDK5 工程并编译。使用 FSP 配置完成后如果有新的文件添加进工程中，不会马上添加进去。需要先编译一次，如果弹出如下提醒，选择 “是” 然后再次编译即可。 + +![image-20220218174811328](figures/mdk_build.png) + +编译成功后，点击 debug 按钮下载并进入调试页面。 + +![image-20220218175442360](figures/mdk_build1.png) + +### 3.8 查看运行结果 + +程序运行后，输入命令 `list_device` 可以看到名为 spi1 的总线设备，此时 SPI1 总线已经可以使用了。 + +![image-20220218175926965](figures/run_spi1.png) + +## 4. 总结 + +本文以 SPI 为例介绍了外设驱动使用的操作流程，其他类型的外设如何使用和配置请查看：[RA系列使用FSP配置外设驱动.md](RA系列使用FSP配置外设驱动.md) + +当开发者需要使用未开启的外设时，只要在 ENV 工具中使能相关的外设，然后在 FSP 中添加即可，重新生成的工程中就会添加对应的驱动文件。 \ No newline at end of file diff --git "a/bsp/renesas/docs/RA\347\263\273\345\210\227\344\275\277\347\224\250FSP\351\205\215\347\275\256\345\244\226\350\256\276\351\251\261\345\212\250.md" "b/bsp/renesas/docs/RA\347\263\273\345\210\227\344\275\277\347\224\250FSP\351\205\215\347\275\256\345\244\226\350\256\276\351\251\261\345\212\250.md" new file mode 100644 index 0000000000..5e4ef2ebae --- /dev/null +++ "b/bsp/renesas/docs/RA\347\263\273\345\210\227\344\275\277\347\224\250FSP\351\205\215\347\275\256\345\244\226\350\256\276\351\251\261\345\212\250.md" @@ -0,0 +1,324 @@ +# RA系列使用 FSP 配置外设驱动 + +## 1. 准备工作 + +### 1.1 在 MDK 中添加用于启动FSP的自定义命令 + +1. 打开 MDK，选择 “Tools -> Customize Tools Menu…” +2. 点击 “new” 图标，添加一条自定义命令: RA Smart Configurator +3. Command 输入工具的安装路径， 点击“**…**”找到安装路径下的“rasc.exe”文件并选中 (rasc 安装目录下) +4. Initial Folder 输入参数: $P +5. Arguments 输入参数: --device $D --compiler ARMv6 configuration.xml +6. 点击 OK 保存命令 + +![img](figures/customize.png) + +7. 点击添加的命令 “Tools -> RA smart Configurator”，**打开配置工具**：RA Smart Config + +![image.png](figures/openrasc.png) + +PS：以上相关操作也可以在 FSP 的说明文档中找到。 + +FSP 文档：https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp#document + +### 1.2 注意事项 + +#### 1.2.1 FSP 版本选择 + +RA系列已更新 **FSP 3.5.0** 版本的支持，请使用 **FSP 3.5.0** 版本进行配置修改，**旧版本可能存在兼容性问题**。 + +**使用 RASC 前请务必检查 FSP version 、Board、Device 配置项是否正确。** + +![fsp_version](figures/fsp_version.png) + +#### 1.2.2 更新工程配置 + +使用 FSP 配置完成后如果有新的文件添加进工程中，不会马上添加进去。需要先编译一次，如果弹出如下提醒，选择 “是” 然后再次编译即可。 + +![img](figures/import_changes.png) + +## 2. 使用 FSP 添加并配置外设 + +**PS：文档中的外设添加步骤均为单独配置的说明，排版顺序不代表外设添加顺序，如遇到引脚冲突请查阅开发板及芯片手册的相关章节。** + +### UART + +如何添加一个 UART 端口外设配置？ + +1. 选择 Stacks 配置页，点击 New Stack 找到 UART。 +![image.png](figures/fsp_uart.png) + +2. 配置 UART 参数，因为需要适配 RT-Thread 驱动中使用的命名，所以需要修改命名，设置**name** 、**channel** 、**callback** 为一致的标号。 +![image.png](figures/fsp_uart1.png) + +### GPIO 中断 + +如何添加一个 IO 中断？ + +1. 选择引脚编号，进入配置，比如选择 P105 做为中断引脚。可先找到引脚查看可配置成的 IRQx 通道号。 + +![image-20211103200949759](figures/p105.png) + +2. 打开 ICU 中断通道 IRQ00 + +![image-20211103200813467](figures/irq0.png) + +3. 创建 stack 并进入配置。因为需要适配 RT-Thread 驱动中使用的命名，所以需要修改命名，设置 **name** 、**channel** 、**callback** 为一致的标号。选择你希望的触发方式，最后保存配置，生成配置代码。 + +![](figures/1635929089445.png) + +![image-20211103201047103](figures/irq1.png) + +4. 测试中断是否成功开启 + + ```c + #define IRQ_TEST_PIN "p105" + void irq_callback_test(void *args) + { + rt_kprintf("\n IRQ00 triggered \n"); + } + + void icu_sample(void) + { + /* init */ + rt_uint32_t pin = rt_pin_get(IRQ_TEST_PIN); + rt_kprintf("\n pin number : 0x%04X \n", pin); + rt_err_t err = rt_pin_attach_irq(pin, PIN_IRQ_MODE_RISING, irq_callback_test, RT_NULL); + if(RT_EOK != err) + { + rt_kprintf("\n attach irq failed. \n"); + } + err = rt_pin_irq_enable(pin, PIN_IRQ_ENABLE); + if(RT_EOK != err) + { + rt_kprintf("\n enable irq failed. \n"); + } + } + MSH_CMD_EXPORT(icu_sample, icu sample); + ``` + +### WDT + +1. 创建 WDT + +![image-20211019152302939](figures/wdt.png) + +2. 配置 WDT，需要注意在 RT-Thread 中只使用了一个 WDT 设备，所以没有对其进行编号，如果是新创建的 WDT 设备需要注意 name 字段，在驱动中默认使用的是`g_wdt` 。 + +![image-20211019152407572](figures/wdt_config.png) + +3. 如何在 ENV 中打开 WDT 以及[WDT 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/watchdog/watchdog) + +![image-20211027183406251](figures/wdt_env.png) + +### RTC + +1. 添加 RTC 设备 + +![image-20211019152536749](figures/rtc.png) + +2. 配置 RTC，需要注意在 RT-Thread 中只是用了一个 RTC 设备，所以没有对其进行编号，如果是新创建的 RTC 设备需要注意 name 字段，在驱动中默认使用的是`g_rtc` 。修改 Callback 为 rtc_callback + +![image-20211019152627412](figures/rtc_config.png) + +3. 如何在 ENV 中打开 RTC 以及[ RTC 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/rtc/rtc) + +![image-20211027181550233](figures/rtc_env.png) + +### Flash + +1. 创建 Flash + +![image-20211026105031200](figures/add_flash.png) + +2. 配置 Flash，需要注意在 RT-Thread 中只使用了一个 flash 设备，所以没有对其进行编号，如果是新创建的 flash 设备需要注意 name 字段，在驱动中默认使用的是`g_flash` 。 + +![image-20211026105628706](figures/config_flash.png) + +3. 如何在 ENV 中打开 Flash + +![image-20211026123252310](figures/flash_menuconfig.png) + +### SPI + +1. 添加一个 SPI 外设端口 + +![image-20211027180820968](figures/spi_add.png) + +2. 配置 channel、name、Clock Phase、Clock Polarity、Callback、 SPI Mode 等参数，波特率在代码中可通过 API 修改，这里可以设置一个默认值。 + +![img](figures/fsp_spi1.png) + +3. 在 Pins 中打开 SPI1 ，配置端口引脚。**注意：请勿在此处配置 SSLx 片选引脚，片选引脚的控制在驱动程序中由软件控制。** + +![image-20211209162334093](figures/fsp_spi2.png) + + +4. 如何在 ENV 中打开 SPI 以及 [SPI 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/spi/spi) + + ![image-20211027181444023](figures/spi_env.png) + +### ADC/DAC + +创建 ADC/DAC + +![img](figures/adc_dac.png) + +- **ADC** + +1. 配置 name、unit、mode，选择扫描的通道编号 + +![img](figures/adc_config.png) + +2. 配置扫描通道对应的引脚 + +![img](figures/adc_config1.png) + +3. 在 menuconfig 中打开对应的通道 + +- **DAC** + +1. 需要先关闭 P014 的默认 mode + +![img](figures/dac_config0.png) + +2. 开启 DAC0 通道 + +![img](figures/dac_config1.png) + +3. 修改通道号为 0，与 DAC0 对应 + +![img](figures/dac_config2.png) + +4. 在 menuconfig 中打开对应的通道 + +### PWM（GPT） + +GPT 定时器在该芯片中可作为通用定时器，也可以用于产生 PWM 信号。在将其用于产生 PWM 信号时，GPT 定时器提供了 gpt0 - gpt9 总共 10 个通道，每个通道可以设定两个输出端口。当前版本的 PWM 驱动将每个通道都看做一个单独的 PWM 设备，每个设备都只有一个通道。用户可以选择开启一个通道的任意一个输出端口，或将两个端口均开启，但在同时开启两个端口的情况下，它们输出的波形将完全一致。 + +1. 添加 GPT 设备 + +![img](./figures/add_gpt1.png) + +2. 配置通道 + +![img](./figures/add_gpt2.png) + + 对 GPT 较为关键的配置如图所示，具体解释如下： + + 1. 将``Common`` ->``Pin Output Support`` 设置为 Enable ，以开启 PWM 波形的输出。 + 2. 指定 GPT 通道，并根据通道数指定 GPT 的名称，例如此处指定 GPT 通道 3 ，所以 GPT 的名称必须为``g_timer3``。并且将定时器模式设置为 PWM ，并指定每个 PWM 周期的计数值。 + 3. 设定 PWM 通道默认输出的占空比，这里为 50% 。 + 4. 设定 GPT 通道下两个输出端口的使能状态。 + 5. 此处设置 GPT 通道下两个输出端口各自对应的引脚。 +3. 配置输出引脚 + +![img](./figures/add_gpt3.png) + + 在完成上一步对 GPT 定时器的设置后，根据图示找到对应 GPT 通道输出引脚设置的界面（这里是 GPT3），将图中标号 **1** 处设置为 ``GTIOCA or GTIOCB`` ，并根据需要在图中标号 **2** 处设置 GPT 通道下两个输出端口各自对应的输出引脚。 + + 4. 在 menuconfig 中打开对应的通道，[RT-Thread 的 pwm 框架介绍](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/pwm/pwm) + +![image-20211103202216381](figures/pwm_env.png) + +### CAN + +1. 添加CAN + +![image-20211102145023112](figures/can.png) + +2. 配置Callback为 `can0_callback` 或 `can1_callback` + +![image-20211102145227603](figures/can_callback.png) + +3. 配置其他选项，并生成代码。 + +4. 使用ENV使能CAN。[CAN设备使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/can/can) + +![image-20211102145613309](figures/can_menuconfig.png) + +### SDHI + +1. 添加sdhi驱动 + +![添加sdhi驱动](figures/sdhi_config.png) + +1. 添加DMAC + +![添加DMAC](figures/dmac_config.png) + +2. 设置DMAC中断 + +![设置DMAC中断](figures/dmac_int.png) + +3. 设置SDHI中断和引脚 + +![设置SDHI](figures/sdhi_config1.png) + +4. 在ENV中打开SDHI + +![打开SDHI](figures/sdhi_env.png) + +5. 在ENV中配置DFS，添加文件系统，如FatFS + +![配置DFS](figures/sdhi_dfs.png) + +6. 在命令行中，使用 `mkfs sd0 -t elm` 格式化sd卡 + +7. 在命令行中，使用 `mount sd0 / elm` 将sd0挂载到 `/` + +8. 参考RT-Thread DFS使用手册[虚拟文件系统 (rt-thread.org)](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/filesystem/filesystem) + +### WiFi 模块: [RW007 ](https://github.com/RT-Thread-packages/rw007) + +1. 软件包配置中找到 RW007，并修改为下图配置。 + +![image-20211108142805319](figures/rw007_pkg.png) + +2. menuconfig 中打开驱动的 RW007 配置，默认使用了 SPI1 端口。所以需要打开 SPI1 总线。 + +![image-20211108142453678](figures/rw007_spi.png) + +![image-20211213212034701](figures/drv_rw007.png) + +3. 在设备驱动框架中打开 [WLAN 框架](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/wlan/wlan)， + +![image-20211108143027485](figures/rw007_wlan.png) + +在网络配置中打开 NETDEV 组件： + +![image-20211108143712513](figures/rw007_netdev.png) + +在 kernel 中打开 mempool 配置： + +![image-20211209161902884](figures/rw007_mempool.png) + +4. FSP 中打开添加 SPI 外设端口，[如何添加SPI](#SPI)。下图以 SPI1 端口为例的配置如下： + +![image-20211108183631379](figures/fsp_spi1.png) + +5. RW007 有一个从机控制的 INT 引脚，需要占用一个 IRQ 通道，下图以 P506 为例的配置如下： + +![image-20211108183724282](figures/rw007_int.png) + +6. RW007 的 RESET 控制引脚修改默认配置，这里在 RASC 中 mode 设为关闭，交由 RW007 中进行控制。 + +![image-20211213144108558](figures/rw007_reset.png) + +7. 配置完成，检查 MDK 工程中是否加入了必要的文件 + +![image-20211109102232233](figures/rw007_mdk.png) + +8. 编译下载，验证结果。 + +系统启动会自动获取 RW007 的信息，输入`wifi scan` 命令扫描环境中的 WiFi 信号。[更多 WiFi 命令](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/wlan/wlan?id=finsh-%e5%91%bd%e4%bb%a4) + +![image-20211109103856130](figures/rw007_test.png) + +使用 `WiFi join` 命令连接 WiFi 热点 ： + +![image-20211109104735733](figures/rw007_wifijoin.png) + +使用 `ping rt-thread.com` 测试网络连接： + +![image-20211109104700939](figures/rw007_ping.png) \ No newline at end of file diff --git "a/bsp/renesas/docs/RA\347\263\273\345\210\227\345\244\226\350\256\276\351\251\261\345\212\250\346\267\273\345\212\240\346\214\207\345\215\227.md" "b/bsp/renesas/docs/RA\347\263\273\345\210\227\345\244\226\350\256\276\351\251\261\345\212\250\346\267\273\345\212\240\346\214\207\345\215\227.md" new file mode 100644 index 0000000000..b5fb0da716 --- /dev/null +++ "b/bsp/renesas/docs/RA\347\263\273\345\210\227\345\244\226\350\256\276\351\251\261\345\212\250\346\267\273\345\212\240\346\214\207\345\215\227.md" @@ -0,0 +1,63 @@ +# RA 系列外设驱动添加指南 + +## 1. 简介 + +本文档是为需要给现有的 RA 系列 BSP 添加更多外设驱动的开发者准备的。通过阅读本文，开发者可以按照自己的实际情况给现有 BSP 添加自己需要的驱动。 + +## 2. 前提要求 + +- 熟练使用 ENV 工具，参考：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/rtthread-development-guide/rtthread-tool-manual/env/env-user-manual/) +- 熟悉 [Kconfig](https://www.rt-thread.org/document/site/#/development-tools/kconfig/kconfig) 语法 +- 熟悉 [FSP](https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp) 工具 +- 了解 RT-Thread [设备驱动框架](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/device) + +## 3. 如何添加更多的外设驱动选项 + +本章节以添加片上外设驱动为例，讲解如何为 BSP 添加更多可用驱动。如果想使用的片上外设是 `片上外设配置菜单` 里没有的，就需要开发者自己添加了。下面我们将演示如何为 ra6m4-cpk 添加 UART9 端口。 + +添加 UART 的外设支持需要以下步骤： + +### 3.1 修改 Kconfig 文件 + +打开 BSP 中的 board\kconfig 文件，添加 UART9 配置。 + +![image-20220221161853343](figures/add_uart.png) + +![image-20220221163152761](figures/add_uart1.png) + +修改完成后，在 BSP 目录下打开 ENV 工具，命令行输入 `menuconfig` 命令查看 UART9 配置是否已添加。 + +![image-20220221164229974](figures/add_uart2.png) + +### 3.2 修改 uart_config.h 文件 + +Kconfig 的配置添加完成，还需要在配置文件和驱动文件中添加相应的配置。 + +打开 `libraries\HAL_Drivers\config\ra6m4\uart_config.h` 文件添加 UART9 配置。 + +![image-20220221170945734](figures/add_uart3.png) + +### 3.3 修改 drv_usart_v2.h 文件 + +打开 `libraries\HAL_Drivers\drv_usart_v2.c`，添加如下代码： + +![image-20220221171806580](figures/add_uart4.png) + +![image-20220221172034531](figures/add_uart5.png) + +### 3.4 测试验证 + +1. 在 menuconfig 中打开 UART9 并保存配置，使用 `scons --target=mdk5` 命令重新生成 MDK 工程。 +2. 从 project 工程中打开 FSP 配置工具，添加 UART9 端口 + +![image-20220221180942314](figures/add_uart6.png) + +![image-20220221183752087](figures/add_uart8.png) + +3. 配置 UART9 对应的 IO 引脚，保存并退出。 + +![image-20220221183405828](figures/add_uart7.png) + +4. 编译、debug 下载，输入 list_device 命令可以看到 uart9 设备已经注册到内核，说明设备添加成功，接下来就可以使用 UART9 端口进行通信了。 + +![image-20220221185534932](figures/add_uart9.png) diff --git "a/bsp/renesas/docs/RA\347\263\273\345\210\227\351\251\261\345\212\250\344\273\213\347\273\215.md" "b/bsp/renesas/docs/RA\347\263\273\345\210\227\351\251\261\345\212\250\344\273\213\347\273\215.md" new file mode 100644 index 0000000000..b125bf0c94 --- /dev/null +++ "b/bsp/renesas/docs/RA\347\263\273\345\210\227\351\251\261\345\212\250\344\273\213\347\273\215.md" @@ -0,0 +1,62 @@ +# RA系列驱动介绍 + +在 RT-Thread 实时操作系统中，各种各样的设备驱动是通过一套 I/O 设备管理框架来管理的。设备管理框架给上层应用提供了一套标准的设备操作 API，开发者通过调用这些标准设备操作 API，可以高效地完成和底层硬件外设的交互。设备管理框架的结构如下图所示： + +![image-20220308143402996](figures/rtdevice.png) + +使用 I/O 设备管理框架开发应用程序，有如下优点： + +- 使用同一套标准的 API 开发应用程序，使应用程序具有更好的移植性 +- 底层驱动的升级和修改不会影响到上层代码 +- 驱动和应用程序相互独立，方便多个开发者协同开发 + +## 1. 驱动分类介绍 + +本小节介绍 BSP 提供的不同类别驱动的概念，对一个 BSP 而言，有如下三类驱动： + +- **板载外设驱动**(Onboard Peripheral Drivers)：指 MCU 之外，开发板上外设，例如 TF 卡、以太网等 +- **片上外设驱动**(On-chip Peripheral Drivers)：指 MCU 芯片上的外设，例如硬件定时器、ADC 和看门狗等 +- **扩展模块驱动**(Board extended module Drivers)：指可以通过扩展接口或者杜邦线连接的开发板的模块，例如 RW007 模块 + +这三种外设的示意图如下所示： + +![Peripheral](figures/Peripheral.png) + +## 2. 外设驱动的使用方法 + +当前 RT-Thread 提供的驱动库已经支持 RA 多个系列的 BSP。点击下表中的驱动名称，即可跳转到对应驱动框架的介绍文档。开发者可以通过阅读相关资料，了解如何在应用开发中通过设备驱动框架来使用这些外设驱动。 + +### 2.1 片上外设 + +| 驱动 | 简介 | +| ------------------------------------------------------------ | ------------------------------------------------ | +| [GPIO](https://www.rt-thread.org/document/site/programming-manual/device/pin/pin/) | 操作 GPIO 管脚 | +| [UART](https://www.rt-thread.org/document/site/programming-manual/device/uart/uart/) | 通过串口收发数据 | +| [I2C](https://www.rt-thread.org/document/site/programming-manual/device/i2c/i2c/) | 通过软件 I2C 收发数据 | +| [SPI](https://www.rt-thread.org/document/site/programming-manual/device/spi/spi/) | 通过 SPI 收发数据 | +| [ADC](https://www.rt-thread.org/document/site/programming-manual/device/adc/adc/) | 测量管脚上的模拟量 | +| SDIO | 通过 SDIO 读写数据 | +| [TIMER](https://www.rt-thread.org/document/site/programming-manual/device/hwtimer/hwtimer/) | 使用硬件定时器实现测量时间和定时执行回调函数功能 | +| [PWM](https://www.rt-thread.org/document/site/programming-manual/device/pwm/pwm/) | 在特定的管脚输出 PWM 波形 | +| [RTC](https://www.rt-thread.org/document/site/programming-manual/device/rtc/rtc/) | 设置和读取时间 | +| [WDT](https://www.rt-thread.org/document/site/programming-manual/device/watchdog/watchdog/) | 看门狗驱动 | +| [QSPI](https://www.rt-thread.org/document/site/programming-manual/device/spi/spi/#qspi_1) | 通过 SPI（1、2、4线） 收发数据 | + +### 2.2 板载外设 + +| 驱动 | 简介 | +| ------- | --------------------------------------- | +| I2C | 板载 I2C 传感器 | +| SDIO | 适用于 SPI 接口或 SDIO 接口的 SD(TF) 卡 | + +### 2.3 扩展模块 + +| 驱动 | 简介 | +| -------- | ---------------------- | +| [RW007](https://github.com/RT-Thread-packages/rw007) | SPI 接口 WIFI 模块 | +| [HS300x](https://github.com/Guozhanxin/hs300x) | I2C 接口的温湿度传感器 | +| [ZMOD4410](https://github.com/ShermanShao/zmod4410) | I2C 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bsp-template \ No newline at end of file diff --git a/bsp/renesas/libraries/HAL_Drivers/Kconfig b/bsp/renesas/libraries/HAL_Drivers/Kconfig new file mode 100644 index 0000000000..ab2b1b1bc0 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/Kconfig @@ -0,0 +1,20 @@ +config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + +config BSP_USING_ONCHIP_FLASH + bool "Enable Onchip FLASH" + default n + +config BSP_USING_WDT + bool "Enable Watchdog Timer" + select RT_USING_WDT + default n + +menuconfig BSP_USING_ONCHIP_RTC + bool "Enable RTC" + select RT_USING_RTC + default n + if BSP_USING_ONCHIP_RTC + endif diff --git a/bsp/renesas/libraries/HAL_Drivers/SConscript b/bsp/renesas/libraries/HAL_Drivers/SConscript new file mode 100644 index 0000000000..ee97c6f0d3 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/SConscript @@ -0,0 +1,58 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = GetCurrentDir() + +# add the general drivers. +src = Split(""" + drv_common.c +""") + +if GetDepend(['BSP_USING_UART']): + if GetDepend(['RT_USING_SERIAL_V2']): + src += ['drv_usart_v2.c'] + else: + print("\nThe current project does not support serial-v1\n") + Return('group') + +if GetDepend(['BSP_USING_GPIO']): + src += ['drv_gpio.c'] + +if GetDepend(['BSP_USING_WDT']): + src += ['drv_wdt.c'] + +if GetDepend(['BSP_USING_ONCHIP_RTC']): + src += ['drv_rtc.c'] + +if GetDepend(['BSP_USING_I2C', 'RT_USING_I2C_BITOPS']): + if GetDepend('BSP_USING_I2C0') or GetDepend('BSP_USING_I2C1'): + src += ['drv_soft_i2c.c'] + +if GetDepend(['BSP_USING_SPI']): + src += ['drv_spi.c'] + +if GetDepend(['BSP_USING_ADC']): + src += ['drv_adc.c'] + +if GetDepend(['BSP_USING_DAC']): + src += ['drv_dac.c'] + +if GetDepend(['BSP_USING_ONCHIP_FLASH']): + src += ['drv_flash.c'] + +if GetDepend(['BSP_USING_PWM']): + src += ['drv_pwm.c'] + +if GetDepend(['BSP_USING_CAN']): + src += ['drv_can.c'] + +if GetDepend(['BSP_USING_SDHI']): + src += ['drv_sdhi.c'] + +path = [cwd] +path += [cwd + '/config'] + +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path) + +Return('group') diff --git a/bsp/renesas/libraries/HAL_Drivers/config/drv_config.h b/bsp/renesas/libraries/HAL_Drivers/config/drv_config.h new file mode 100644 index 0000000000..04fd03c07a --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/config/drv_config.h @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-07-29 KyleChan first version + */ + +#ifndef __DRV_CONFIG_H__ +#define __DRV_CONFIG_H__ + +#include "board.h" +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef SOC_SERIES_R7FA6M4 +#include "ra6m4/uart_config.h" + +#ifdef BSP_USING_ADC +#include "ra6m4/adc_config.h" +#endif + +#ifdef BSP_USING_DAC +#include "ra6m4/dac_config.h" +#endif + +#ifdef BSP_USING_PWM +#include "ra6m4/pwm_config.h" +#endif + +#ifdef BSP_USING_CAN +#include "ra6m4/can_config.h" +#endif +#endif/* SOC_SERIES_R7FA6M4 */ + +#ifdef SOC_SERIES_R7FA2L1 +#include "ra2l1/uart_config.h" + +#ifdef BSP_USING_ADC +#include "ra2l1/adc_config.h" +#endif + +#ifdef BSP_USING_DAC +#include "ra2l1/dac_config.h" +#endif + +#ifdef BSP_USING_PWM +#include "ra2l1/pwm_config.h" +#endif + +#ifdef BSP_USING_CAN +#include "ra2l1/can_config.h" +#endif +#endif/* SOC_SERIES_R7FA2L1 */ + + + + +#ifdef __cplusplus +} +#endif + +#endif/* __DRV_CONFIG_H__ */ diff --git a/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/adc_config.h b/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/adc_config.h new file mode 100644 index 0000000000..4575d4dff1 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/adc_config.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-19 Mr.Tiger first version + */ + +#ifndef __ADC_CONFIG_H__ +#define __ADC_CONFIG_H__ + +#include +#include +#include "hal_data.h" +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1) +struct ra_adc_map +{ + char name; + const adc_cfg_t *g_cfg; + const adc_instance_ctrl_t *g_ctrl; + const adc_channel_cfg_t *g_channel_cfg; +}; + +struct ra_dev +{ + rt_adc_device_t ra_adc_device_t; + struct ra_adc_map *ra_adc_dev; +}; +#endif +#endif + +#ifdef __cplusplus +} +#endif + diff --git a/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/can_config.h b/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/can_config.h new file mode 100644 index 0000000000..8bd3dd5600 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/can_config.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-29 mazhiyuan first version + */ + +#ifndef __CAN_CONFIG_H__ +#define __CAN_CONFIG_H__ + +#include +#include "hal_data.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(BSP_USING_CAN0) +#ifndef CAN0_CONFIG +#define CAN0_CONFIG \ + { \ + .name = "can0", \ + .num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can0, \ + .p_api_ctrl = &g_can0_ctrl, \ + .p_cfg = &g_can0_cfg, \ + } +#endif /* CAN0_CONFIG */ +#endif /* BSP_USING_CAN0 */ + +#if defined(BSP_USING_CAN1) +#ifndef CAN1_CONFIG +#define CAN1_CONFIG \ + { \ + .name = "can1", \ + .num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can1, \ + .p_api_ctrl = &g_can1_ctrl, \ + .p_cfg = &g_can1_cfg, \ + } +#endif /* CAN1_CONFIG */ +#endif /* BSP_USING_CAN1 */ + +#ifdef __cplusplus +} +#endif +#endif diff --git a/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/dac_config.h b/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/dac_config.h new file mode 100644 index 0000000000..0765a8c228 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/dac_config.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-19 Mr.Tiger first version + */ + +#ifndef __DAC_CONFIG_H__ +#define __DAC_CONFIG_H__ + +#include +#include +#include "hal_data.h" +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef BSP_USING_DAC +struct ra_dac_map +{ + char name; + const struct st_dac_cfg *g_cfg; + const struct st_dac_instance_ctrl *g_ctrl; +}; + +struct ra_dac_dev +{ + rt_dac_device_t ra_dac_device_t; + struct ra_dac_map *ra_dac_map_dev; +}; +#endif + +#endif + +#ifdef __cplusplus +} +#endif + diff --git a/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/pwm_config.h b/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/pwm_config.h new file mode 100644 index 0000000000..9dd5f01e54 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/pwm_config.h @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-26 KevinXu first version + */ +#ifndef __PWM_CONFIG_H__ +#define __PWM_CONFIG_H__ + +#include +#include +#include "hal_data.h" + +#ifdef __cplusplus +extern "C" { +#endif + +enum +{ +#ifdef BSP_USING_PWM0 + BSP_PWM0_INDEX, +#endif +#ifdef BSP_USING_PWM1 + BSP_PWM1_INDEX, +#endif +#ifdef BSP_USING_PWM2 + BSP_PWM2_INDEX, +#endif +#ifdef BSP_USING_PWM3 + BSP_PWM3_INDEX, +#endif +#ifdef BSP_USING_PWM4 + BSP_PWM4_INDEX, +#endif +#ifdef BSP_USING_PWM5 + BSP_PWM5_INDEX, +#endif +#ifdef BSP_USING_PWM6 + BSP_PWM6_INDEX, +#endif +#ifdef BSP_USING_PWM7 + BSP_PWM7_INDEX, +#endif +#ifdef BSP_USING_PWM8 + BSP_PWM8_INDEX, +#endif +#ifdef BSP_USING_PWM9 + BSP_PWM9_INDEX, +#endif + BSP_PWMS_NUM +}; + +#define PWM_DRV_INITIALIZER(num) \ + { \ + .name = "pwm"#num , \ + .g_cfg = &g_timer##num##_cfg, \ + .g_ctrl = &g_timer##num##_ctrl, \ + .g_timer = &g_timer##num, \ + } + +#ifdef __cplusplus +} +#endif + +#endif /* __PWM_CONFIG_H__ */ diff --git a/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/uart_config.h b/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/uart_config.h new file mode 100644 index 0000000000..3d6a48bdea --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/config/ra6m4/uart_config.h @@ -0,0 +1,136 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-07-29 KyleChan first version + */ + +#ifndef __UART_CONFIG_H__ +#define __UART_CONFIG_H__ + +#include +#include "hal_data.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(BSP_USING_UART0) +#ifndef UART0_CONFIG +#define UART0_CONFIG \ + { \ + .name = "uart0", \ + .p_api_ctrl = &g_uart0_ctrl, \ + .p_cfg = &g_uart0_cfg, \ + } +#endif /* UART0_CONFIG */ +#endif /* BSP_USING_UART0 */ + +#if defined(BSP_USING_UART1) +#ifndef UART1_CONFIG +#define UART1_CONFIG \ + { \ + .name = "uart1", \ + .p_api_ctrl = &g_uart1_ctrl, \ + .p_cfg = &g_uart1_cfg, \ + } +#endif /* UART1_CONFIG */ +#endif /* BSP_USING_UART1 */ + +#if defined(BSP_USING_UART2) +#ifndef UART2_CONFIG +#define UART2_CONFIG \ + { \ + .name = "uart2", \ + .p_api_ctrl = &g_uart2_ctrl, \ + .p_cfg = &g_uart2_cfg, \ + } +#endif /* UART2_CONFIG */ +#endif /* BSP_USING_UART2 */ + +#if defined(BSP_USING_UART3) +#ifndef UART3_CONFIG +#define UART3_CONFIG \ + { \ + .name = "uart3", \ + .p_api_ctrl = &g_uart3_ctrl, \ + .p_cfg = &g_uart3_cfg, \ + } +#endif /* UART3_CONFIG */ +#endif /* BSP_USING_UART3 */ + +#if defined(BSP_USING_UART4) +#ifndef UART4_CONFIG +#define UART4_CONFIG \ + { \ + .name = "uart4", \ + .p_api_ctrl = &g_uart4_ctrl, \ + .p_cfg = &g_uart4_cfg, \ + } +#endif /* UART4_CONFIG */ +#endif /* BSP_USING_UART4 */ + +#if defined(BSP_USING_UART5) +#ifndef UART5_CONFIG +#define UART5_CONFIG \ + { \ + .name = "uart5", \ + .p_api_ctrl = &g_uart5_ctrl, \ + .p_cfg = &g_uart5_cfg, \ + } +#endif /* UART5_CONFIG */ +#endif /* BSP_USING_UART5 */ + + +#if defined(BSP_USING_UART6) +#ifndef UART6_CONFIG +#define UART6_CONFIG \ + { \ + .name = "uart6", \ + .p_api_ctrl = &g_uart6_ctrl, \ + .p_cfg = &g_uart6_cfg, \ + } +#endif /* UART6_CONFIG */ +#endif /* BSP_USING_UART6 */ + +#if defined(BSP_USING_UART7) +#ifndef UART7_CONFIG +#define UART7_CONFIG \ + { \ + .name = "uart7", \ + .p_api_ctrl = &g_uart7_ctrl, \ + .p_cfg = &g_uart7_cfg, \ + } +#endif /* UART7_CONFIG */ +#endif /* BSP_USING_UART7 */ + +#if defined(BSP_USING_UART8) +#ifndef UART8_CONFIG +#define UART8_CONFIG \ + { \ + .name = "uart8", \ + .p_api_ctrl = &g_uart8_ctrl, \ + .p_cfg = &g_uart8_cfg, \ + } +#endif /* UART8_CONFIG */ +#endif /* BSP_USING_UART8 */ + +#if defined(BSP_USING_UART9) +#ifndef UART9_CONFIG +#define UART9_CONFIG \ + { \ + .name = "uart9", \ + .p_api_ctrl = &g_uart9_ctrl, \ + .p_cfg = &g_uart9_cfg, \ + } +#endif /* UART9_CONFIG */ +#endif /* BSP_USING_UART9 */ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_adc.c b/bsp/renesas/libraries/HAL_Drivers/drv_adc.c new file mode 100644 index 0000000000..9fd734d922 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_adc.c @@ -0,0 +1,132 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-19 Mr.Tiger first version + */ + +#include "drv_config.h" +#ifdef RT_USING_ADC + +// #define DRV_DEBUG +#define DBG_TAG "drv.adc" +#ifdef DRV_DEBUG + #define DBG_LVL DBG_LOG +#else + #define DBG_LVL DBG_INFO +#endif /* DRV_DEBUG */ +#include + +struct ra_adc_map ra_adc[] = +{ +#if defined(BSP_USING_ADC0) + {'0', &g_adc0_cfg, &g_adc0_ctrl, &g_adc0_channel_cfg}, +#endif + +#if defined(BSP_USING_ADC1) + {'1', &g_adc1_cfg, &g_adc1_ctrl, &g_adc1_channel_cfg}, +#endif +}; + +#if defined(BSP_USING_ADC0) +struct rt_adc_device adc0_device; +struct ra_dev _ra_adc0_device = {.ra_adc_device_t = &adc0_device, .ra_adc_dev = &ra_adc[0]}; +#endif + +#if defined(BSP_USING_ADC1) +struct rt_adc_device adc1_device; +struct ra_dev _ra_adc1_device = {.ra_adc_device_t = &adc1_device, .ra_adc_dev = &ra_adc[1]}; +#endif + +static rt_err_t ra_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled) +{ + RT_ASSERT(device != RT_NULL); + struct ra_adc_map *adc = (struct ra_adc_map *)device->parent.user_data; + /**< start adc*/ + if (enabled) + { + if (FSP_SUCCESS != R_ADC_ScanStart((adc_ctrl_t *)adc->g_ctrl)) + { + LOG_E("start adc%c failed.", adc->name); + return -RT_ERROR; + } + } + else + { + /**< stop adc*/ + if (FSP_SUCCESS != R_ADC_ScanStop((adc_ctrl_t *)adc->g_ctrl)) + { + LOG_E("stop adc%c failed.", adc->name); + return -RT_ERROR; + } + } + return RT_EOK; +} + +rt_err_t ra_adc_close(struct rt_adc_device *device) +{ + RT_ASSERT(device != RT_NULL); + struct ra_adc_map *adc = (struct ra_adc_map *)(struct ra_adc_map *)device->parent.user_data; + if (FSP_SUCCESS != R_ADC_Close((adc_ctrl_t *)adc->g_ctrl)) + { + LOG_E("close adc%c failed.", adc->name); + return -RT_ERROR; + } + return RT_EOK; +} + +static rt_err_t ra_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value) +{ + RT_ASSERT(device != RT_NULL); + struct ra_adc_map *adc = (struct ra_adc_map *)device->parent.user_data; + if (RT_EOK != R_ADC_Read32((adc_ctrl_t *)adc->g_ctrl, channel, value)) + { + LOG_E("get adc value failed.\n"); + return -RT_ERROR; + } + return RT_EOK; +} + +static const struct rt_adc_ops ra_adc_ops = +{ + .enabled = ra_adc_enabled, + .convert = ra_get_adc_value, +}; + +static int ra_adc_init(void) +{ +#if defined(BSP_USING_ADC0) + R_ADC_Open((adc_ctrl_t *)_ra_adc0_device.ra_adc_dev->g_ctrl, + (adc_cfg_t const * const)_ra_adc0_device.ra_adc_dev->g_cfg); + + R_ADC_ScanCfg((adc_ctrl_t *)_ra_adc0_device.ra_adc_dev->g_ctrl, + (adc_cfg_t const * const)_ra_adc0_device.ra_adc_dev->g_channel_cfg); + + if (RT_EOK != rt_hw_adc_register(_ra_adc0_device.ra_adc_device_t, "adc0", &ra_adc_ops, (void *)_ra_adc0_device.ra_adc_dev)) + { + LOG_E("adc0 register failed"); + return -RT_ERROR; + } +#endif + +#if defined(BSP_USING_ADC1) + R_ADC_Open((adc_ctrl_t *)_ra_adc1_device.ra_adc_dev->g_ctrl, + (adc_cfg_t const * const)_ra_adc1_device.ra_adc_dev->g_cfg); + + R_ADC_ScanCfg((adc_ctrl_t *)_ra_adc1_device.ra_adc_dev->g_ctrl, + (adc_cfg_t const * const)_ra_adc1_device.ra_adc_dev->g_channel_cfg); + + if (RT_EOK != rt_hw_adc_register(_ra_adc1_device.ra_adc_device_t, "adc1", &ra_adc_ops, (void *)_ra_adc1_device.ra_adc_dev)) + { + LOG_E("adc1 register failed"); + return -RT_ERROR; + } +#endif + + return RT_EOK; +} +INIT_BOARD_EXPORT(ra_adc_init); +#endif diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_can.c b/bsp/renesas/libraries/HAL_Drivers/drv_can.c new file mode 100644 index 0000000000..f87e0d9155 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_can.c @@ -0,0 +1,310 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-29 mazhiyuan first version + */ + +#include "drv_can.h" + +static struct ra_can_config can_config[] = +{ +#ifdef BSP_USING_CAN0 + CAN0_CONFIG, +#endif + +#ifdef BSP_USING_CAN1 + CAN1_CONFIG +#endif +}; + +enum +{ +#ifdef BSP_USING_CAN0 + CAN0_INDEX, +#endif + +#ifdef BSP_USING_CAN1 + CAN1_INDEX, +#endif +}; + +static struct ra_can can_obj[sizeof(can_config) / sizeof(can_config[0])] = {0}; + +static const struct ra_baud_rate_tab can_baud_rate_tab[] = +{ + {CAN1MBaud, 3, 6, 3, 1 + 4}, + {CAN800kBaud, 4, 15, 5, 1 + 2}, + {CAN500kBaud, 4, 14, 5, 1 + 4}, + {CAN250kBaud, 4, 14, 5, 1 + 9}, + {CAN125kBaud, 4, 14, 5, 1 + 19}, + {CAN100kBaud, 4, 14, 5, 1 + 24}, + {CAN50kBaud, 4, 14, 5, 1 + 49}, + {CAN20kBaud, 4, 14, 5, 1 + 124}, + {CAN10kBaud, 4, 14, 5, 1 + 249} +}; + +static rt_uint32_t get_can_baud_index(rt_uint32_t baud) +{ + rt_uint32_t len, index; + + len = sizeof(can_baud_rate_tab) / sizeof(can_baud_rate_tab[0]); + for (index = 0; index < len; index++) + { + if (can_baud_rate_tab[index].baud_rate == baud) + return index; + } + + return 0; /* default baud is CAN1MBaud */ +} + +static void ra_can_get_config(void) +{ + struct can_configure config = CANDEFAULTCONFIG; +#ifdef BSP_USING_CAN0 + can_obj[CAN0_INDEX].can_dev.config = config; + can_obj[CAN0_INDEX].can_dev.config.msgboxsz = CAN_NO_OF_MAILBOXES_g_can0; + can_obj[CAN0_INDEX].can_dev.config.sndboxnumber = 1; + can_obj[CAN0_INDEX].can_dev.config.ticks = 50; +#endif +#ifdef BSP_USING_CAN1 + can_obj[CAN1_INDEX].can_dev.config = config; + can_obj[CAN1_INDEX].can_dev.config.msgboxsz = CAN_NO_OF_MAILBOXES_g_can1; + can_obj[CAN1_INDEX].can_dev.config.sndboxnumber = 1; + can_obj[CAN1_INDEX].can_dev.config.ticks = 50; +#endif +} +rt_err_t ra_can_configure(struct rt_can_device *can_dev, struct can_configure *cfg) +{ + struct ra_can *can; + RT_ASSERT(can_dev != RT_NULL); + RT_ASSERT(cfg != RT_NULL); + + fsp_err_t err = FSP_SUCCESS; + + can = rt_container_of(can_dev, struct ra_can, can_dev); + RT_ASSERT(can != RT_NULL); + err = R_CAN_Open(can->config->p_api_ctrl, can->config->p_cfg); + if (FSP_SUCCESS != err) + { + return RT_ERROR; + } + return RT_EOK; +} +rt_err_t ra_can_control(struct rt_can_device *can_dev, int cmd, void *arg) +{ + struct ra_can *can; + can_info_t can_info; + rt_uint32_t argval; + RT_ASSERT(can_dev != RT_NULL); + can = rt_container_of(can_dev, struct ra_can, can_dev); + switch (cmd) + { + case RT_DEVICE_CTRL_CLR_INT: + R_BSP_IrqStatusClear((IRQn_Type)arg); + break; + case RT_CAN_CMD_SET_BAUD: + argval = (rt_uint32_t) arg; + if (argval != CAN1MBaud && + argval != CAN800kBaud && + argval != CAN500kBaud && + argval != CAN250kBaud && + argval != CAN125kBaud && + argval != CAN100kBaud && + argval != CAN50kBaud && + argval != CAN20kBaud && + argval != CAN10kBaud) + { + return -RT_ERROR; + } + if (argval != can->can_dev.config.baud_rate) + { + can->can_dev.config.baud_rate = argval; + uint32_t index = get_can_baud_index(argval); + can->config->p_cfg->p_bit_timing->baud_rate_prescaler = can_baud_rate_tab[index].prescaler; + can->config->p_cfg->p_bit_timing->synchronization_jump_width = can_baud_rate_tab[index].sjw; + can->config->p_cfg->p_bit_timing->time_segment_1 = can_baud_rate_tab[index].ts1; + can->config->p_cfg->p_bit_timing->time_segment_2 = can_baud_rate_tab[index].ts2; + return ra_can_configure(&can->can_dev, &can->can_dev.config); + } + break; + case RT_CAN_CMD_SET_MODE: + argval = (rt_uint32_t) arg; + if (argval != RT_CAN_MODE_NORMAL && + argval != RT_CAN_MODE_LISEN && + argval != RT_CAN_MODE_LOOPBACK) + { + return -RT_ERROR; + } + if (argval != can->can_dev.config.mode) + { + can_test_mode_t mode_to_set; + can->can_dev.config.mode = argval; + switch (argval) + { + case RT_CAN_MODE_NORMAL: + mode_to_set = CAN_TEST_MODE_DISABLED; + case RT_CAN_MODE_LISEN: + mode_to_set = CAN_TEST_MODE_LISTEN; + case RT_CAN_MODE_LOOPBACK: + mode_to_set = CAN_TEST_MODE_LOOPBACK_INTERNAL; + } + R_CAN_ModeTransition(can->config->p_api_ctrl, ((can_instance_ctrl_t *)(can->config->p_api_ctrl))->operation_mode, mode_to_set); + } + break; + case RT_CAN_CMD_GET_STATUS: + R_CAN_InfoGet(can->config->p_api_ctrl, &can_info); + can->can_dev.status.rcverrcnt = can_info.error_count_receive; + can->can_dev.status.snderrcnt = can_info.error_count_transmit; + can->can_dev.status.errcode = can_info.error_code; + rt_memcpy(arg, &can->can_dev.status, sizeof(can->can_dev.status)); + break; + default: + return -RT_ERROR; + } + return RT_EOK; +} +int ra_can_sendmsg(struct rt_can_device *can_dev, const void *buf, rt_uint32_t boxno) +{ + struct ra_can *can; + can_frame_t g_can_tx_frame; + struct rt_can_msg *msg_rt = (struct rt_can_msg *)buf; + RT_ASSERT(can_dev != RT_NULL); + RT_ASSERT(buf != RT_NULL); + + g_can_tx_frame.id = msg_rt->id; + g_can_tx_frame.id_mode = msg_rt->ide; + g_can_tx_frame.type = msg_rt->rtr; + g_can_tx_frame.data_length_code = msg_rt->len; + g_can_tx_frame.options = 0; + memcpy(g_can_tx_frame.data, msg_rt->data, 8); + can = rt_container_of(can_dev, struct ra_can, can_dev); + RT_ASSERT(boxno < can->config->num_of_mailboxs); + + if (R_CAN_Write(can->config->p_api_ctrl, boxno, &g_can_tx_frame) != FSP_SUCCESS) + { + rt_exit_critical(); + return RT_ERROR; + } + return RT_EOK; +} + +int ra_can_recvmsg(struct rt_can_device *can_dev, void *buf, rt_uint32_t boxno) +{ + struct rt_can_msg *msg_rt = (struct rt_can_msg *)buf; + can_frame_t *msg_ra; + struct ra_can *can; + + RT_ASSERT(can_dev != RT_NULL); + RT_ASSERT(buf != RT_NULL); + can = rt_container_of(can_dev, struct ra_can, can_dev); + RT_ASSERT(boxno < can->config->num_of_mailboxs); + if (can->callback_args->mailbox != boxno) + return 0; + msg_ra = can->callback_args->p_frame; + + msg_rt->id = msg_ra->id; + msg_rt->ide = msg_ra->id_mode; + msg_rt->rtr = msg_ra->type; + msg_rt->rsv = RT_NULL; + msg_rt->len = msg_ra->data_length_code; + msg_rt->priv = boxno; + msg_rt->hdr = RT_NULL; + memcpy(msg_rt->data, msg_ra->data, msg_ra->data_length_code); + return sizeof(struct rt_can_msg); +} +const struct rt_can_ops ra_can_ops = +{ + .configure = ra_can_configure, + .control = ra_can_control, + .sendmsg = ra_can_sendmsg, + .recvmsg = ra_can_recvmsg +}; + +#ifdef BSP_USING_CAN0 +void can0_callback(can_callback_args_t *p_args) +{ + rt_interrupt_enter(); + switch (p_args->event) + { + case CAN_EVENT_TX_COMPLETE: + rt_hw_can_isr(&can_obj[CAN0_INDEX].can_dev, RT_CAN_EVENT_TX_DONE | p_args->mailbox << 8); + break; + case CAN_EVENT_RX_COMPLETE: + can_obj[CAN0_INDEX].callback_args = p_args; + if (p_args->event == CAN_EVENT_RX_COMPLETE) + rt_hw_can_isr(&can_obj[CAN0_INDEX].can_dev, RT_CAN_EVENT_RX_IND | p_args->mailbox << 8); + break; + case CAN_EVENT_TX_ABORTED: + rt_hw_can_isr(&can_obj[CAN0_INDEX].can_dev, RT_CAN_EVENT_TX_FAIL | p_args->mailbox << 8); + break; + case CAN_EVENT_MAILBOX_MESSAGE_LOST: //overwrite/overrun error event + case CAN_EVENT_BUS_RECOVERY: //Bus recovery error event + case CAN_EVENT_ERR_BUS_OFF: //error Bus Off event + case CAN_EVENT_ERR_PASSIVE: //error passive event + case CAN_EVENT_ERR_WARNING: //error warning event + case CAN_EVENT_ERR_BUS_LOCK: //error bus lock + case CAN_EVENT_ERR_CHANNEL: //error channel + case CAN_EVENT_ERR_GLOBAL: //error global + { + break; + } + } + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_CAN1 +void can1_callback(can_callback_args_t *p_args) +{ + rt_interrupt_enter(); + switch (p_args->event) + { + case CAN_EVENT_TX_COMPLETE: + rt_hw_can_isr(&can_obj[CAN1_INDEX].can_dev, RT_CAN_EVENT_TX_DONE | p_args->mailbox << 8); + break; + case CAN_EVENT_RX_COMPLETE: + can_obj[CAN1_INDEX].callback_args = p_args; + if (p_args->event == CAN_EVENT_RX_COMPLETE) + rt_hw_can_isr(&can_obj[CAN1_INDEX].can_dev, RT_CAN_EVENT_RX_IND | p_args->mailbox << 8); + break; + case CAN_EVENT_TX_ABORTED: + rt_hw_can_isr(&can_obj[CAN1_INDEX].can_dev, RT_CAN_EVENT_TX_FAIL | p_args->mailbox << 8); + break; + case CAN_EVENT_MAILBOX_MESSAGE_LOST: //overwrite/overrun error event + case CAN_EVENT_BUS_RECOVERY: //Bus recovery error event + case CAN_EVENT_ERR_BUS_OFF: //error Bus Off event + case CAN_EVENT_ERR_PASSIVE: //error passive event + case CAN_EVENT_ERR_WARNING: //error warning event + case CAN_EVENT_ERR_BUS_LOCK: //error bus lock + case CAN_EVENT_ERR_CHANNEL: //error channel + case CAN_EVENT_ERR_GLOBAL: //error global + { + break; + } + } + rt_interrupt_leave(); +} +#endif + +int rt_hw_can_init(void) +{ + rt_err_t result = 0; + rt_size_t obj_num = sizeof(can_obj) / sizeof(struct ra_can); + ra_can_get_config(); + for (int i = 0; i < obj_num; i++) + { + /* init CAN object */ + can_obj[i].config = &can_config[i]; + can_obj[i].can_dev.ops = &ra_can_ops; + /* register CAN device */ + result = rt_hw_can_register(&can_obj[i].can_dev, can_obj[i].config->name, can_obj[i].can_dev.ops, RT_NULL); + RT_ASSERT(result == RT_EOK); + } + + return result; +} +INIT_BOARD_EXPORT(rt_hw_can_init); diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_can.h b/bsp/renesas/libraries/HAL_Drivers/drv_can.h new file mode 100644 index 0000000000..9e17c612fd --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_can.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-29 mazhiyuan first version + */ + +#ifndef __DRV_CAN_H__ +#define __DRV_CAN_H__ + +#include +#include +#include +#include +#include +#include + +/* renesas config class */ +struct ra_can_config +{ + const char *name; + int num_of_mailboxs; + can_ctrl_t *const p_api_ctrl; + can_cfg_t const *const p_cfg; +}; + +struct ra_can +{ + struct rt_can_device can_dev; + struct ra_can_config *config; + can_callback_args_t *callback_args; +}; + +struct ra_baud_rate_tab +{ + rt_uint32_t baud_rate; + rt_uint32_t sjw; + rt_uint32_t ts1; + rt_uint32_t ts2; + rt_uint32_t prescaler; +}; + +int rt_hw_can_init(void); + +#endif diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_common.c b/bsp/renesas/libraries/HAL_Drivers/drv_common.c new file mode 100644 index 0000000000..7798cab80e --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_common.c @@ -0,0 +1,185 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-7 SummerGift first version + */ + +#include +#include +#include "board.h" + +#ifdef RT_USING_PIN + #include +#endif + +#ifdef RT_USING_SERIAL + #ifdef RT_USING_SERIAL_V2 + #include + #else + #include + #endif +#endif + +#ifdef RT_USING_FINSH +#include +static void reboot(uint8_t argc, char **argv) +{ + NVIC_SystemReset(); +} +MSH_CMD_EXPORT(reboot, Reboot System); +#endif /* RT_USING_FINSH */ + +/* SysTick configuration */ +void rt_hw_systick_init(void) +{ + SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); + NVIC_SetPriority(SysTick_IRQn, 0xFF); +} + +/** + * This is the timer interrupt service routine. + * + */ +void SysTick_Handler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + rt_tick_increase(); + + /* leave interrupt */ + rt_interrupt_leave(); +} + + +/** + * @brief This function is executed in case of error occurrence. + * @param None + * @retval None + */ +void _Error_Handler(char *s, int num) +{ + /* USER CODE BEGIN Error_Handler */ + /* User can add his own implementation to report the HAL error return state */ + while (1) + { + } + /* USER CODE END Error_Handler */ +} + +/** + * This function will delay for some us. + * + * @param us the delay time of us + */ +void rt_hw_us_delay(rt_uint32_t us) +{ + rt_uint32_t ticks; + rt_uint32_t told, tnow, tcnt = 0; + rt_uint32_t reload = SysTick->LOAD; + + ticks = us * reload / (1000000 / RT_TICK_PER_SECOND); + told = SysTick->VAL; + while (1) + { + tnow = SysTick->VAL; + if (tnow != told) + { + if (tnow < told) + { + tcnt += told - tnow; + } + else + { + tcnt += reload - tnow + told; + } + told = tnow; + if (tcnt >= ticks) + { + break; + } + } + } +} + +/** + * This function will initial STM32 board. + */ +RT_WEAK void rt_hw_board_init() +{ + + rt_hw_systick_init(); + + /* Heap initialization */ +#if defined(RT_USING_HEAP) + rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); +#endif + + /* Pin driver initialization is open by default */ +#ifdef RT_USING_PIN + rt_hw_pin_init(); +#endif + + /* USART driver initialization is open by default */ +#ifdef RT_USING_SERIAL + rt_hw_usart_init(); +#endif + + /* Set the shell console output device */ +#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE) + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif + + /* Board underlying hardware initialization */ +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif +} + +FSP_CPP_HEADER +void R_BSP_WarmStart(bsp_warm_start_event_t event); +FSP_CPP_FOOTER + +/*******************************************************************************************************************//** + * This function is called at various points during the startup process. This implementation uses the event that is + * called right before main() to set up the pins. + * + * @param[in] event Where at in the start up process the code is currently at + **********************************************************************************************************************/ +void R_BSP_WarmStart (bsp_warm_start_event_t event) +{ + if (BSP_WARM_START_RESET == event) + { +#if BSP_FEATURE_FLASH_LP_VERSION != 0 + + /* Enable reading from data flash. */ + R_FACI_LP->DFLCTL = 1U; + + /* Would normally have to wait tDSTOP(6us) for data flash recovery. Placing the enable here, before clock and + * C runtime initialization, should negate the need for a delay since the initialization will typically take more than 6us. */ +#endif + } + + if (BSP_WARM_START_POST_C == event) + { + /* C runtime environment and system clocks are setup. */ + + /* Configure pins. */ + R_IOPORT_Open(&g_ioport_ctrl, g_ioport.p_cfg); + } +} + +#if BSP_TZ_SECURE_BUILD + +BSP_CMSE_NONSECURE_ENTRY void template_nonsecure_callable (); + +/* Trustzone Secure Projects require at least one nonsecure callable function in order to build (Remove this if it is not required to build). */ +BSP_CMSE_NONSECURE_ENTRY void template_nonsecure_callable () +{ + +} +#endif \ No newline at end of file diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_common.h b/bsp/renesas/libraries/HAL_Drivers/drv_common.h new file mode 100644 index 0000000000..2c2a76334f --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_common.h @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-7 SummerGift first version + */ + +#ifndef __DRV_COMMON_H__ +#define __DRV_COMMON_H__ + +#include +#include +#ifdef RT_USING_DEVICE + #include +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +void _Error_Handler(char *s, int num); + +#ifndef Error_Handler +#define Error_Handler() _Error_Handler(__FILE__, __LINE__) +#endif + +#define DMA_NOT_AVAILABLE ((DMA_INSTANCE_TYPE *)0xFFFFFFFFU) + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_dac.c b/bsp/renesas/libraries/HAL_Drivers/drv_dac.c new file mode 100644 index 0000000000..805b8121da --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_dac.c @@ -0,0 +1,113 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-19 Mr.Tiger first version + */ + +#include +#include "drv_config.h" +#ifdef RT_USING_DAC + +//#define DRV_DEBUG +#define DBG_TAG "drv.dac" +#ifdef DRV_DEBUG + #define DBG_LVL DBG_LOG +#else + #define DBG_LVL DBG_INFO +#endif /* DRV_DEBUG */ +#include + +struct ra_dac_map ra_dac[] = +{ +#ifdef BSP_USING_DAC0 + {'0', &g_dac0_cfg, &g_dac0_ctrl}, +#endif +#ifdef BSP_USING_DAC1 + {'1', &g_dac1_cfg, &g_dac1_ctrl}, +#endif +}; + +#ifdef BSP_USING_DAC0 +struct rt_dac_device dac0_device; +struct ra_dac_dev _ra_dac0_device = {.ra_dac_device_t = &dac0_device, .ra_dac_map_dev = &ra_dac[0]}; +#endif + +#ifdef BSP_USING_DAC1 +struct rt_dac_device dac1_device; +struct ra_dac_dev _ra_dac1_device = {.ra_dac_device_t = &dac1_device, .ra_dac_map_dev = &ra_dac[1]}; +#endif + +rt_err_t ra_dac_disabled(struct rt_dac_device *device, rt_uint32_t channel) +{ + RT_ASSERT(device != RT_NULL); + struct ra_dac_map *dac = (struct ra_dac_map *)device->parent.user_data; + if (FSP_SUCCESS != R_DAC_Stop((dac_ctrl_t *)dac->g_ctrl)) + { + LOG_E("dac%c stop failed.", dac->name); + return -RT_ERROR; + } + return RT_EOK; +} + +rt_err_t ra_dac_enabled(struct rt_dac_device *device, rt_uint32_t channel) +{ + RT_ASSERT(device != RT_NULL); + struct ra_dac_map *dac = (struct ra_dac_map *)device->parent.user_data; + if (FSP_SUCCESS != R_DAC_Start((dac_ctrl_t *)dac->g_ctrl)) + { + LOG_E("dac%c start failed.", dac->name); + return -RT_ERROR; + } + return RT_EOK; +} + +rt_err_t ra_dac_write(struct rt_dac_device *device, rt_uint32_t channel, rt_uint32_t *value) +{ + RT_ASSERT(device != RT_NULL); + struct ra_dac_map *dac = (struct ra_dac_map *)device->parent.user_data; + if (FSP_SUCCESS != R_DAC_Write((dac_ctrl_t *)dac->g_ctrl, *value)) + { + LOG_E("dac%c set value failed.", dac->name); + return -RT_ERROR; + } + return RT_EOK; +} + +struct rt_dac_ops ra_dac_ops = +{ + .disabled = ra_dac_disabled, + .enabled = ra_dac_enabled, + .convert = ra_dac_write, +}; + +static int ra_dac_init(void) +{ +#ifdef BSP_USING_DAC0 + _ra_dac0_device.ra_dac_device_t->ops = &ra_dac_ops; + R_DAC_Open((dac_ctrl_t *)_ra_dac0_device.ra_dac_map_dev->g_ctrl, (dac_cfg_t const *)_ra_dac0_device.ra_dac_map_dev->g_cfg); + if (FSP_SUCCESS != rt_hw_dac_register(_ra_dac0_device.ra_dac_device_t, "dac0", &ra_dac_ops, (void *)_ra_dac0_device.ra_dac_map_dev)) + { + LOG_E("dac0 register failed"); + return -RT_ERROR; + } +#endif + +#ifdef BSP_USING_DAC1 + _ra_dac1_device.ra_dac_device_t->ops = &ra_dac_ops; + R_DAC_Open((dac_ctrl_t *)_ra_dac1_device.ra_dac_map_dev->g_ctrl, (dac_cfg_t const *) _ra_dac1_device.ra_dac_map_dev->g_cfg); + if (FSP_SUCCESS != rt_hw_dac_register(_ra_dac1_device.ra_dac_device_t, "dac1", &ra_dac_ops, (void *)_ra_dac1_device.ra_dac_map_dev)) + { + LOG_E("dac1 register failed"); + return -RT_ERROR; + } +#endif + + return RT_EOK; +} +INIT_DEVICE_EXPORT(ra_dac_init); + +#endif diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_flash.c b/bsp/renesas/libraries/HAL_Drivers/drv_flash.c new file mode 100644 index 0000000000..4a4fc0fc6b --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_flash.c @@ -0,0 +1,283 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-11-30 flybreak first version + */ + +#include +#include +#include + +#include "board.h" +#include "hal_data.h" +#include "drv_flash.h" + +#include + +#if defined(PKG_USING_FAL) + #include "fal.h" +#endif + +//#define DRV_DEBUG +#define LOG_TAG "drv.flash" +#ifdef DRV_DEBUG + #define DBG_LVL DBG_LOG +#else + #define DBG_LVL DBG_INFO +#endif /* DRV_DEBUG */ +#include + +int _flash_init(void) +{ + fsp_err_t err = FSP_SUCCESS; + /* Open Flash_HP */ + err = R_FLASH_HP_Open(&g_flash_ctrl, &g_flash_cfg); + /* Handle Error */ + if (FSP_SUCCESS != err) + { + LOG_E("\r\n Flah_HP_Open API failed"); + } + /* Setup Default Block 0 as Startup Setup Block */ + err = R_FLASH_HP_StartUpAreaSelect(&g_flash_ctrl, FLASH_STARTUP_AREA_BLOCK0, true); + if (err != FSP_SUCCESS) + { + LOG_E("\r\n Flah_HP_StartUpAreaSelect API failed"); + } + return 0; +} + +/** + * Read data from flash. + * @note This operation's units is word. + * + * @param addr flash address + * @param buf buffer to store read data + * @param size read bytes size + * + * @return result + */ +int _flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size) +{ + size_t i; + + for (i = 0; i < size; i++, buf++, addr++) + { + *buf = *(rt_uint8_t *) addr; + } + + return size; +} + +/** + * Write data to flash. + * @note This operation's units is word. + * @note This operation must after erase. @see flash_erase. + * + * @param addr flash address + * @param buf the write data buffer + * @param size write bytes size + * + * @return result + */ +int _flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size) +{ + rt_err_t result = RT_EOK; + rt_base_t level; + fsp_err_t err = FSP_SUCCESS; + size_t written_size = 0; + + if (size % BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE) + { + LOG_E("Flash Write size must be an integer multiple of %d", BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE); + return -RT_EINVAL; + } + + while (written_size < size) + { + level = rt_hw_interrupt_disable(); + R_FLASH_HP_Reset(&g_flash_ctrl); + /* Write code flash data*/ + err = R_FLASH_HP_Write(&g_flash_ctrl, (uint32_t)(buf + written_size), addr + written_size, BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE); + rt_hw_interrupt_enable(level); + + /* Error Handle */ + if (FSP_SUCCESS != err) + { + LOG_E("Write API failed"); + return -RT_EIO; + } + + written_size += BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE; + } + + if (result != RT_EOK) + { + return result; + } + + return size; +} + +/** + * Erase data on flash. + * @note This operation is irreversible. + * @note This operation's units is different which on many chips. + * + * @param addr flash address + * @param size erase bytes size + * + * @return result + */ +int _flash_erase_8k(rt_uint32_t addr, size_t size) +{ + fsp_err_t err = FSP_SUCCESS; + rt_base_t level; + + if ((addr + size) > BSP_FEATURE_FLASH_HP_CF_REGION0_SIZE) + { + LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size)); + return -RT_EINVAL; + } + + if (size < 1) + { + return -RT_EINVAL; + } + + level = rt_hw_interrupt_disable(); + R_FLASH_HP_Reset(&g_flash_ctrl); + /* Erase Block */ + err = R_FLASH_HP_Erase(&g_flash_ctrl, RT_ALIGN_DOWN(addr, FLASH_HP_CF_BLOCK_SIZE_8KB), (size - 1) / BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE + 1); + rt_hw_interrupt_enable(level); + + if (err != FSP_SUCCESS) + { + LOG_E("Erase API failed"); + return -RT_EIO; + } + + LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size); + return size; +} + +int _flash_erase_32k(rt_uint32_t addr, size_t size) +{ + fsp_err_t err = FSP_SUCCESS; + rt_base_t level; + + if (size < 1) + { + return -RT_EINVAL; + } + + level = rt_hw_interrupt_disable(); + R_FLASH_HP_Reset(&g_flash_ctrl); + /* Erase Block */ + err = R_FLASH_HP_Erase(&g_flash_ctrl, RT_ALIGN_DOWN(addr, FLASH_HP_CF_BLOCK_SIZE_32KB), (size - 1) / BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE + 1); + rt_hw_interrupt_enable(level); + + if (err != FSP_SUCCESS) + { + LOG_E("Erase API failed"); + return -RT_EIO; + } + + LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size); + return size; +} + +#if defined(PKG_USING_FAL) + +static int fal_flash_read_8k(long offset, rt_uint8_t *buf, size_t size); +static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size); + +static int fal_flash_write_8k(long offset, const rt_uint8_t *buf, size_t size); +static int fal_flash_write_32k(long offset, const rt_uint8_t *buf, size_t size); + +static int fal_flash_erase_8k(long offset, size_t size); +static int fal_flash_erase_32k(long offset, size_t size); + +const struct fal_flash_dev _onchip_flash_8k = { "onchip_flash_8k", FLASH_HP_CF_BLCOK_0, FLASH_HP_CF_BLOCK_8, (8 * 1024), {_flash_init, fal_flash_read_8k, fal_flash_write_8k, fal_flash_erase_8k} }; +const struct fal_flash_dev _onchip_flash_32k = { "onchip_flash_32k", FLASH_HP_CF_BLOCK_8, 32 * 30 * 1024, (32 * 1024), {_flash_init, fal_flash_read_32k, fal_flash_write_32k, fal_flash_erase_32k} }; + +static int fal_flash_read_8k(long offset, rt_uint8_t *buf, size_t size) +{ + return _flash_read(_onchip_flash_8k.addr + offset, buf, size); +} + +static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size) +{ + return _flash_read(_onchip_flash_32k.addr + offset, buf, size); +} + +static int fal_flash_write_8k(long offset, const rt_uint8_t *buf, size_t size) +{ + return _flash_write(_onchip_flash_8k.addr + offset, buf, size); +} + +static int fal_flash_write_32k(long offset, const rt_uint8_t *buf, size_t size) +{ + return _flash_write(_onchip_flash_32k.addr + offset, buf, size); +} + +static int fal_flash_erase_8k(long offset, size_t size) +{ + return _flash_erase_8k(_onchip_flash_8k.addr + offset, size); +} + +static int fal_flash_erase_32k(long offset, size_t size) +{ + return _flash_erase_32k(_onchip_flash_32k.addr + offset, size); +} + +int flash_test(void) +{ +#define TEST_OFF (_onchip_flash_32k.len - BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE) + const struct fal_partition *param; + uint8_t write_buffer[BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE] = {0}; + uint8_t read_buffer[BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE] = {0}; + + /* Set write buffer, clear read buffer */ + for (uint8_t index = 0; index < BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE; index++) + { + write_buffer[index] = index; + read_buffer[index] = 0; + } + + fal_init(); + + param = fal_partition_find("param"); + if (param == RT_NULL) + { + LOG_E("not find partition param!"); + return -1; + } + LOG_I("Erase Start..."); + fal_partition_erase(param, TEST_OFF, BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE); + LOG_I("Erase succeeded!"); + LOG_I("Write Start..."); + fal_partition_write(param, TEST_OFF, write_buffer, sizeof(write_buffer)); + LOG_I("Write succeeded!"); + LOG_I("Read Start..."); + fal_partition_read(param, TEST_OFF, read_buffer, BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE); + LOG_I("Read succeeded!"); + + for (int i = 0; i < BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE; i++) + { + if (read_buffer[i] != write_buffer[i]) + { + LOG_E("Data verification failed!"); + return -1; + } + } + + LOG_I("Data verification succeeded!"); + return 0; +} +MSH_CMD_EXPORT(flash_test, "drv flash test."); + +#endif diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_flash.h b/bsp/renesas/libraries/HAL_Drivers/drv_flash.h new file mode 100644 index 0000000000..0940884834 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_flash.h @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-11-30 flybreak first version + */ + +#ifndef __DRV_FLASH_H__ +#define __DRV_FLASH_H__ + +#include +#include "rtdevice.h" +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* Code Flash */ +#define FLASH_HP_CF_BLOCK_SIZE_32KB (32*1024) /* Block Size 32 KB */ +#define FLASH_HP_CF_BLOCK_SIZE_8KB (8*1024) /* Block Size 8KB */ + +#define FLASH_HP_CF_BLCOK_0 0x00000000U /* 8 KB: 0x00000000 - 0x00001FFF */ +#define FLASH_HP_CF_BLOCK_1 0x00002000U /* 8 KB: 0x00002000 - 0x00003FFF */ +#define FLASH_HP_CF_BLOCK_2 0x00004000U /* 8 KB: 0x00004000 - 0x00005FFF */ +#define FLASH_HP_CF_BLOCK_3 0x00006000U /* 8 KB: 0x00006000 - 0x00007FFF */ +#define FLASH_HP_CF_BLOCK_4 0x00008000U /* 8 KB: 0x00008000 - 0x00009FFF */ +#define FLASH_HP_CF_BLOCK_5 0x0000A000U /* 8 KB: 0x0000A000 - 0x0000BFFF */ +#define FLASH_HP_CF_BLOCK_6 0x0000C000U /* 8 KB: 0x0000C000 - 0x0000DFFF */ +#define FLASH_HP_CF_BLOCK_7 0x0000E000U /* 8 KB: 0x0000E000 - 0x0000FFFF */ +#define FLASH_HP_CF_BLOCK_8 0x00010000U /* 32 KB: 0x00010000 - 0x00017FFF */ +#define FLASH_HP_CF_BLOCK_9 0x00018000U /* 32 KB: 0x00018000 - 0x0001FFFF */ +#define FLASH_HP_CF_BLCOK_10 0x00020000U /* 32 KB: 0x00020000 - 0x0004FFFF */ + +#define FLASH_HP_DF_BLOCK_SIZE (64) +/* Data Flash */ +#if (defined (BOARD_RA6M4_EK) || defined (BOARD_RA6M5_EK) || defined (BOARD_RA4M3_EK)||defined(BOARD_RA4M2_EK)) + +#define FLASH_HP_DF_BLOCK_0 0x08000000U /* 64 B: 0x40100000 - 0x4010003F */ +#define FLASH_HP_DF_BLOCK_1 0x08000040U /* 64 B: 0x40100040 - 0x4010007F */ +#define FLASH_HP_DF_BLOCK_2 0x08000080U /* 64 B: 0x40100080 - 0x401000BF */ +#define FLASH_HP_DF_BLOCK_3 0x080000C0U /* 64 B: 0x401000C0 - 0x401000FF */ + +#else + +#define FLASH_HP_DF_BLOCK_0 0x40100000U /* 64 B: 0x40100000 - 0x4010003F */ +#define FLASH_HP_DF_BLOCK_1 0x40100040U /* 64 B: 0x40100040 - 0x4010007F */ +#define FLASH_HP_DF_BLOCK_2 0x40100080U /* 64 B: 0x40100080 - 0x401000BF */ +#define FLASH_HP_DF_BLOCK_3 0x401000C0U /* 64 B: 0x401000C0 - 0x401000FF */ + +#endif + +#define BLOCK_SIZE (128) +#define BLOCK_NUM (2) + +#ifdef __cplusplus +} +#endif + +#endif /* __DRV_FLASH_H__ */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c b/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c new file mode 100644 index 0000000000..31f5494390 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_gpio.c @@ -0,0 +1,504 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-07-29 KyleChan first version + * 2022-01-19 Sherman add PIN2IRQX_TABLE + */ + +#include + +#ifdef RT_USING_PIN + +#define DBG_TAG "drv.gpio" +#ifdef DRV_DEBUG + #define DBG_LVL DBG_LOG +#else + #define DBG_LVL DBG_INFO +#endif /* DRV_DEBUG */ + +#ifdef R_ICU_H +#include "gpio_cfg.h" + +static rt_base_t ra_pin_get_irqx(rt_uint32_t pin) +{ + PIN2IRQX_TABLE(pin) +} + +static struct rt_pin_irq_hdr pin_irq_hdr_tab[RA_IRQ_MAX] = {0}; +struct ra_pin_irq_map pin_irq_map[RA_IRQ_MAX] = {0}; + +static void ra_irq_tab_init(void) +{ + for (int i = 0; i < RA_IRQ_MAX; ++i) + { + pin_irq_hdr_tab[i].pin = -1; + pin_irq_hdr_tab[i].mode = 0; + pin_irq_hdr_tab[i].args = RT_NULL; + pin_irq_hdr_tab[i].hdr = RT_NULL; + } +} + +static void ra_pin_map_init(void) +{ +#ifdef VECTOR_NUMBER_ICU_IRQ0 + pin_irq_map[0].irq_ctrl = &g_external_irq0_ctrl; + pin_irq_map[0].irq_cfg = &g_external_irq0_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ1 + pin_irq_map[1].irq_ctrl = &g_external_irq1_ctrl; + pin_irq_map[1].irq_cfg = &g_external_irq1_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ2 + pin_irq_map[2].irq_ctrl = &g_external_irq2_ctrl; + pin_irq_map[2].irq_cfg = &g_external_irq2_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ3 + pin_irq_map[3].irq_ctrl = &g_external_irq3_ctrl; + pin_irq_map[3].irq_cfg = &g_external_irq3_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ4 + pin_irq_map[4].irq_ctrl = &g_external_irq4_ctrl; + pin_irq_map[4].irq_cfg = &g_external_irq4_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ5 + pin_irq_map[5].irq_ctrl = &g_external_irq5_ctrl; + pin_irq_map[5].irq_cfg = &g_external_irq5_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ6 + pin_irq_map[6].irq_ctrl = &g_external_irq6_ctrl; + pin_irq_map[6].irq_cfg = &g_external_irq6_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ7 + pin_irq_map[7].irq_ctrl = &g_external_irq7_ctrl; + pin_irq_map[7].irq_cfg = &g_external_irq7_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ8 + pin_irq_map[8].irq_ctrl = &g_external_irq8_ctrl; + pin_irq_map[8].irq_cfg = &g_external_irq8_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ9 + pin_irq_map[9].irq_ctrl = &g_external_irq9_ctrl; + pin_irq_map[9].irq_cfg = &g_external_irq9_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ10 + pin_irq_map[10].irq_ctrl = &g_external_irq10_ctrl; + pin_irq_map[10].irq_cfg = &g_external_irq10_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ11 + pin_irq_map[11].irq_ctrl = &g_external_irq11_ctrl; + pin_irq_map[11].irq_cfg = &g_external_irq11_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ12 + pin_irq_map[12].irq_ctrl = &g_external_irq12_ctrl; + pin_irq_map[12].irq_cfg = &g_external_irq12_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ13 + pin_irq_map[13].irq_ctrl = &g_external_irq13_ctrl; + pin_irq_map[13].irq_cfg = &g_external_irq13_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ14 + pin_irq_map[14].irq_ctrl = &g_external_irq14_ctrl; + pin_irq_map[14].irq_cfg = &g_external_irq14_cfg; +#endif +#ifdef VECTOR_NUMBER_ICU_IRQ15 + pin_irq_map[15].irq_ctrl = &g_external_irq15_ctrl; + pin_irq_map[15].irq_cfg = &g_external_irq15_cfg; +#endif +} +#endif /* R_ICU_H */ + +static void ra_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) +{ + fsp_err_t err; + /* Initialize the IOPORT module and configure the pins */ + err = R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg); + + if (err != FSP_SUCCESS) + { + LOG_E("GPIO open failed"); + return; + } + + switch (mode) + { + case PIN_MODE_OUTPUT: + err = R_IOPORT_PinCfg(&g_ioport_ctrl, pin, BSP_IO_DIRECTION_OUTPUT); + if (err != FSP_SUCCESS) + { + LOG_E("PIN_MODE_OUTPUT configuration failed"); + return; + } + break; + + case PIN_MODE_INPUT: + err = R_IOPORT_PinCfg(&g_ioport_ctrl, pin, BSP_IO_DIRECTION_INPUT); + if (err != FSP_SUCCESS) + { + LOG_E("PIN_MODE_INPUT configuration failed"); + return; + } + break; + + case PIN_MODE_OUTPUT_OD: + err = R_IOPORT_PinCfg(&g_ioport_ctrl, pin, IOPORT_CFG_NMOS_ENABLE); + if (err != FSP_SUCCESS) + { + LOG_E("PIN_MODE_OUTPUT_OD configuration failed"); + return; + } + break; + } +} + +static void ra_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) +{ + bsp_io_level_t level = BSP_IO_LEVEL_HIGH; + + if (value != level) + { + level = BSP_IO_LEVEL_LOW; + } + + R_BSP_PinAccessEnable(); + R_BSP_PinWrite(pin, level); + R_BSP_PinAccessDisable(); +} + +static int ra_pin_read(rt_device_t dev, rt_base_t pin) +{ + if ((pin > RA_MAX_PIN_VALUE) || (pin < RA_MIN_PIN_VALUE)) + { + LOG_E("GPIO pin value is illegal"); + return -RT_ERROR; + } + return R_BSP_PinRead(pin); +} + +static rt_err_t ra_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled) +{ +#ifdef R_ICU_H + rt_err_t err; + rt_int32_t irqx = ra_pin_get_irqx(pin); + if (PIN_IRQ_ENABLE == enabled) + { + if (0 <= irqx && irqx < sizeof(pin_irq_map) / sizeof(pin_irq_map[0])) + { + err = R_ICU_ExternalIrqOpen((external_irq_ctrl_t *const)pin_irq_map[irqx].irq_ctrl, + (external_irq_cfg_t const * const)pin_irq_map[irqx].irq_cfg); + /* Handle error */ + if (FSP_SUCCESS != err) + { + /* ICU Open failure message */ + LOG_E("\r\n**R_ICU_ExternalIrqOpen API FAILED**\r\n"); + return -RT_ERROR; + } + + err = R_ICU_ExternalIrqEnable((external_irq_ctrl_t *const)pin_irq_map[irqx].irq_ctrl); + /* Handle error */ + if (FSP_SUCCESS != err) + { + /* ICU Enable failure message */ + LOG_E("\r\n**R_ICU_ExternalIrqEnable API FAILED**\r\n"); + return -RT_ERROR; + } + } + } + else if (PIN_IRQ_DISABLE == enabled) + { + err = R_ICU_ExternalIrqDisable((external_irq_ctrl_t *const)pin_irq_map[irqx].irq_ctrl); + if (FSP_SUCCESS != err) + { + /* ICU Disable failure message */ + LOG_E("\r\n**R_ICU_ExternalIrqDisable API FAILED**\r\n"); + return -RT_ERROR; + } + err = R_ICU_ExternalIrqClose((external_irq_ctrl_t *const)pin_irq_map[irqx].irq_ctrl); + if (FSP_SUCCESS != err) + { + /* ICU Close failure message */ + LOG_E("\r\n**R_ICU_ExternalIrqClose API FAILED**\r\n"); + return -RT_ERROR; + } + } + return RT_EOK; +#else + return -RT_ERROR; +#endif +} + +static rt_err_t ra_pin_attach_irq(struct rt_device *device, rt_int32_t pin, + rt_uint32_t mode, void (*hdr)(void *args), void *args) +{ +#ifdef R_ICU_H + rt_int32_t irqx = ra_pin_get_irqx(pin); + if (0 <= irqx && irqx < (sizeof(pin_irq_map) / sizeof(pin_irq_map[0]))) + { + int level = rt_hw_interrupt_disable(); + if (pin_irq_hdr_tab[irqx].pin == irqx && + pin_irq_hdr_tab[irqx].hdr == hdr && + pin_irq_hdr_tab[irqx].mode == mode && + pin_irq_hdr_tab[irqx].args == args) + { + rt_hw_interrupt_enable(level); + return RT_EOK; + } + if (pin_irq_hdr_tab[irqx].pin != -1) + { + rt_hw_interrupt_enable(level); + return RT_EBUSY; + } + pin_irq_hdr_tab[irqx].pin = irqx; + pin_irq_hdr_tab[irqx].hdr = hdr; + pin_irq_hdr_tab[irqx].mode = mode; + pin_irq_hdr_tab[irqx].args = args; + rt_hw_interrupt_enable(level); + } + else return -RT_ERROR; + return RT_EOK; +#else + return -RT_ERROR; +#endif +} + +static rt_err_t ra_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) +{ +#ifdef R_ICU_H + rt_int32_t irqx = ra_pin_get_irqx(pin); + if (0 <= irqx && irqx < sizeof(pin_irq_map) / sizeof(pin_irq_map[0])) + { + int level = rt_hw_interrupt_disable(); + if (pin_irq_hdr_tab[irqx].pin == -1) + { + rt_hw_interrupt_enable(level); + return RT_EOK; + } + pin_irq_hdr_tab[irqx].pin = -1; + pin_irq_hdr_tab[irqx].hdr = RT_NULL; + pin_irq_hdr_tab[irqx].mode = 0; + pin_irq_hdr_tab[irqx].args = RT_NULL; + rt_hw_interrupt_enable(level); + } + else + { + return -RT_ERROR; + } + return RT_EOK; +#else + return -RT_ERROR; +#endif +} + +static rt_base_t ra_pin_get(const char *name) +{ + int pin_number = -1, port = -1, pin = -1; + if (rt_strlen(name) != 4) + return -1; + if ((name[0] == 'P') || (name[0] == 'p')) + { + if ('0' <= (int)name[1] && (int)name[1] <= '9') + { + port = ((int)name[1] - 48) * 16 * 16; + if ('0' <= (int)name[2] && (int)name[2] <= '9') + { + if ('0' <= (int)name[3] && (int)name[3] <= '9') + { + pin = ((int)name[2] - 48) * 10; + pin += (int)name[3] - 48; + pin_number = port + pin; + } + else return -1; + } + else return -1; + } + else return -1; + } + return pin_number; +} + +const static struct rt_pin_ops _ra_pin_ops = +{ + .pin_mode = ra_pin_mode, + .pin_write = ra_pin_write, + .pin_read = ra_pin_read, + .pin_attach_irq = ra_pin_attach_irq, + .pin_detach_irq = ra_pin_dettach_irq, + .pin_irq_enable = ra_pin_irq_enable, + .pin_get = ra_pin_get, +}; + +int rt_hw_pin_init(void) +{ +#ifdef R_ICU_H + ra_irq_tab_init(); + ra_pin_map_init(); +#endif + return rt_device_pin_register("pin", &_ra_pin_ops, RT_NULL); +} + +#ifdef R_ICU_H +void irq0_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (0 == pin_irq_hdr_tab[0].pin) + { + pin_irq_hdr_tab[0].hdr(pin_irq_hdr_tab[0].args); + } + rt_interrupt_leave(); +}; + +void irq1_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (1 == pin_irq_hdr_tab[1].pin) + { + pin_irq_hdr_tab[1].hdr(pin_irq_hdr_tab[1].args); + } + rt_interrupt_leave(); +}; + +void irq2_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (2 == pin_irq_hdr_tab[2].pin) + { + pin_irq_hdr_tab[2].hdr(pin_irq_hdr_tab[2].args); + } + rt_interrupt_leave(); +}; + +void irq3_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (3 == pin_irq_hdr_tab[3].pin) + { + pin_irq_hdr_tab[3].hdr(pin_irq_hdr_tab[3].args); + } + rt_interrupt_leave(); +}; + +void irq4_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (4 == pin_irq_hdr_tab[4].pin) + { + pin_irq_hdr_tab[4].hdr(pin_irq_hdr_tab[4].args); + } + rt_interrupt_leave(); +}; + +void irq5_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (5 == pin_irq_hdr_tab[5].pin) + { + pin_irq_hdr_tab[5].hdr(pin_irq_hdr_tab[5].args); + } + rt_interrupt_leave(); +}; + +void irq6_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (6 == pin_irq_hdr_tab[6].pin) + { + pin_irq_hdr_tab[6].hdr(pin_irq_hdr_tab[6].args); + } + rt_interrupt_leave(); +}; + +void irq7_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (7 == pin_irq_hdr_tab[7].pin) + { + pin_irq_hdr_tab[7].hdr(pin_irq_hdr_tab[7].args); + } + rt_interrupt_leave(); +}; + +void irq8_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (8 == pin_irq_hdr_tab[8].pin) + { + pin_irq_hdr_tab[8].hdr(pin_irq_hdr_tab[8].args); + } + rt_interrupt_leave(); +}; + +void irq9_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (9 == pin_irq_hdr_tab[9].pin) + { + pin_irq_hdr_tab[9].hdr(pin_irq_hdr_tab[9].args); + } + rt_interrupt_leave(); +}; + +void irq10_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (10 == pin_irq_hdr_tab[10].pin) + { + pin_irq_hdr_tab[10].hdr(pin_irq_hdr_tab[10].args); + } + rt_interrupt_leave(); +}; + +void irq11_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (11 == pin_irq_hdr_tab[11].pin) + { + pin_irq_hdr_tab[11].hdr(pin_irq_hdr_tab[11].args); + } + rt_interrupt_leave(); +}; + +void irq12_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (12 == pin_irq_hdr_tab[12].pin) + { + pin_irq_hdr_tab[12].hdr(pin_irq_hdr_tab[12].args); + } + rt_interrupt_leave(); +}; + +void irq13_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (13 == pin_irq_hdr_tab[13].pin) + { + pin_irq_hdr_tab[13].hdr(pin_irq_hdr_tab[13].args); + } + rt_interrupt_leave(); +}; + +void irq14_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (14 == pin_irq_hdr_tab[14].pin) + { + pin_irq_hdr_tab[14].hdr(pin_irq_hdr_tab[14].args); + } + rt_interrupt_leave(); +}; + +void irq15_callback(external_irq_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (15 == pin_irq_hdr_tab[15].pin) + { + pin_irq_hdr_tab[15].hdr(pin_irq_hdr_tab[15].args); + } + rt_interrupt_leave(); +}; +#endif /* R_ICU_H */ + +#endif /* RT_USING_PIN */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_gpio.h b/bsp/renesas/libraries/HAL_Drivers/drv_gpio.h new file mode 100644 index 0000000000..c13a125108 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_gpio.h @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-07-29 KyleChan first version + */ + +#ifndef __DRV_GPIO_H__ +#define __DRV_GPIO_H__ + +#include +#include +#include +#include +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define RA_MIN_PIN_VALUE BSP_IO_PORT_00_PIN_00 +#define RA_MAX_PIN_VALUE BSP_IO_PORT_11_PIN_15 + +#ifdef R_ICU_H +struct ra_pin_irq_map +{ + const icu_instance_ctrl_t *irq_ctrl; + const external_irq_cfg_t *irq_cfg; +}; +#endif + +int rt_hw_pin_init(void); +#ifdef __cplusplus +} +#endif + +#endif /* __DRV_GPIO_H__ */ + diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_pwm.c b/bsp/renesas/libraries/HAL_Drivers/drv_pwm.c new file mode 100644 index 0000000000..9b6369d9b3 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_pwm.c @@ -0,0 +1,220 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-25 KevinXu first version + */ + +#include "drv_pwm.h" + +#ifdef RT_USING_PWM + +/* Declare the control function first */ +static rt_err_t drv_pwm_control(struct rt_device_pwm *, int, void *); +static struct rt_pwm_ops drv_ops = +{ + drv_pwm_control +}; + +static struct ra_pwm ra6m4_pwm_obj[BSP_PWMS_NUM] = +{ +#ifdef BSP_USING_PWM0 + [BSP_PWM0_INDEX] = PWM_DRV_INITIALIZER(0), +#endif +#ifdef BSP_USING_PWM1 + [BSP_PWM1_INDEX] = PWM_DRV_INITIALIZER(1), +#endif +#ifdef BSP_USING_PWM2 + [BSP_PWM2_INDEX] = PWM_DRV_INITIALIZER(2), +#endif +#ifdef BSP_USING_PWM3 + [BSP_PWM3_INDEX] = PWM_DRV_INITIALIZER(3), +#endif +#ifdef BSP_USING_PWM4 + [BSP_PWM4_INDEX] = PWM_DRV_INITIALIZER(4), +#endif +#ifdef BSP_USING_PWM5 + [BSP_PWM5_INDEX] = PWM_DRV_INITIALIZER(5), +#endif +#ifdef BSP_USING_PWM6 + [BSP_PWM6_INDEX] = PWM_DRV_INITIALIZER(6), +#endif +#ifdef BSP_USING_PWM7 + [BSP_PWM7_INDEX] = PWM_DRV_INITIALIZER(7), +#endif +#ifdef BSP_USING_PWM8 + [BSP_PWM8_INDEX] = PWM_DRV_INITIALIZER(8), +#endif +#ifdef BSP_USING_PWM9 + [BSP_PWM9_INDEX] = PWM_DRV_INITIALIZER(9), +#endif +}; + + +/* Convert the raw PWM period counts into ns */ +static rt_uint32_t _convert_counts_ns(uint32_t source_div, uint32_t raw) +{ + uint32_t pclkd_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_PCLKD) >> source_div; + uint32_t ns = (uint32_t)(((uint64_t)raw * 1000000000ULL) / pclkd_freq_hz); + return ns; +} + +/* Convert ns into raw PWM period counts */ +static rt_uint32_t _convert_ns_counts(uint32_t source_div, uint32_t raw) +{ + uint32_t pclkd_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_PCLKD) >> source_div; + uint32_t counts = (uint32_t)(((uint64_t)raw * (uint64_t)pclkd_freq_hz) / 1000000000ULL); + return counts; +} + + +/* PWM_CMD_ENABLE or PWM_CMD_DISABLE */ +static rt_err_t drv_pwm_enable(struct ra_pwm *device, + struct rt_pwm_configuration *configuration, + rt_bool_t enable) +{ + fsp_err_t err = FSP_SUCCESS; + + if (enable) + { + err = R_GPT_Start(device->g_ctrl); + } + else + { + err = R_GPT_Stop(device->g_ctrl); + } + + return (err == FSP_SUCCESS) ? RT_EOK : -RT_ERROR; +} + +/* PWM_CMD_GET */ +static rt_err_t drv_pwm_get(struct ra_pwm *device, + struct rt_pwm_configuration *configuration) +{ + timer_info_t info; + if (R_GPT_InfoGet(device->g_ctrl, &info) != FSP_SUCCESS) + return -RT_ERROR; + + configuration->pulse = + _convert_counts_ns(device->g_cfg->source_div, device->g_cfg->duty_cycle_counts); + configuration->period = + _convert_counts_ns(device->g_cfg->source_div, info.period_counts); + configuration->channel = device->g_cfg->channel; + + return RT_EOK; +} + +/* PWM_CMD_SET */ +static rt_err_t drv_pwm_set(struct ra_pwm *device, + struct rt_pwm_configuration *conf) +{ + uint32_t counts; + fsp_err_t fsp_erra; + fsp_err_t fsp_errb; + rt_err_t rt_err; + uint32_t pulse; + uint32_t period; + struct rt_pwm_configuration orig_conf; + + rt_err = drv_pwm_get(device, &orig_conf); + if (rt_err != RT_EOK) + { + return rt_err; + } + + /* Pulse cannot last longer than period. */ + period = conf->period; + pulse = (period >= conf->pulse) ? conf->pulse : period; + + /* Not to set period again if it's not changed. */ + if (period != orig_conf.period) + { + counts = _convert_ns_counts(device->g_cfg->source_div, period); + fsp_erra = R_GPT_PeriodSet(device->g_ctrl, counts); + if (fsp_erra != FSP_SUCCESS) + { + return -RT_ERROR; + } + } + + /* Two pins of a channel will not be separated. */ + counts = _convert_ns_counts(device->g_cfg->source_div, pulse); + fsp_erra = R_GPT_DutyCycleSet(device->g_ctrl, counts, GPT_IO_PIN_GTIOCA); + fsp_errb = R_GPT_DutyCycleSet(device->g_ctrl, counts, GPT_IO_PIN_GTIOCB); + if (fsp_erra != FSP_SUCCESS || fsp_errb != FSP_SUCCESS) + { + return -RT_ERROR; + } + + return RT_EOK; +} + +/** + * Implement of control method in struct rt_pwm_ops. + */ +static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg) +{ + struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg; + struct ra_pwm *pwm_device = (struct ra_pwm *)device->parent.user_data; + + /** + * There's actually only one GPT timer with 10 channels. In this case, the + * timer is separated into 10 PWM devices, so each device has only one + * channel. + */ + if (configuration->channel != 0) + { + return -RT_EINVAL; + } + + switch (cmd) + { + case PWM_CMD_ENABLE: + return drv_pwm_enable(pwm_device, configuration, RT_TRUE); + case PWM_CMD_DISABLE: + return drv_pwm_enable(pwm_device, configuration, RT_FALSE); + case PWM_CMD_GET: + return drv_pwm_get(pwm_device, configuration); + case PWM_CMD_SET: + return drv_pwm_set(pwm_device, configuration); + default: + return -RT_EINVAL; + } + + return RT_EOK; +} + +/** + * This is to register the PWM device + * + * Note that the PWM driver only supports one fixed pin. + */ +int rt_hw_pwm_init(void) +{ + rt_err_t ret = RT_EOK; + rt_err_t rt_err = RT_EOK; + fsp_err_t fsp_err = FSP_SUCCESS; + + for (int i = 0; i < BSP_PWMS_NUM; i++) + { + fsp_err = R_GPT_Open(ra6m4_pwm_obj[i].g_ctrl, + ra6m4_pwm_obj[i].g_cfg); + + rt_err = rt_device_pwm_register(&ra6m4_pwm_obj[i].pwm_device, + ra6m4_pwm_obj[i].name, + &drv_ops, + &ra6m4_pwm_obj[i]); + + if (fsp_err != FSP_SUCCESS || rt_err != RT_EOK) + { + ret = -RT_ERROR; + } + } + + return ret; +} +INIT_BOARD_EXPORT(rt_hw_pwm_init); +#endif /* RT_USING_PWM */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_pwm.h b/bsp/renesas/libraries/HAL_Drivers/drv_pwm.h new file mode 100644 index 0000000000..0bf39b8699 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_pwm.h @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-25 KevinXu first version + */ + +#ifndef __DRV_PWM_H__ +#define __DRV_PWM_H__ + +#include +#include +#include +#include +#include +#include + +/* PWM device object structure */ +struct ra_pwm +{ + struct rt_device_pwm pwm_device; + gpt_instance_ctrl_t *g_ctrl; + timer_instance_t const *const g_timer; + timer_cfg_t const *const g_cfg; + char *name; +}; + +/* Get ra6m4 pwm device object from the general pwm device object */ +#define _GET_RA6M4_PWM_OBJ(ptr) rt_container_of(ptr, struct ra_pwm, pwm_device) + +#endif /* __DRV_PWM_H__ */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_rtc.c b/bsp/renesas/libraries/HAL_Drivers/drv_rtc.c new file mode 100644 index 0000000000..379213fd93 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_rtc.c @@ -0,0 +1,226 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-14 Mr.Tiger first version + */ + +#include +#include +#include "board.h" +#include +#include "hal_data.h" + +#ifdef BSP_USING_ONCHIP_RTC + +#define DBG_TAG "drv.rtc" +#ifdef DRV_DEBUG + #define DBG_LVL DBG_LOG +#else + #define DBG_LVL DBG_INFO +#endif /* DRV_DEBUG */ +#include + +static rt_err_t ra_rtc_init(void) +{ + rt_err_t result = RT_EOK; + + if (R_RTC_Open(&g_rtc_ctrl, &g_rtc_cfg) != RT_EOK) + { + LOG_E("rtc init failed."); + result = -RT_ERROR; + } + + return result; +} + +static time_t get_rtc_timestamp(void) +{ + struct tm tm_new = {0}; + rtc_time_t g_current_time = {0}; + + R_RTC_CalendarTimeGet(&g_rtc_ctrl, &g_current_time); + + tm_new.tm_year = g_current_time.tm_year; + tm_new.tm_mon = g_current_time.tm_mon; + tm_new.tm_mday = g_current_time.tm_mday; + + tm_new.tm_hour = g_current_time.tm_hour; + tm_new.tm_min = g_current_time.tm_min; + tm_new.tm_sec = g_current_time.tm_sec; + + tm_new.tm_wday = g_current_time.tm_wday; + tm_new.tm_yday = g_current_time.tm_yday; + tm_new.tm_isdst = g_current_time.tm_isdst; + + return timegm(&tm_new); +} + +static rt_err_t ra_get_secs(void *args) +{ + *(rt_uint32_t *)args = get_rtc_timestamp(); + LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args); + + return RT_EOK; +} + +static rt_err_t set_rtc_time_stamp(time_t time_stamp) +{ + struct tm *p_tm; + rtc_time_t g_current_time = {0}; + p_tm = gmtime(&time_stamp); + if (p_tm->tm_year < 100) + { + return -RT_ERROR; + } + + g_current_time.tm_sec = p_tm->tm_sec ; + g_current_time.tm_min = p_tm->tm_min ; + g_current_time.tm_hour = p_tm->tm_hour; + + g_current_time.tm_mday = p_tm->tm_mday; + g_current_time.tm_mon = p_tm->tm_mon; + g_current_time.tm_year = p_tm->tm_year; + + g_current_time.tm_wday = p_tm->tm_wday; + g_current_time.tm_yday = p_tm->tm_yday; + + if (R_RTC_CalendarTimeSet(&g_rtc_ctrl, &g_current_time) != FSP_SUCCESS) + { + LOG_E("set rtc time failed."); + return -RT_ERROR; + } + + return RT_EOK; +} + +static rt_err_t ra_set_secs(void *args) +{ + + rt_err_t result = RT_EOK; + + if (set_rtc_time_stamp(*(rt_uint32_t *)args)) + { + result = -RT_ERROR; + } + LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args); + + return result; +} + +#ifdef RT_USING_ALARM +static rt_err_t ra_get_alarm(void *arg) +{ + rt_err_t result = RT_EOK; + struct rt_rtc_wkalarm *wkalarm = (struct rt_rtc_wkalarm *)arg; + rtc_alarm_time_t alarm_time_get = + { + .sec_match = RT_FALSE, + .min_match = RT_FALSE, + .hour_match = RT_FALSE, + .mday_match = RT_FALSE, + .mon_match = RT_FALSE, + .year_match = RT_FALSE, + .dayofweek_match = RT_FALSE, + }; + + if (RT_EOK == R_RTC_CalendarAlarmGet(&g_rtc_ctrl, &alarm_time_get)) + { + wkalarm->tm_hour = alarm_time_get.time.tm_hour; + wkalarm->tm_min = alarm_time_get.time.tm_min; + wkalarm->tm_sec = alarm_time_get.time.tm_sec; + } + else + { + LOG_E("Calendar alarm Get failed."); + } + + return result; +} + +static rt_err_t ra_set_alarm(void *arg) +{ + rt_err_t result = RT_EOK; + struct rt_rtc_wkalarm *wkalarm = (struct rt_rtc_wkalarm *)arg; + rtc_alarm_time_t alarm_time_set = + { + .sec_match = RT_TRUE, + .min_match = RT_TRUE, + .hour_match = RT_TRUE, + .mday_match = RT_FALSE, + .mon_match = RT_FALSE, + .year_match = RT_FALSE, + .dayofweek_match = RT_FALSE, + }; + + alarm_time_set.time.tm_hour = wkalarm->tm_hour; + alarm_time_set.time.tm_min = wkalarm->tm_min; + alarm_time_set.time.tm_sec = wkalarm->tm_sec; + if (1 == wkalarm->enable) + { + if (RT_EOK != R_RTC_CalendarAlarmSet(&g_rtc_ctrl, &alarm_time_set)) + { + LOG_E("Calendar alarm Set failed."); + result = -RT_ERROR; + } + } + else + { + alarm_time_set.sec_match = RT_FALSE; + alarm_time_set.min_match = RT_FALSE; + alarm_time_set.hour_match = RT_FALSE; + if (RT_EOK != R_RTC_CalendarAlarmSet(&g_rtc_ctrl, &alarm_time_set)) + { + LOG_E("Calendar alarm Stop failed."); + result = -RT_ERROR; + } + } + return result; +} +#endif /* RT_USING_ALARM */ + +void rtc_callback(rtc_callback_args_t *p_args) +{ +#ifdef RT_USING_ALARM + static rt_device_t ra_device; + if (RTC_EVENT_ALARM_IRQ == p_args->event) + { + rt_alarm_update(ra_device, 1); + } +#endif +} + +static const struct rt_rtc_ops ra_rtc_ops = +{ + .init = ra_rtc_init, + .get_secs = ra_get_secs, + .set_secs = ra_set_secs, +#ifdef RT_USING_ALARM + .set_alarm = ra_set_alarm, + .get_alarm = ra_get_alarm, +#endif +}; + +static rt_rtc_dev_t ra_rtc_dev; + +static int rt_hw_rtc_init(void) +{ + rt_err_t result; + + ra_rtc_dev.ops = &ra_rtc_ops; + + result = rt_hw_rtc_register(&ra_rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR, RT_NULL); + if (result != RT_EOK) + { + LOG_E("rtc register err code: %d", result); + return result; + } + LOG_D("rtc init success"); + + return RT_EOK; +} +INIT_DEVICE_EXPORT(rt_hw_rtc_init); +#endif diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_sdhi.c b/bsp/renesas/libraries/HAL_Drivers/drv_sdhi.c new file mode 100644 index 0000000000..50f3404f32 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_sdhi.c @@ -0,0 +1,510 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-11-03 mazhiyuan first version + */ + +#include +struct ra_sdhi sdhi; + +#define RTHW_SDIO_LOCK(_sdio) rt_mutex_take(&_sdio->mutex, RT_WAITING_FOREVER) +#define RTHW_SDIO_UNLOCK(_sdio) rt_mutex_release(&_sdio->mutex); + +struct rthw_sdio +{ + struct rt_mmcsd_host *host; + struct ra_sdhi sdhi_des; + struct rt_event event; + struct rt_mutex mutex; +}; + +static struct rt_mmcsd_host *host; + +ALIGN(SDIO_ALIGN_LEN) +static rt_uint8_t cache_buf[SDIO_BUFF_SIZE]; + +rt_err_t command_send(sdhi_instance_ctrl_t *p_ctrl, struct rt_mmcsd_cmd *cmd) +{ + uint32_t wait_bit; + uint32_t timeout = BUSY_TIMEOUT_US; + volatile sdhi_event_t event; + struct rt_mmcsd_data *data = cmd->data; + while (SD_INFO2_CBSY_SDD0MON_IDLE_VAL != + (p_ctrl->p_reg->SD_INFO2 & SD_INFO2_CBSY_SDD0MON_IDLE_MASK)) + { + if (timeout == 0) + { + return RT_ETIMEOUT; + } + R_BSP_SoftwareDelay(1U, BSP_DELAY_UNITS_MICROSECONDS); + timeout--; + } + p_ctrl->p_reg->SD_INFO1 = 0U; + p_ctrl->p_reg->SD_INFO2 = 0U; + p_ctrl->sdhi_event.word = 0U; + + /* Enable response end interrupt. */ + /* Disable access end interrupt and enable response end interrupt. */ + uint32_t mask = p_ctrl->p_reg->SD_INFO1_MASK; + mask &= (~SDHI_INFO1_RESPONSE_END); + mask |= SDHI_INFO1_ACCESS_END; + p_ctrl->p_reg->SD_INFO1_MASK = mask; + p_ctrl->p_reg->SD_INFO2_MASK = SDHI_INFO2_MASK_CMD_SEND; + /* Write argument, then command to the SDHI peripheral. */ + p_ctrl->p_reg->SD_ARG = cmd->arg & UINT16_MAX; + p_ctrl->p_reg->SD_ARG1 = cmd->arg >> 16; + + if ((cmd->flags & CMD_MASK) == CMD_ADTC) + { + cmd->cmd_code |= SDHI_CMD_ADTC_EN; + switch (cmd->flags & RESP_MASK) + { + case RESP_R1: + case RESP_R5: + case RESP_R6: + case RESP_R7: + cmd->cmd_code |= SDHI_CMD_RESP_TYPE_EXT_R1_R5_R6_R7; + break; + case RESP_R1B: + cmd->cmd_code |= SDHI_CMD_RESP_TYPE_EXT_R1B; + break; + case RESP_R2: + cmd->cmd_code |= SDHI_CMD_RESP_TYPE_EXT_R2; + break; + case RESP_R3: + case RESP_R4: + cmd->cmd_code |= SDHI_CMD_RESP_TYPE_EXT_R3_R4; + break; + case RESP_NONE: + cmd->cmd_code |= SDHI_CMD_RESP_TYPE_EXT_NONE; + break; + } + if (data != RT_NULL) + { + if ((data->flags & 7) == DATA_DIR_WRITE) + { + cmd->cmd_code &= ~SDHI_CMD_DATA_DIR_READ; + } + else if ((data->flags & 7) == DATA_DIR_READ) + { + cmd->cmd_code |= SDHI_CMD_DATA_DIR_READ; + } + } + } + p_ctrl->p_reg->SD_CMD = cmd->cmd_code; + + timeout = 100000; + while (true) + { + /* Check for updates to the event status. */ + event.word = p_ctrl->sdhi_event.word; + + /* Return an error if a hardware error occurred. */ + if (event.bit.event_error) + { + cmd->err = -RT_ERROR; + if ((event.word & HW_SDHI_ERR_CRCE) && (resp_type(cmd) & (RESP_R3 | RESP_R4))) + { + if ((cmd->flags & RESP_MASK) == RESP_R2) + { + cmd->resp[0] = (p_ctrl->p_reg->SD_RSP76 << 8) | (p_ctrl->p_reg->SD_RSP54 >> 24); + cmd->resp[1] = (p_ctrl->p_reg->SD_RSP54 << 8) | (p_ctrl->p_reg->SD_RSP32 >> 24); + cmd->resp[2] = (p_ctrl->p_reg->SD_RSP32 << 8) | (p_ctrl->p_reg->SD_RSP10 >> 24); + cmd->resp[3] = (p_ctrl->p_reg->SD_RSP10 << 8); + } + else + { + cmd->resp[0] = p_ctrl->p_reg->SD_RSP10; + } + cmd->err = RT_EOK; + } + if (event.word & HW_SDHI_ERR_RTIMEOUT) + { + cmd->err = -RT_ETIMEOUT; + } + if (event.word & HW_SDHI_ERR_DTIMEOUT) + { + data->err = -RT_ETIMEOUT; + } + return -RT_ERROR; + } + if (data != RT_NULL) + { + wait_bit = SDHI_WAIT_ACCESS_BIT; + } + else + { + wait_bit = SDHI_WAIT_RESPONSE_BIT; + } + + /* If the requested bit is set, return success. */ + if (event.word & (1U << wait_bit)) + { + cmd->err = RT_EOK; + if ((cmd->flags & RESP_MASK) == RESP_R2) + { + cmd->resp[0] = (p_ctrl->p_reg->SD_RSP76 << 8) | (p_ctrl->p_reg->SD_RSP54 >> 24); + cmd->resp[1] = (p_ctrl->p_reg->SD_RSP54 << 8) | (p_ctrl->p_reg->SD_RSP32 >> 24); + cmd->resp[2] = (p_ctrl->p_reg->SD_RSP32 << 8) | (p_ctrl->p_reg->SD_RSP10 >> 24); + cmd->resp[3] = (p_ctrl->p_reg->SD_RSP10 << 8); + } + else + { + cmd->resp[0] = p_ctrl->p_reg->SD_RSP10; + } + + return RT_EOK; + } + + /* Check for timeout. */ + timeout--; + if (0U == timeout) + { + cmd->err = -RT_ETIMEOUT; + return RT_ERROR; + } + + /* Wait 1 us for consistent loop timing. */ + R_BSP_SoftwareDelay(1U, BSP_DELAY_UNITS_MICROSECONDS); + } +} + +rt_err_t transfer_write(sdhi_instance_ctrl_t *const p_ctrl, + uint32_t block_count, + uint32_t bytes, + const uint8_t *p_data) +{ + transfer_info_t *p_info = p_ctrl->p_cfg->p_lower_lvl_transfer->p_cfg->p_info; + + /* When the SD_DMAEN.DMAEN bit is 1, set the SD_INFO2_MASK.BWEM bit to 1 and the SD_INFO2_MASK.BREM bit to 1. */ + p_ctrl->p_reg->SD_INFO2_MASK |= 0x300U; + p_ctrl->p_reg->SD_DMAEN = 0x2U; + + uint32_t transfer_settings = (uint32_t)TRANSFER_MODE_BLOCK << TRANSFER_SETTINGS_MODE_BITS; + transfer_settings |= TRANSFER_ADDR_MODE_INCREMENTED << TRANSFER_SETTINGS_SRC_ADDR_BITS; + transfer_settings |= TRANSFER_SIZE_4_BYTE << TRANSFER_SETTINGS_SIZE_BITS; + +#if SDMMC_CFG_UNALIGNED_ACCESS_ENABLE + if ((0U != ((uint32_t)p_data & 0x3U)) || (0U != (bytes & 3U))) + { + transfer_settings |= TRANSFER_IRQ_EACH << TRANSFER_SETTINGS_IRQ_BITS; + transfer_settings |= TRANSFER_REPEAT_AREA_SOURCE << TRANSFER_SETTINGS_REPEAT_AREA_BITS; + + /* If the pointer is not 4-byte aligned or the number of bytes is not a multiple of 4, use a temporary buffer. + * Transfer the first block to the temporary buffer before enabling the transfer. Subsequent blocks will be + * transferred from the user buffer to the temporary buffer in an interrupt after each block transfer. */ + rt_memcpy((void *)&p_ctrl->aligned_buff[0], p_data, bytes); + p_info->p_src = &p_ctrl->aligned_buff[0]; + + p_ctrl->transfer_block_current = 1U; + p_ctrl->transfer_blocks_total = block_count; + p_ctrl->p_transfer_data = (uint8_t *)&p_data[bytes]; + p_ctrl->transfer_dir = SDHI_TRANSFER_DIR_WRITE; + p_ctrl->transfer_block_size = bytes; + } + else +#endif + { + p_info->p_src = p_data; + } + + p_info->transfer_settings_word = transfer_settings; + p_info->p_dest = (uint32_t *)(&p_ctrl->p_reg->SD_BUF0); + p_info->num_blocks = (uint16_t)block_count; + + /* Round up to the nearest multiple of 4 bytes for the transfer. */ + uint32_t words = (bytes + (sizeof(uint32_t) - 1U)) / sizeof(uint32_t); + p_info->length = (uint16_t)words; + /* Configure the transfer driver to write to the SD buffer. */ + fsp_err_t err = p_ctrl->p_cfg->p_lower_lvl_transfer->p_api->reconfigure(p_ctrl->p_cfg->p_lower_lvl_transfer->p_ctrl, + p_ctrl->p_cfg->p_lower_lvl_transfer->p_cfg->p_info); + if (FSP_SUCCESS != err) + return RT_ERROR; + return RT_EOK; +} + +rt_err_t transfer_read(sdhi_instance_ctrl_t *const p_ctrl, + uint32_t block_count, + uint32_t bytes, + void *p_data) +{ + transfer_info_t *p_info = p_ctrl->p_cfg->p_lower_lvl_transfer->p_cfg->p_info; + + /* When the SD_DMAEN.DMAEN bit is 1, set the SD_INFO2_MASK.BWEM bit to 1 and the SD_INFO2_MASK.BREM bit to 1. */ + p_ctrl->p_reg->SD_INFO2_MASK |= 0X300U; + p_ctrl->p_reg->SD_DMAEN = 0x2U; + + uint32_t transfer_settings = (uint32_t)TRANSFER_MODE_BLOCK << TRANSFER_SETTINGS_MODE_BITS; + transfer_settings |= TRANSFER_ADDR_MODE_INCREMENTED << TRANSFER_SETTINGS_DEST_ADDR_BITS; + transfer_settings |= TRANSFER_SIZE_4_BYTE << TRANSFER_SETTINGS_SIZE_BITS; + +#if SDMMC_CFG_UNALIGNED_ACCESS_ENABLE + + /* If the pointer is not 4-byte aligned or the number of bytes is not a multiple of 4, use a temporary buffer. + * Data will be transferred from the temporary buffer into the user buffer in an interrupt after each block transfer. */ + if ((0U != ((uint32_t)p_data & 0x3U)) || (0U != (bytes & 3U))) + { + transfer_settings |= TRANSFER_IRQ_EACH << TRANSFER_SETTINGS_IRQ_BITS; + p_info->p_dest = &p_ctrl->aligned_buff[0]; + + p_ctrl->transfer_block_current = 0U; + p_ctrl->transfer_blocks_total = block_count; + p_ctrl->p_transfer_data = (uint8_t *)p_data; + p_ctrl->transfer_dir = SDHI_TRANSFER_DIR_READ; + p_ctrl->transfer_block_size = bytes; + } + else +#endif + { + transfer_settings |= TRANSFER_REPEAT_AREA_SOURCE << TRANSFER_SETTINGS_REPEAT_AREA_BITS; + p_info->p_dest = p_data; + } + + p_info->transfer_settings_word = transfer_settings; + p_info->p_src = (uint32_t *)(&p_ctrl->p_reg->SD_BUF0); + p_info->num_blocks = (uint16_t)block_count; + + /* Round up to the nearest multiple of 4 bytes for the transfer. */ + uint32_t words = (bytes + (sizeof(uint32_t) - 1U)) / sizeof(uint32_t); + p_info->length = (uint16_t)words; + + /* Configure the transfer driver to read from the SD buffer. */ + fsp_err_t err = p_ctrl->p_cfg->p_lower_lvl_transfer->p_api->reconfigure(p_ctrl->p_cfg->p_lower_lvl_transfer->p_ctrl, + p_ctrl->p_cfg->p_lower_lvl_transfer->p_cfg->p_info); + if (err != FSP_SUCCESS) + return RT_ERROR; + + return RT_EOK; +} + +void ra_sdhi_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req) +{ + struct rthw_sdio *sdio = host->private_data; + struct rt_mmcsd_data *data; + static rt_uint8_t *buffer; + + RTHW_SDIO_LOCK(sdio); + + if (req->cmd != RT_NULL) + { + data = req->cmd->data; + if (data != RT_NULL) + { + rt_uint32_t size = data->blks * data->blksize; + + RT_ASSERT(size <= SDIO_BUFF_SIZE); + + buffer = (rt_uint8_t *)data->buf; + if ((rt_uint32_t)data->buf & (SDIO_ALIGN_LEN - 1)) + { + buffer = cache_buf; + if (data->flags & DATA_DIR_WRITE) + { + rt_memcpy(cache_buf, data->buf, size); + } + } + if (data->flags & DATA_DIR_WRITE) + { + transfer_write(sdio->sdhi_des.instance->p_ctrl, data->blks, data->blksize, buffer); + } + else if (data->flags & DATA_DIR_READ) + { + transfer_read(sdio->sdhi_des.instance->p_ctrl, data->blks, data->blksize, buffer); + } + /* Set the sector count. */ + if (data->blks > 1U) + { + ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_STOP = 0x100U; + ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_SECCNT = data->blks; + } + else + { + ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_STOP = 0U; + } + ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_SIZE = data->blksize; + } + rt_enter_critical(); + command_send(sdio->sdhi_des.instance->p_ctrl, req->cmd); + rt_exit_critical(); + if ((data != RT_NULL) && (data->flags & DATA_DIR_READ) && ((rt_uint32_t)data->buf & (SDIO_ALIGN_LEN - 1))) + { + rt_memcpy(data->buf, cache_buf, data->blksize * data->blks); + } + } + + if (req->stop != RT_NULL) + { + rt_enter_critical(); + command_send(sdio->sdhi_des.instance->p_ctrl, req->stop); + rt_exit_critical(); + } + RTHW_SDIO_UNLOCK(sdio); + mmcsd_req_complete(sdio->host); +} + +static rt_err_t clock_rate_set(sdhi_instance_ctrl_t *p_ctrl, uint32_t max_rate) +{ + uint32_t setting = 0xFFU; + + /* Get the runtime frequency of the source of the SD clock */ + uint32_t frequency = R_FSP_SystemClockHzGet(BSP_FEATURE_SDHI_CLOCK); + + /* Iterate over all possible divisors, starting with the smallest, until the resulting clock rate is less than + * or equal to the requested maximum rate. */ + for (uint32_t divisor_shift = BSP_FEATURE_SDHI_MIN_CLOCK_DIVISION_SHIFT; + divisor_shift <= 9U; + divisor_shift++) + { + if ((frequency >> divisor_shift) <= max_rate) + { + /* If the calculated frequency is less than or equal to the maximum supported by the device, + * select this frequency. The register setting is the divisor value divided by 4, or 0xFF for no divider. */ + setting = divisor_shift ? ((1U << divisor_shift) >> 2U) : UINT8_MAX; + + /* Set the clock setting. */ + + /* The clock register is accessible 8 SD clock counts after the last command completes. Each register access + * requires at least one PCLK count, so check the register up to 8 times the maximum PCLK divisor value (512). */ + uint32_t timeout = 8U * 512U; + + while (timeout > 0U) + { + /* Do not write to clock control register until this bit is set. */ + if (p_ctrl->p_reg->SD_INFO2_b.SD_CLK_CTRLEN) + { + /* Set the calculated divider and enable clock output to start the 74 clocks required before + * initialization. Do not change the automatic clock control setting. */ + uint32_t clkctrlen = p_ctrl->p_reg->SD_CLK_CTRL & (1U << 9); + p_ctrl->p_reg->SD_CLK_CTRL = setting | clkctrlen | (1U << 8); + p_ctrl->device.clock_rate = frequency >> divisor_shift; + + return RT_EOK; + } + + timeout--; + } + + /* Valid setting already found, stop looking. */ + break; + } + } + + return RT_ERROR; +} + +void ra_sdhi_set_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg) +{ + struct rthw_sdio *sdio = host->private_data; + RTHW_SDIO_LOCK(sdio); + if (io_cfg->bus_width == MMCSD_BUS_WIDTH_1) + { + ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_OPTION_b.WIDTH = 1; + } + else if (io_cfg->bus_width == MMCSD_BUS_WIDTH_4) + { + ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_OPTION_b.WIDTH = 0; + ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_OPTION_b.WIDTH8 = 0; + } + else if (io_cfg->bus_width == MMCSD_BUS_WIDTH_8) + { + ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_OPTION_b.WIDTH = 0; + ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_OPTION_b.WIDTH8 = 1; + } + clock_rate_set(sdio->sdhi_des.instance->p_ctrl, io_cfg->clock); + RTHW_SDIO_UNLOCK(sdio); +} + +rt_int32_t ra_sdhi_get_card_status(struct rt_mmcsd_host *host) +{ + sdmmc_status_t status; + struct rthw_sdio *sdio = host->private_data; + sdio->sdhi_des.instance->p_api->statusGet(sdio->sdhi_des.instance->p_ctrl, &status); + return status.card_inserted; +} + +void ra_sdhi_enable_sdio_irq(struct rt_mmcsd_host *host, rt_int32_t en) +{ + struct rthw_sdio *sdio = host->private_data; + sdio->sdhi_des.instance->p_api->ioIntEnable(sdio->sdhi_des.instance->p_ctrl, en); +} + +struct rt_mmcsd_host_ops ra_sdhi_ops = +{ + .request = ra_sdhi_request, + .set_iocfg = ra_sdhi_set_iocfg, + .get_card_status = ra_sdhi_get_card_status, + .enable_sdio_irq = ra_sdhi_enable_sdio_irq +}; + +void sdhi_callback(sdmmc_callback_args_t *p_args) +{ +} + +struct rt_mmcsd_host *sdio_host_create(struct ra_sdhi *sdhi_des) +{ + struct rt_mmcsd_host *host; + struct rthw_sdio *sdio = RT_NULL; + + if (sdhi_des == RT_NULL) + return RT_NULL; + + sdio = rt_malloc(sizeof(struct rthw_sdio)); + if (sdio == RT_NULL) + return RT_NULL; + rt_memset(sdio, 0, sizeof(struct rthw_sdio)); + + host = mmcsd_alloc_host(); + if (host == RT_NULL) + { + rt_free(sdio); + return RT_NULL; + } + + rt_memcpy(&sdio->sdhi_des, sdhi_des, sizeof(struct ra_sdhi)); + + rt_event_init(&sdio->event, "sdio", RT_IPC_FLAG_FIFO); + rt_mutex_init(&sdio->mutex, "sdio", RT_IPC_FLAG_FIFO); + + /* set host defautl attributes */ + host->ops = &ra_sdhi_ops; + host->freq_min = 400 * 1000; + host->freq_max = SDIO_MAX_FREQ; + host->valid_ocr = 0X00FFFF80; /* The voltage range supported is 1.65v-3.6v */ +#ifndef SDHI_USING_1_BIT + host->flags = MMCSD_BUSWIDTH_4 | MMCSD_MUTBLKWRITE | MMCSD_SUP_SDIO_IRQ; +#else + host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_SDIO_IRQ; +#endif + host->max_seg_size = SDIO_BUFF_SIZE; + host->max_dma_segs = 1; + host->max_blk_size = 512; + host->max_blk_count = 512; + + /* link up host and sdio */ + sdio->host = host; + host->private_data = sdio; + + ra_sdhi_enable_sdio_irq(host, 1); + + /* ready to change */ + mmcsd_change(host); + + return host; +} + +int rt_hw_sdhi_init(void) +{ + sdhi.instance = &g_sdmmc0; + sdhi.instance->p_api->open(sdhi.instance->p_ctrl, sdhi.instance->p_cfg); + host = sdio_host_create(&sdhi); + if (host == RT_NULL) + { + return -1; + } + return 0; +} +INIT_DEVICE_EXPORT(rt_hw_sdhi_init); diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_sdhi.h b/bsp/renesas/libraries/HAL_Drivers/drv_sdhi.h new file mode 100644 index 0000000000..e65ea5c510 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_sdhi.h @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-11-03 mazhiyuan first version + */ + +#ifndef __DRV_SDHI_H__ +#define __DRV_SDHI_H__ + +#include +#include +#include +#include +#include +#include + +#ifndef SDIO_BUFF_SIZE + #define SDIO_BUFF_SIZE 4096 +#endif + +#ifndef SDIO_ALIGN_LEN + #define SDIO_ALIGN_LEN (32) +#endif + +#define SD_INFO2_CBSY_SDD0MON_IDLE_VAL 0x80 +#define SD_INFO2_CBSY_SDD0MON_IDLE_MASK 0x4080 +#define BUSY_TIMEOUT_US 5000000 + +#define SDHI_INFO1_RESPONSE_END 1 +#define SDHI_INFO1_ACCESS_END (1 << 2) +#define SDHI_INFO2_MASK_CMD_SEND 0x00007C80U +#define SDHI_INFO2_BRE (1 << 8) +#define SDHI_INFO2_BWE (1 << 9) + +#define SDHI_CMD_RESP_TYPE_EXT_NONE (0 << 8) +#define SDHI_CMD_RESP_TYPE_EXT_R1_R5_R6_R7 (4 << 8) +#define SDHI_CMD_RESP_TYPE_EXT_R1B (5 << 8) +#define SDHI_CMD_RESP_TYPE_EXT_R2 (6 << 8) +#define SDHI_CMD_RESP_TYPE_EXT_R3_R4 (7 << 8) +#define SDHI_CMD_ADTC_EN (1 << 11) +#define SDHI_CMD_DATA_DIR_READ (1 << 12) +#define SDHI_BLK_TRANSFER (1 << 13) + +#define SDIO_MAX_FREQ 25000000 + +#define HW_SDHI_ERR_CRCE (0x01U << 17) +#define HW_SDHI_ERR_RTIMEOUT (0x01U << 22) +#define HW_SDHI_ERR_DTIMEOUT (0x01U << 19) + +#define SDHI_WAIT_ACCESS_BIT 2 +#define SDHI_WAIT_RESPONSE_BIT 0 + +#define SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS (1000000U) + +struct ra_sdhi +{ + const sdmmc_instance_t *instance; + sdmmc_device_t *media_device; +}; + +#endif diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_soft_i2c.c b/bsp/renesas/libraries/HAL_Drivers/drv_soft_i2c.c new file mode 100644 index 0000000000..2bd18241fa --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_soft_i2c.c @@ -0,0 +1,218 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-07-29 KyleChan first version + */ + +#include "board.h" +#include "drv_soft_i2c.h" +#include "drv_config.h" + +#ifdef RT_USING_I2C + +#define DBG_TAG "drv.i2c" +#ifdef DRV_DEBUG + #define DBG_LVL DBG_LOG +#else + #define DBG_LVL DBG_INFO +#endif /* DRV_DEBUG */ + +#if !defined(BSP_USING_I2C0) && !defined(BSP_USING_I2C1) + #error "Please define at least one BSP_USING_I2Cx" + /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */ +#endif + +static const struct ra_soft_i2c_config soft_i2c_config[] = +{ +#ifdef BSP_USING_I2C0 + I2C0_BUS_CONFIG, +#endif +#ifdef BSP_USING_I2C1 + I2C1_BUS_CONFIG, +#endif +}; + +static struct ra_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])]; + +/** + * This function initializes the i2c pin. + * + * @param ra i2c dirver class. + */ +static void ra_i2c_gpio_init(struct ra_i2c *i2c) +{ + struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)i2c->ops.data; + + rt_pin_mode(cfg->scl, PIN_MODE_OUTPUT_OD); + rt_pin_mode(cfg->sda, PIN_MODE_OUTPUT_OD); + + rt_pin_write(cfg->scl, PIN_HIGH); + rt_pin_write(cfg->sda, PIN_HIGH); +} + +/** + * This function sets the sda pin. + * + * @param ra config class. + * @param The sda pin state. + */ +static void ra_set_sda(void *data, rt_int32_t state) +{ + struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)data; + if (state) + { + rt_pin_write(cfg->sda, PIN_HIGH); + } + else + { + rt_pin_write(cfg->sda, PIN_LOW); + } +} + +/** + * This function sets the scl pin. + * + * @param ra config class. + * @param The scl pin state. + */ +static void ra_set_scl(void *data, rt_int32_t state) +{ + struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)data; + if (state) + { + rt_pin_write(cfg->scl, PIN_HIGH); + } + else + { + rt_pin_write(cfg->scl, PIN_LOW); + } +} + +/** + * This function gets the sda pin state. + * + * @param The sda pin state. + */ +static rt_int32_t ra_get_sda(void *data) +{ + struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)data; + return rt_pin_read(cfg->sda); +} + +/** + * This function gets the scl pin state. + * + * @param The scl pin state. + */ +static rt_int32_t ra_get_scl(void *data) +{ + struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)data; + return rt_pin_read(cfg->scl); +} +/** + * The time delay function. + * + * @param microseconds. + */ +static void ra_udelay(rt_uint32_t us) +{ + rt_uint32_t ticks; + rt_uint32_t told, tnow, tcnt = 0; + rt_uint32_t reload = SysTick->LOAD; + + ticks = us * reload / (1000000 / RT_TICK_PER_SECOND); + told = SysTick->VAL; + while (1) + { + tnow = SysTick->VAL; + if (tnow != told) + { + if (tnow < told) + { + tcnt += told - tnow; + } + else + { + tcnt += reload - tnow + told; + } + told = tnow; + if (tcnt >= ticks) + { + break; + } + } + } +} + +static const struct rt_i2c_bit_ops ra_bit_ops_default = +{ + .data = RT_NULL, + .set_sda = ra_set_sda, + .set_scl = ra_set_scl, + .get_sda = ra_get_sda, + .get_scl = ra_get_scl, + .udelay = ra_udelay, + .delay_us = 1, + .timeout = 100 +}; + +/** + * if i2c is locked, this function will unlock it + * + * @param ra config class + * + * @return RT_EOK indicates successful unlock. + */ +static rt_err_t ra_i2c_bus_unlock(const struct ra_soft_i2c_config *cfg) +{ + rt_int32_t i = 0; + + if (PIN_LOW == rt_pin_read(cfg->sda)) + { + while (i++ < 9) + { + rt_pin_write(cfg->scl, PIN_HIGH); + ra_udelay(100); + rt_pin_write(cfg->scl, PIN_LOW); + ra_udelay(100); + } + } + if (PIN_LOW == rt_pin_read(cfg->sda)) + { + return -RT_ERROR; + } + + return RT_EOK; +} + +/* I2C initialization function */ +int rt_hw_i2c_init(void) +{ + rt_size_t obj_num = sizeof(i2c_obj) / sizeof(struct ra_i2c); + rt_err_t result; + + for (int i = 0; i < obj_num; i++) + { + i2c_obj[i].ops = ra_bit_ops_default; + i2c_obj[i].ops.data = (void *)&soft_i2c_config[i]; + i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; + ra_i2c_gpio_init(&i2c_obj[i]); + result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); + RT_ASSERT(result == RT_EOK); + ra_i2c_bus_unlock(&soft_i2c_config[i]); + + LOG_D("software simulation %s init done, pin scl: %d, pin sda %d", + soft_i2c_config[i].bus_name, + soft_i2c_config[i].scl, + soft_i2c_config[i].sda); + } + + return RT_EOK; +} +INIT_BOARD_EXPORT(rt_hw_i2c_init); + +#endif /* RT_USING_I2C */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_soft_i2c.h b/bsp/renesas/libraries/HAL_Drivers/drv_soft_i2c.h new file mode 100644 index 0000000000..098810b433 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_soft_i2c.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-07-29 KyleChan first version + */ + +#ifndef __DRV_I2C__ +#define __DRV_I2C__ + +#include +#include +#include +#include + +/* ra config class */ +struct ra_soft_i2c_config +{ + rt_uint32_t scl; + rt_uint32_t sda; + const char *bus_name; +}; +/* ra i2c dirver class */ +struct ra_i2c +{ + struct rt_i2c_bit_ops ops; + struct rt_i2c_bus_device i2c2_bus; +}; + +#ifdef BSP_USING_I2C1 +#define I2C1_BUS_CONFIG \ + { \ + .scl = BSP_I2C1_SCL_PIN, \ + .sda = BSP_I2C1_SDA_PIN, \ + .bus_name = "i2c1", \ + } +#endif + +#ifdef BSP_USING_I2C2 +#define I2C2_BUS_CONFIG \ + { \ + .scl = BSP_I2C2_SCL_PIN, \ + .sda = BSP_I2C2_SDA_PIN, \ + .bus_name = "i2c2", \ + } +#endif + +int rt_hw_i2c_init(void); + +#endif diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_spi.c b/bsp/renesas/libraries/HAL_Drivers/drv_spi.c new file mode 100644 index 0000000000..cd5b994f53 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_spi.c @@ -0,0 +1,290 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-23 Mr.Tiger first version + * 2021-11-04 Sherman ADD complete_event + */ +/**< Note : Turn on any DMA mode and all SPIs will turn on DMA */ + +#include "drv_spi.h" + +#ifdef RT_USING_SPI + +//#define DRV_DEBUG +#define DBG_TAG "drv.spi" +#ifdef DRV_DEBUG + #define DBG_LVL DBG_LOG +#else + #define DBG_LVL DBG_INFO +#endif /* DRV_DEBUG */ +#include + +#define RA_SPI0_EVENT 0x00 +#define RA_SPI1_EVENT 0x01 +static struct rt_event complete_event = {0}; + +static struct ra_spi_handle spi_handle[] = +{ +#ifdef BSP_USING_SPI0 + {.bus_name = "spi0", .spi_ctrl_t = &g_spi0_ctrl, .spi_cfg_t = &g_spi0_cfg,}, +#endif + +#ifdef BSP_USING_SPI1 + {.bus_name = "spi1", .spi_ctrl_t = &g_spi1_ctrl, .spi_cfg_t = &g_spi1_cfg,}, +#endif +}; + +static struct ra_spi spi_config[sizeof(spi_handle) / sizeof(spi_handle[0])] = {0}; + +void spi0_callback(spi_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (SPI_EVENT_TRANSFER_COMPLETE == p_args->event) + { + rt_event_send(&complete_event, RA_SPI0_EVENT); + } + rt_interrupt_leave(); +} + +void spi1_callback(spi_callback_args_t *p_args) +{ + rt_interrupt_enter(); + if (SPI_EVENT_TRANSFER_COMPLETE == p_args->event) + { + rt_event_send(&complete_event, RA_SPI1_EVENT); + } + rt_interrupt_leave(); +} + +static rt_err_t ra_wait_complete(rt_event_t event, const char bus_name[RT_NAME_MAX]) +{ + rt_uint32_t recved = 0x00; + + if (bus_name[3] == '0') + { + return rt_event_recv(event, + RA_SPI0_EVENT, + RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, + RT_WAITING_FOREVER, + &recved); + } + else if (bus_name[3] == '1') + { + return rt_event_recv(event, + RA_SPI1_EVENT, + RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, + RT_WAITING_FOREVER, + &recved); + } + return -RT_EINVAL; +} + +static spi_bit_width_t ra_width_shift(rt_uint8_t data_width) +{ + spi_bit_width_t bit_width = SPI_BIT_WIDTH_8_BITS; + if(data_width == 1) + bit_width = SPI_BIT_WIDTH_8_BITS; + else if(data_width == 2) + bit_width = SPI_BIT_WIDTH_16_BITS; + else if(data_width == 4) + bit_width = SPI_BIT_WIDTH_32_BITS; + + return bit_width; +} + +static rt_err_t ra_write_message(struct rt_spi_device *device, const void *send_buf, const rt_size_t len) +{ + RT_ASSERT(device != NULL); + RT_ASSERT(device->parent.user_data != NULL); + RT_ASSERT(send_buf != NULL); + RT_ASSERT(len > 0); + rt_err_t err = RT_EOK; + struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); + + spi_bit_width_t bit_width = ra_width_shift(spi_dev->rt_spi_cfg_t->data_width); + /**< send msessage */ + err = R_SPI_Write((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, send_buf, len, bit_width); + if (RT_EOK != err) + { + LOG_E("%s write failed.", spi_dev->ra_spi_handle_t->bus_name); + return -RT_ERROR; + } + /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */ + ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name); + return len; +} + +static rt_err_t ra_read_message(struct rt_spi_device *device, void *recv_buf, const rt_size_t len) +{ + RT_ASSERT(device != NULL); + RT_ASSERT(device->parent.user_data != NULL); + RT_ASSERT(recv_buf != NULL); + RT_ASSERT(len > 0); + rt_err_t err = RT_EOK; + struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); + + spi_bit_width_t bit_width = ra_width_shift(spi_dev->rt_spi_cfg_t->data_width); + /**< receive message */ + err = R_SPI_Read((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, recv_buf, len, bit_width); + if (RT_EOK != err) + { + LOG_E("\n%s write failed.\n", spi_dev->ra_spi_handle_t->bus_name); + return -RT_ERROR; + } + /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */ + ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name); + return len; +} + +static rt_err_t ra_write_read_message(struct rt_spi_device *device, struct rt_spi_message *message) +{ + RT_ASSERT(device != NULL); + RT_ASSERT(message != NULL); + RT_ASSERT(message->length > 0); + rt_err_t err = RT_EOK; + struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); + + spi_bit_width_t bit_width = ra_width_shift(spi_dev->rt_spi_cfg_t->data_width); + /**< write and receive message */ + err = R_SPI_WriteRead((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, message->send_buf, message->recv_buf, message->length, bit_width); + if (RT_EOK != err) + { + LOG_E("%s write and read failed.", spi_dev->ra_spi_handle_t->bus_name); + return -RT_ERROR; + } + /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */ + ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name); + return message->length; +} + +/**< init spi TODO : MSB does not support modification */ +static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device, + struct rt_spi_configuration *configuration) +{ + RT_ASSERT(device != NULL); + RT_ASSERT(configuration != NULL); + rt_err_t err = RT_EOK; + + struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); + spi_dev->cs_pin = (rt_uint32_t)device->parent.user_data; + + /**< data_width : 1 -> 8 bits , 2 -> 16 bits, 4 -> 32 bits, default 32 bits*/ + rt_uint8_t data_width = configuration->data_width / 8; + RT_ASSERT(data_width == 1 || data_width == 2 || data_width == 4); + configuration->data_width = configuration->data_width / 8; + spi_dev->rt_spi_cfg_t = configuration; + + spi_extended_cfg_t *spi_cfg = (spi_extended_cfg_t *)spi_dev->ra_spi_handle_t->spi_cfg_t->p_extend; + + /**< Configure Select Line */ + rt_pin_write(spi_dev->cs_pin, PIN_HIGH); + + /**< config bitrate */ + R_SPI_CalculateBitrate(spi_dev->rt_spi_cfg_t->max_hz, &spi_cfg->spck_div); + + /**< init */ + err = R_SPI_Open((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, (spi_cfg_t const * const)spi_dev->ra_spi_handle_t->spi_cfg_t); + /* handle error */ + if (RT_EOK != err) + { + LOG_E("%s init failed.", spi_dev->ra_spi_handle_t->bus_name); + return -RT_ERROR; + } + return RT_EOK; +} + +static rt_uint32_t ra_spixfer(struct rt_spi_device *device, struct rt_spi_message *message) +{ + RT_ASSERT(device != RT_NULL); + RT_ASSERT(device->bus != RT_NULL); + RT_ASSERT(message != RT_NULL); + + rt_err_t err = RT_EOK; + struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); + spi_dev->cs_pin = (rt_uint32_t)device->parent.user_data; + + if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS)) + { + if (device->config.mode & RT_SPI_CS_HIGH) + rt_pin_write(spi_dev->cs_pin, PIN_HIGH); + else + rt_pin_write(spi_dev->cs_pin, PIN_LOW); + } + + if (message->length > 0) + { + if (message->send_buf == RT_NULL && message->recv_buf != RT_NULL) + { + /**< receive message */ + err = ra_read_message(device, (void *)message->recv_buf, (const rt_size_t)message->length); + } + else if (message->send_buf != RT_NULL && message->recv_buf == RT_NULL) + { + /**< send message */ + err = ra_write_message(device, (const void *)message->send_buf, (const rt_size_t)message->length); + } + else if (message->send_buf != RT_NULL && message->recv_buf != RT_NULL) + { + /**< send and receive message */ + err = ra_write_read_message(device, message); + } + } + + if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS)) + { + if (device->config.mode & RT_SPI_CS_HIGH) + rt_pin_write(spi_dev->cs_pin, PIN_LOW); + else + rt_pin_write(spi_dev->cs_pin, PIN_HIGH); + } + return err; +} + +static const struct rt_spi_ops ra_spi_ops = +{ + .configure = ra_hw_spi_configure, + .xfer = ra_spixfer, +}; + +void rt_hw_spi_device_attach(struct rt_spi_device *device, const char *device_name, const char *bus_name, void *user_data) +{ + RT_ASSERT(device != NULL); + RT_ASSERT(device_name != NULL); + RT_ASSERT(bus_name != NULL); + RT_ASSERT(user_data != NULL); + + rt_err_t err = rt_spi_bus_attach_device(device, device_name, bus_name, user_data); + if (RT_EOK != err) + { + LOG_E("%s attach failed.", bus_name); + } +} + +int ra_hw_spi_init(void) +{ + for (rt_uint8_t spi_index = 0; spi_index < sizeof(spi_handle) / sizeof(spi_handle[0]); spi_index++) + { + spi_config[spi_index].ra_spi_handle_t = &spi_handle[spi_index]; + + /**< register spi bus */ + rt_err_t err = rt_spi_bus_register(&spi_config[spi_index].bus, spi_handle[spi_index].bus_name, &ra_spi_ops); + if (RT_EOK != err) + { + LOG_E("%s bus register failed.", spi_config[spi_index].ra_spi_handle_t->bus_name); + return -RT_ERROR; + } + } + + if (RT_EOK != rt_event_init(&complete_event, "ra_spi", RT_IPC_FLAG_PRIO)) + { + LOG_E("SPI transfer event init fail!"); + return -RT_ERROR; + } + return RT_EOK; +} +INIT_BOARD_EXPORT(ra_hw_spi_init); +#endif /* RT_USING_SPI */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_spi.h b/bsp/renesas/libraries/HAL_Drivers/drv_spi.h new file mode 100644 index 0000000000..cb52433fc5 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_spi.h @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-23 Mr.Tiger first version + */ + +#ifndef __DRV_SPI_H__ +#define __DRV_SPI_H__ + +#include +#include +#include "hal_data.h" +#include "board.h" +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef R_SPI_H +struct ra_spi_handle +{ + const char bus_name[RT_NAME_MAX]; + const spi_cfg_t *spi_cfg_t; + const spi_instance_ctrl_t *spi_ctrl_t; +}; + +struct ra_spi +{ + rt_uint32_t cs_pin; + struct ra_spi_handle *ra_spi_handle_t; + struct rt_spi_configuration *rt_spi_cfg_t; + struct rt_spi_bus bus; +}; +#endif + +void rt_hw_spi_device_attach(struct rt_spi_device *device, const char *device_name, const char *bus_name, void *user_data); + +#ifdef __cplusplus +} +#endif + +/* stm32 spi dirver class */ + +#endif /*__DRV_SPI_H__ */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_usart_v2.c b/bsp/renesas/libraries/HAL_Drivers/drv_usart_v2.c new file mode 100644 index 0000000000..dca1535d32 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_usart_v2.c @@ -0,0 +1,500 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-07-29 KyleChan first version + */ + +#include + +#ifdef RT_USING_SERIAL_V2 + +//#define DRV_DEBUG +#define DBG_TAG "drv.usart" +#ifdef DRV_DEBUG + #define DBG_LVL DBG_LOG +#else + #define DBG_LVL DBG_INFO +#endif /* DRV_DEBUG */ +#include + +static struct ra_uart_config uart_config[] = +{ +#ifdef BSP_USING_UART0 + UART0_CONFIG, +#endif + +#ifdef BSP_USING_UART1 + UART1_CONFIG, +#endif + +#ifdef BSP_USING_UART2 + UART2_CONFIG, +#endif + +#ifdef BSP_USING_UART3 + UART3_CONFIG, +#endif + +#ifdef BSP_USING_UART4 + UART4_CONFIG, +#endif + +#ifdef BSP_USING_UART5 + UART5_CONFIG, +#endif + +#ifdef BSP_USING_UART6 + UART6_CONFIG, +#endif + +#ifdef BSP_USING_UART7 + UART7_CONFIG, +#endif + +#ifdef BSP_USING_UART8 + UART8_CONFIG, +#endif + +#ifdef BSP_USING_UART9 + UART9_CONFIG, +#endif +}; + +enum +{ +#ifdef BSP_USING_UART0 + UART0_INDEX, +#endif + +#ifdef BSP_USING_UART1 + UART1_INDEX, +#endif + +#ifdef BSP_USING_UART2 + UART2_INDEX, +#endif + +#ifdef BSP_USING_UART3 + UART3_INDEX, +#endif + +#ifdef BSP_USING_UART4 + UART4_INDEX, +#endif + +#ifdef BSP_USING_UART5 + UART5_INDEX, +#endif + +#ifdef BSP_USING_UART6 + UART6_INDEX, +#endif + +#ifdef BSP_USING_UART7 + UART7_INDEX, +#endif + +#ifdef BSP_USING_UART8 + UART8_INDEX, +#endif + +#ifdef BSP_USING_UART9 + UART9_INDEX, +#endif +}; + +static struct ra_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0}; + +static void ra_uart_get_config(void) +{ + struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; + +#ifdef BSP_USING_UART0 + uart_obj[UART0_INDEX].serial.config = config; + uart_obj[UART0_INDEX].uart_dma_flag = 0; + + uart_obj[UART0_INDEX].serial.config.rx_bufsz = BSP_UART0_RX_BUFSIZE; + uart_obj[UART0_INDEX].serial.config.tx_bufsz = BSP_UART0_TX_BUFSIZE; +#endif + +#ifdef BSP_USING_UART1 + uart_obj[UART1_INDEX].serial.config = config; + uart_obj[UART1_INDEX].uart_dma_flag = 0; + + uart_obj[UART1_INDEX].serial.config.rx_bufsz = BSP_UART1_RX_BUFSIZE; + uart_obj[UART1_INDEX].serial.config.tx_bufsz = BSP_UART1_TX_BUFSIZE; +#endif + +#ifdef BSP_USING_UART2 + uart_obj[UART2_INDEX].serial.config = config; + uart_obj[UART2_INDEX].uart_dma_flag = 0; + + uart_obj[UART2_INDEX].serial.config.rx_bufsz = BSP_UART2_RX_BUFSIZE; + uart_obj[UART2_INDEX].serial.config.tx_bufsz = BSP_UART2_TX_BUFSIZE; +#endif + +#ifdef BSP_USING_UART3 + uart_obj[UART3_INDEX].serial.config = config; + uart_obj[UART3_INDEX].uart_dma_flag = 0; + + uart_obj[UART3_INDEX].serial.config.rx_bufsz = BSP_UART3_RX_BUFSIZE; + uart_obj[UART3_INDEX].serial.config.tx_bufsz = BSP_UART0_TX_BUFSIZE; +#endif + +#ifdef BSP_USING_UART4 + uart_obj[UART4_INDEX].serial.config = config; + uart_obj[UART4_INDEX].uart_dma_flag = 0; + + uart_obj[UART4_INDEX].serial.config.rx_bufsz = BSP_UART4_RX_BUFSIZE; + uart_obj[UART4_INDEX].serial.config.tx_bufsz = BSP_UART4_TX_BUFSIZE; +#endif + +#ifdef BSP_USING_UART6 + uart_obj[UART6_INDEX].serial.config = config; + uart_obj[UART6_INDEX].uart_dma_flag = 0; + + uart_obj[UART6_INDEX].serial.config.rx_bufsz = BSP_UART6_RX_BUFSIZE; + uart_obj[UART6_INDEX].serial.config.tx_bufsz = BSP_UART6_TX_BUFSIZE; +#endif + +#ifdef BSP_USING_UART7 + uart_obj[UART7_INDEX].serial.config = config; + uart_obj[UART7_INDEX].uart_dma_flag = 0; + + uart_obj[UART7_INDEX].serial.config.rx_bufsz = BSP_UART7_RX_BUFSIZE; + uart_obj[UART7_INDEX].serial.config.tx_bufsz = BSP_UART7_TX_BUFSIZE; +#endif + +#ifdef BSP_USING_UART8 + uart_obj[UART8_INDEX].serial.config = config; + uart_obj[UART8_INDEX].uart_dma_flag = 0; + + uart_obj[UART8_INDEX].serial.config.rx_bufsz = BSP_UART8_RX_BUFSIZE; + uart_obj[UART8_INDEX].serial.config.tx_bufsz = BSP_UART8_TX_BUFSIZE; +#endif + +#ifdef BSP_USING_UART9 + uart_obj[UART9_INDEX].serial.config = config; + uart_obj[UART9_INDEX].uart_dma_flag = 0; + + uart_obj[UART9_INDEX].serial.config.rx_bufsz = BSP_UART9_RX_BUFSIZE; + uart_obj[UART9_INDEX].serial.config.tx_bufsz = BSP_UART9_TX_BUFSIZE; +#endif +} + + +/* + * UART interface + */ +static rt_err_t ra_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg) +{ + struct ra_uart *uart; + RT_ASSERT(serial != RT_NULL); + RT_ASSERT(cfg != RT_NULL); + + fsp_err_t err = FSP_SUCCESS; + + uart = rt_container_of(serial, struct ra_uart, serial); + RT_ASSERT(uart != RT_NULL); + + err = R_SCI_UART_Open(uart->config->p_api_ctrl, uart->config->p_cfg); + if (FSP_SUCCESS != err) + { + return RT_ERROR; + } + + return RT_EOK; +} + +static rt_err_t ra_uart_control(struct rt_serial_device *serial, int cmd, void *arg) +{ + return RT_EOK; +} + +static int ra_uart_putc(struct rt_serial_device *serial, char c) +{ + struct ra_uart *uart; + RT_ASSERT(serial != RT_NULL); + + uart = rt_container_of(serial, struct ra_uart, serial); + RT_ASSERT(uart != RT_NULL); + + sci_uart_instance_ctrl_t *p_ctrl = (sci_uart_instance_ctrl_t *)uart->config->p_api_ctrl; + + p_ctrl->p_reg->TDR = c; + while ((p_ctrl->p_reg->SSR_b.TEND) == 0); + + return RT_EOK; +} + +static int ra_uart_getc(struct rt_serial_device *serial) +{ + return RT_EOK; +} + +#ifdef BSP_USING_UART0 +void user_uart0_callback(uart_callback_args_t *p_args) +{ + rt_interrupt_enter(); + + struct rt_serial_device *serial = &uart_obj[UART0_INDEX].serial; + RT_ASSERT(serial != RT_NULL); + + if (UART_EVENT_RX_CHAR == p_args->event) + { + struct rt_serial_rx_fifo *rx_fifo; + rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; + RT_ASSERT(rx_fifo != RT_NULL); + + rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); + + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); + } + + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_UART1 +void user_uart1_callback(uart_callback_args_t *p_args) +{ + rt_interrupt_enter(); + + struct rt_serial_device *serial = &uart_obj[UART1_INDEX].serial; + RT_ASSERT(serial != RT_NULL); + + if (UART_EVENT_RX_CHAR == p_args->event) + { + struct rt_serial_rx_fifo *rx_fifo; + rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; + RT_ASSERT(rx_fifo != RT_NULL); + + rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); + + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); + } + + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_UART2 +void user_uart2_callback(uart_callback_args_t *p_args) +{ + rt_interrupt_enter(); + + struct rt_serial_device *serial = &uart_obj[UART2_INDEX].serial; + RT_ASSERT(serial != RT_NULL); + + if (UART_EVENT_RX_CHAR == p_args->event) + { + struct rt_serial_rx_fifo *rx_fifo; + rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; + RT_ASSERT(rx_fifo != RT_NULL); + + rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); + + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); + } + + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_UART3 +void user_uart3_callback(uart_callback_args_t *p_args) +{ + rt_interrupt_enter(); + + struct rt_serial_device *serial = &uart_obj[UART3_INDEX].serial; + RT_ASSERT(serial != RT_NULL); + + if (UART_EVENT_RX_CHAR == p_args->event) + { + struct rt_serial_rx_fifo *rx_fifo; + rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; + RT_ASSERT(rx_fifo != RT_NULL); + + rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); + + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); + } + + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_UART4 +void user_uart4_callback(uart_callback_args_t *p_args) +{ + rt_interrupt_enter(); + + struct rt_serial_device *serial = &uart_obj[UART4_INDEX].serial; + RT_ASSERT(serial != RT_NULL); + + if (UART_EVENT_RX_CHAR == p_args->event) + { + struct rt_serial_rx_fifo *rx_fifo; + rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; + RT_ASSERT(rx_fifo != RT_NULL); + + rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); + + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); + } + + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_UART5 +void user_uart5_callback(uart_callback_args_t *p_args) +{ + rt_interrupt_enter(); + + struct rt_serial_device *serial = &uart_obj[UART5_INDEX].serial; + RT_ASSERT(serial != RT_NULL); + + if (UART_EVENT_RX_CHAR == p_args->event) + { + struct rt_serial_rx_fifo *rx_fifo; + rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; + RT_ASSERT(rx_fifo != RT_NULL); + + rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); + + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); + } + + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_UART6 +void user_uart6_callback(uart_callback_args_t *p_args) +{ + rt_interrupt_enter(); + + struct rt_serial_device *serial = &uart_obj[UART6_INDEX].serial; + RT_ASSERT(serial != RT_NULL); + + if (UART_EVENT_RX_CHAR == p_args->event) + { + struct rt_serial_rx_fifo *rx_fifo; + rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; + RT_ASSERT(rx_fifo != RT_NULL); + + rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); + + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); + } + + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_UART7 +void user_uart7_callback(uart_callback_args_t *p_args) +{ + rt_interrupt_enter(); + + struct rt_serial_device *serial = &uart_obj[UART7_INDEX].serial; + RT_ASSERT(serial != RT_NULL); + + if (UART_EVENT_RX_CHAR == p_args->event) + { + struct rt_serial_rx_fifo *rx_fifo; + rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; + RT_ASSERT(rx_fifo != RT_NULL); + + rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); + + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); + } + + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_UART8 +void user_uart8_callback(uart_callback_args_t *p_args) +{ + rt_interrupt_enter(); + + struct rt_serial_device *serial = &uart_obj[UART8_INDEX].serial; + RT_ASSERT(serial != RT_NULL); + + if (UART_EVENT_RX_CHAR == p_args->event) + { + struct rt_serial_rx_fifo *rx_fifo; + rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; + RT_ASSERT(rx_fifo != RT_NULL); + + rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); + + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); + } + + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_UART9 +void user_uart9_callback(uart_callback_args_t *p_args) +{ + rt_interrupt_enter(); + + struct rt_serial_device *serial = &uart_obj[UART9_INDEX].serial; + RT_ASSERT(serial != RT_NULL); + + if (UART_EVENT_RX_CHAR == p_args->event) + { + struct rt_serial_rx_fifo *rx_fifo; + rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; + RT_ASSERT(rx_fifo != RT_NULL); + + rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); + + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); + } + + rt_interrupt_leave(); +} +#endif + +static const struct rt_uart_ops ra_uart_ops = +{ + .configure = ra_uart_configure, + .control = ra_uart_control, + .putc = ra_uart_putc, + .getc = ra_uart_getc, +}; + + +int rt_hw_usart_init(void) +{ + rt_err_t result = 0; + rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct ra_uart); + + ra_uart_get_config(); + for (int i = 0; i < obj_num; i++) + { + /* init UART object */ + uart_obj[i].config = &uart_config[i]; + uart_obj[i].serial.ops = &ra_uart_ops; + /* register UART device */ + result = rt_hw_serial_register(&uart_obj[i].serial, + uart_obj[i].config->name, + RT_DEVICE_FLAG_RDWR, + NULL); + RT_ASSERT(result == RT_EOK); + } + + return result; +} + +#endif /* RT_USING_SERIAL_V2 */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_usart_v2.h b/bsp/renesas/libraries/HAL_Drivers/drv_usart_v2.h new file mode 100644 index 0000000000..d4fe7eb327 --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_usart_v2.h @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-07-29 KyleChan first version + */ + +#ifndef __DRV_USART_V2_H__ +#define __DRV_USART_V2_H__ + +#include +#include +#include +#include +#include +#include + +/* renesas config class */ +struct ra_uart_config +{ + const char *name; + uart_ctrl_t *const p_api_ctrl; + uart_cfg_t const *const p_cfg; +}; + +struct ra_uart +{ + struct rt_serial_device serial; + + rt_uint16_t uart_dma_flag; + + struct ra_uart_config *config; +}; + +int rt_hw_usart_init(void); + +#endif /* __DRV_USART_H__ */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drv_wdt.c b/bsp/renesas/libraries/HAL_Drivers/drv_wdt.c new file mode 100644 index 0000000000..44f64a1cce --- /dev/null +++ b/bsp/renesas/libraries/HAL_Drivers/drv_wdt.c @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 Mr.Tiger first version + */ + +#include +#include +#include +#include +#include +#include + +#ifdef RT_USING_WDT + +//#define DRV_DEBUG +#define LOG_TAG "drv.wdt" +#include + +static struct rt_watchdog_device ra_wdt_dev; +static struct rt_watchdog_ops ops; + +static rt_err_t wdt_init(rt_watchdog_t *wdt) +{ + return RT_EOK; +} + +static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg) +{ + struct st_wdt_timeout_values *wdt_value = {0}; + switch (cmd) + { + /* feed the watchdog */ + case RT_DEVICE_CTRL_WDT_KEEPALIVE: + if (R_WDT_Refresh(&g_wdt_ctrl) != FSP_SUCCESS) + { + LOG_E("watch dog keepalive fail."); + } + break; + /* set watchdog timeout */ + case RT_DEVICE_CTRL_WDT_SET_TIMEOUT: + /**< set*/ + break; + case RT_DEVICE_CTRL_WDT_GET_TIMEOUT: + wdt_value = (struct st_wdt_timeout_values *)arg; + if (R_WDT_TimeoutGet(&g_wdt_ctrl, wdt_value) != FSP_SUCCESS) + { + LOG_E("wdt get timeout failed."); + return -RT_ERROR; + } + break; + case RT_DEVICE_CTRL_WDT_START: + if (R_WDT_Open(&g_wdt_ctrl, &g_wdt_cfg) == FSP_SUCCESS) + { + if (R_WDT_Refresh(&g_wdt_ctrl) != FSP_SUCCESS) + { + LOG_E("wdt start failed."); + return -RT_ERROR; + } + } + else + { + LOG_E("wdt start failed."); + return -RT_ERROR; + } + break; + default: + LOG_W("This command is not supported."); + return -RT_ERROR; + } + return RT_EOK; +} + +int rt_wdt_init(void) +{ + ops.init = &wdt_init; + ops.control = &wdt_control; + ra_wdt_dev.ops = &ops; + /* register watchdog device */ + if (rt_hw_watchdog_register(&ra_wdt_dev, "wdt", RT_DEVICE_FLAG_DEACTIVATE, RT_NULL) != RT_EOK) + { + LOG_E("wdt device register failed."); + return -RT_ERROR; + } + LOG_D("wdt device register success."); + return RT_EOK; +} +INIT_BOARD_EXPORT(rt_wdt_init); + +#endif /* RT_USING_WDT */ diff --git a/bsp/renesas/libraries/Kconfig b/bsp/renesas/libraries/Kconfig new file mode 100644 index 0000000000..20998e77a7 --- /dev/null +++ b/bsp/renesas/libraries/Kconfig @@ -0,0 +1,16 @@ + +config SOC_FAMILY_RENESAS + bool + default n + +config SOC_SERIES_R7FA6M4 + bool + select ARCH_ARM_CORTEX_M4 + select SOC_FAMILY_RENESAS + default n + +config SOC_SERIES_R7FA2L1 + bool + select ARCH_ARM_CORTEX_M23 + select SOC_FAMILY_RENESAS + default n diff --git a/bsp/renesas/libraries/bsp-template/.config b/bsp/renesas/libraries/bsp-template/.config new file mode 100644 index 0000000000..34ba3a86ee --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/.config @@ -0,0 +1,692 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_BIG_ENDIAN is not set +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_HOOK_USING_FUNC_PTR=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +CONFIG_RT_USING_TIMER_SOFT=y +CONFIG_RT_TIMER_THREAD_PRIO=4 +CONFIG_RT_TIMER_THREAD_STACK_SIZE=512 + +# +# kservice optimization +# +# CONFIG_RT_KSERVICE_USING_STDLIB is not set +# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +# CONFIG_RT_USING_TINY_FFS is not set +# CONFIG_RT_PRINTF_LONGLONG is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +# CONFIG_RT_USING_MEMPOOL is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMHEAP is not set +CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y +# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set +# CONFIG_RT_USING_SLAB_AS_HEAP is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +# CONFIG_RT_USING_HEAP_ISR is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart7" +CONFIG_RT_VER_NUM=0x40100 +CONFIG_ARCH_ARM=y +CONFIG_RT_USING_CPU_FFS=y +CONFIG_ARCH_ARM_CORTEX_M=y +CONFIG_ARCH_ARM_CORTEX_M4=y +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 +# CONFIG_RT_USING_LEGACY is not set + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_RT_USING_MSH=y +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SERIAL=y +# CONFIG_RT_USING_SERIAL_V1 is not set +CONFIG_RT_USING_SERIAL_V2=y +CONFIG_RT_SERIAL_USING_DMA=y +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB is not set +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +# CONFIG_RT_USING_MODULE is not set +CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 + +# +# POSIX (Portable Operating System Interface) layer +# +# CONFIG_RT_USING_POSIX_FS is not set +# CONFIG_RT_USING_POSIX_DELAY is not set +# CONFIG_RT_USING_POSIX_CLOCK is not set +# CONFIG_RT_USING_PTHREADS is not set + +# +# Interprocess Communication (IPC) +# +# CONFIG_RT_USING_POSIX_PIPE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set + +# +# Socket is in the 'Network' category +# + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set +# CONFIG_RT_USING_RT_LINK is not set +# CONFIG_RT_USING_LWP is not set + +# +# RT-Thread Utestcases +# +# CONFIG_RT_USING_UTESTCASES is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set +# CONFIG_PKG_USING_ZB_COORDINATOR is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set +# CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_LORA_PKT_FWD is not set +# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set +# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set +# CONFIG_PKG_USING_HM is not set +# CONFIG_PKG_USING_SMALL_MODBUS is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_LIBSODIUM is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set +# CONFIG_PKG_USING_PIKASCRIPT is not set + +# +# multimedia packages +# + +# +# LVGL: powerful and easy-to-use embedded GUI library +# +# CONFIG_PKG_USING_LVGL is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set +# CONFIG_PKG_USING_UGUI is not set + +# +# PainterEngine: A cross-platform graphics application framework written in C language +# +# CONFIG_PKG_USING_PAINTERENGINE is not set +# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_TERMBOX is not set +# CONFIG_PKG_USING_VT100 is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ULOG_FILE is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set +# CONFIG_PKG_USING_FDT is not set + +# +# system packages +# + +# +# enhanced kernel services +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set + +# +# POSIX extension functions +# +# CONFIG_PKG_USING_POSIX_GETLINE is not set +# CONFIG_PKG_USING_POSIX_WCWIDTH is not set + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set + +# +# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard +# +# CONFIG_PKG_USING_CMSIS_5 is not set +# CONFIG_PKG_USING_CMSIS_RTOS2 is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_RT_USING_ARDUINO is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_PERSIMMON is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set +# CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_MCUBOOT is not set +# CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_USB_STACK is not set +# CONFIG_PKG_USING_LUATOS_SOC is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set +# CONFIG_PKG_USING_MCP23008 is not set +# CONFIG_PKG_USING_BLUETRUM_SDK is not set +# CONFIG_PKG_USING_MISAKA_AT24CXX is not set +# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set +# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set +# CONFIG_PKG_USING_BL_MCU_SDK is not set +# CONFIG_PKG_USING_SOFT_SERIAL is not set +# CONFIG_PKG_USING_MB85RS16 is not set + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set + +# +# miscellaneous packages +# + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_CMATRIX is not set +# CONFIG_PKG_USING_SL is not set +# CONFIG_PKG_USING_CAL is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_UKAL is not set +# CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_DESIGN_PATTERN is not set + +# +# Hardware Drivers Config +# +CONFIG_SOC_R7FA6M4AF=y + +# +# Onboard Peripheral Drivers +# + +# +# On-chip Peripheral Drivers +# +CONFIG_SOC_FAMILY_RENESAS=y +CONFIG_SOC_SERIES_R7FA6M4=y +CONFIG_BSP_USING_GPIO=y +# CONFIG_BSP_USING_ONCHIP_FLASH is not set +# CONFIG_BSP_USING_WDT is not set +# CONFIG_BSP_USING_ONCHIP_RTC is not set +CONFIG_BSP_USING_UART=y +# CONFIG_BSP_USING_UART0 is not set +# CONFIG_BSP_USING_UART1 is not set +# CONFIG_BSP_USING_UART2 is not set +# CONFIG_BSP_USING_UART3 is not set +# CONFIG_BSP_USING_UART4 is not set +# CONFIG_BSP_USING_UART5 is not set +# CONFIG_BSP_USING_UART6 is not set +CONFIG_BSP_USING_UART7=y +# CONFIG_BSP_UART7_RX_USING_DMA is not set +# CONFIG_BSP_UART7_TX_USING_DMA is not set +CONFIG_BSP_UART7_RX_BUFSIZE=256 +CONFIG_BSP_UART7_TX_BUFSIZE=0 +# CONFIG_BSP_USING_UART8 is not set +# CONFIG_BSP_USING_UART9 is not set +# CONFIG_BSP_USING_I2C is not set +# CONFIG_BSP_USING_SPI is not set +# CONFIG_BSP_USING_ADC is not set +# CONFIG_BSP_USING_DAC is not set +# CONFIG_BSP_USING_PWM is not set +# CONFIG_BSP_USING_SDHI is not set +# CONFIG_BSP_USING_CAN is not set + +# +# Board extended module Drivers +# +# CONFIG_BSP_USING_RW007 is not set diff --git a/bsp/renesas/libraries/bsp-template/.gitignore b/bsp/renesas/libraries/bsp-template/.gitignore new file mode 100644 index 0000000000..9ac428c1b3 --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/.gitignore @@ -0,0 +1,5 @@ +/RTE +/Listings +/Objects +ra_cfg.txt + diff --git a/bsp/renesas/libraries/bsp-template/.ignore_format.yml b/bsp/renesas/libraries/bsp-template/.ignore_format.yml new file mode 100644 index 0000000000..af51bf92aa --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/.ignore_format.yml @@ -0,0 +1,9 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- ra +- ra_gen +- ra_cfg +- RTE diff --git a/bsp/renesas/libraries/bsp-template/Kconfig b/bsp/renesas/libraries/bsp-template/Kconfig new file mode 100644 index 0000000000..061dbecbd3 --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/Kconfig @@ -0,0 +1,29 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +# you can change the RTT_ROOT default "../.." to your rtthread_root, +# example : default "F:/git_repositories/rt-thread" + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +config ENV_DIR + string + option env="ENV_ROOT" + default "/" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "$BSP_DIR/board/Kconfig" diff --git a/bsp/renesas/libraries/bsp-template/README.md b/bsp/renesas/libraries/bsp-template/README.md new file mode 100644 index 0000000000..f81f105be6 --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/README.md @@ -0,0 +1,191 @@ +# 瑞萨 CPK-RA6M4 开发板 BSP 说明 + +## 简介 + +本文档为瑞萨 CPK-RA6M4 开发板提供的 BSP (板级支持包) 说明。通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。 + +主要内容如下： + +- 开发板介绍 +- BSP 快速上手指南 + +## 开发板介绍 + +基于瑞萨 RA6M4 MCU 开发的 CPK-RA6M4 MCU 评估板，通过灵活配置软件包和 IDE，可帮助用户对 RA6M4 MCU 群组的特性轻松进行评估，并对嵌入系统应用程序进行开发。 + +开发板正面外观如下图： + +![image-20211011174017429](docs/picture/cpk-ra6m4.png) + +该开发板常用 **板载资源** 如下： + +- MCU：R7FA6M4AF3CFB，200MHz，Arm Cortex®-M33 内核，1MB 代码闪存, 256kB SRAM +- 调试接口：板载 J-Link 接口 +- 扩展接口：两个 PMOD 连接器 + +**更多详细资料及工具** + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **片上外设** | **支持情况** | **备注** | +| :----------------- | :----------------- | :------------- | +| UART | 支持 | UART7 为默认日志输出端口 | +| GPIO | 支持 | | +| IIC | 支持 | 软件 | +| WDT | 支持 | | +| RTC | 支持 | | +| ADC | 支持 | | +| DAC | 支持 | | +| SPI | 支持 | | +| FLASH | 支持 | | +| PWM | 支持 | | +| CAN | 支持 | | +| 持续更新中... | | | +| **外接外设** | **支持情况** | **备注** | +| WiFi 模块 | 支持 | [RW007 WiFi 网络模块](https://github.com/RT-Thread-packages/rw007) | +| 温湿度传感器 | 支持 | [HS300x 温湿度模块](https://github.com/Guozhanxin/hs300x) | +| 室内空气质量传感器 | 支持 | [zmod4410 室内空气质量模块](https://github.com/ShermanShao/zmod4410) | +| 光线传感器 | 支持 | [isl29035光线传感器模块](https://github.com/ShermanShao/isl29035) | + + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + +### 快速上手 + +本 BSP 目前仅提供 MDK5 工程。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +**硬件连接** + +使用 USB 数据线连接开发板到 PC，使用 J-link 接口下载和 DEBUG 程序。使用 USB 转串口工具连接 UART7：P613(TXD)、P614(RXD)。 + +**编译下载** + +- 编译：双击 project.uvprojx 文件，打开 MDK5 工程，编译程序。 + +> 注意：此工程需要使用 J-Flash Lite 工具烧录程序。建议使用 V7.50 及以上版本烧录工程。[J-Link 下载链接](https://www.segger.com/downloads/jlink/) + +- 下载：打开 J-Flash lite 工具，选择芯片型号 R7FA6M4AF，点击 OK 进入工具。选择 BSP 目录下 MDK 编译出的 /object/ra6m4.hex 文件，点击 Program Device 按钮开始烧录。具体操作过程可参考下图步骤： + +![image-20211011181555421](docs/picture/jflash1.png) + +![image-20211011182047981](docs/picture/jflash2.png) + +![image-20211011182434519](docs/picture/jflash.png) + +![image-20211011182949604](docs/picture/jflash3.png) + +**查看运行结果** + +下载程序成功之后，系统会自动运行并打印系统信息。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息。输入 help 命令可查看系统中支持的命令。 + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.4 build Oct 11 2021 + 2006 - 2021 Copyright by rt-thread team + +Hello RT-Thread! +msh > +msh >help +RT-Thread shell commands: +reboot - Reboot System +help - RT - Thread shell help. +ps - List threads in the system. +free - Show the memory usage in the system. +hello - say hello world +clear - clear the terminal screen +version - show RT - Thread version information +list_thread - list thread +list_sem - list semaphore in system +list_event - list event in system +list_mutex - list mutex in system +list_mailbox - list mail box in system +list_msgqueue - list message queue in system +list_timer - list timer in system +list_device - list device in system +list - list all commands in system + +msh > +``` + +**应用入口函数** + +应用层的入口函数在 **bsp\ra6m4-cpk\src\hal_emtry.c** 中 的 `void hal_entry(void)` 。用户编写的源文件可直接放在 src 目录下。 + +```c +void hal_entry(void) +{ + rt_kprintf("\nHello RT-Thread!\n"); + + while (1) + { + rt_pin_write(LED3_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED3_PIN, PIN_LOW); + rt_thread_mdelay(500); + } +} +``` + +### 进阶使用 + +**资料及文档** + +- [开发板官网主页](https://www2.renesas.cn/cn/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/cpk-ra6m4-evaluation-board) +- [开发板用户手册](https://www2.renesas.cn/cn/zh/document/mah/1527156?language=zh&r=1527191) +- [瑞萨RA MCU 基础知识](https://www2.renesas.cn/cn/zh/document/gde/1520091) +- [RA6 MCU 快速设计指南](https://www2.renesas.cn/cn/zh/document/apn/ra6-quick-design-guide) +- [RA6M4_datasheet](https://www2.renesas.cn/cn/zh/document/dst/ra6m4-group-datasheet) +- [RA6M4 Group User’s Manual: Hardware](https://www2.renesas.cn/cn/zh/document/man/ra6m4-group-user-s-manual-hardware) + +**FSP 配置** + +需要修改瑞萨的 BSP 外设配置或添加新的外设端口，需要用到瑞萨的 [FSP](https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp#document) 配置工具。请务必按照如下步骤完成配置。配置中有任何问题可到[RT-Thread 社区论坛](https://club.rt-thread.org/)中提问。 + +1. [下载灵活配置软件包 (FSP) | Renesas](https://www.renesas.com/cn/zh/software-tool/flexible-software-package-fsp)，请使用 FSP 3.5.0 版本 +2. 下载安装完成后，需要添加 CPK-RA6M4 开发板的官方板级支持包 +> 打开[ CPK-RA6M4 开发板详情页](https://www2.renesas.cn/jp/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/cpk-ra6m4-evaluation-board)，在**“下载”**列表中找到 **”CPK-RA6M4板级支持包“**，点击链接即可下载 +3. 如何将 **”CPK-RA6M4板级支持包“**添加到 FSP 中，请参考文档[如何导入板级支持包](https://www2.renesas.cn/document/ppt/1527171?language=zh&r=1527191) +4. 请查看文档：[使用瑞萨 FSP 配置工具](./docs/使用瑞萨FSP配置工具.md)。在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置。 + +**ENV 配置** + +- 如何使用 ENV 工具：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/#/development-tools/env/env) + +此 BSP 默认只开启了 UART7 的功能，如果需使用更多高级功能例如组件、软件包等，需要利用 ENV 工具进行配置。 + +步骤如下： +1. 在 bsp 下打开 env 工具。 +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 +3. 输入`pkgs --update`命令更新软件包。 +4. 输入`scons --target=mdk5` 命令重新生成工程。 + + +## FAQ + +### 使用 MDK 的 DEBUG 时如果遇到提示 “Error: Flash Download failed Cortex-M33” 怎么办？ + +可按照下图操作，修改 Utilities 中的选项： + +![image-20211214102231248](docs/picture/readme_faq1.png) + +## 联系人信息 + +在使用过程中若您有任何的想法和建议，建议您通过以下方式来联系到我们 [RT-Thread 社区论坛](https://club.rt-thread.org/) + +## 贡献代码 + +如果您对 CPK-RA6M4 感兴趣，并且有一些好玩的项目愿意与大家分享的话欢迎给我们贡献代码，您可以参考 [如何向 RT-Thread 代码贡献](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/development-guide/github/github)。 diff --git a/bsp/renesas/libraries/bsp-template/SConscript b/bsp/renesas/libraries/bsp-template/SConscript new file mode 100644 index 0000000000..8c8b1c92c8 --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/SConscript @@ -0,0 +1,30 @@ +# for module compiling +import os +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = GetCurrentDir() +src = [] +CPPPATH = [] +list = os.listdir(cwd) + +if rtconfig.PLATFORM == 'iar': + print("\nThe current project does not support iar build\n") + Return('group') +elif rtconfig.PLATFORM == 'gcc': + CPPPATH = [cwd] + src = Glob('./src/*.c') +elif rtconfig.PLATFORM == 'armclang': + if GetOption('target') != 'mdk5': + CPPPATH = [cwd] + src = Glob('./src/*.c') + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + group = group + SConscript(os.path.join(d, 'SConscript')) + +Return('group') diff --git a/bsp/renesas/libraries/bsp-template/SConstruct b/bsp/renesas/libraries/bsp-template/SConstruct new file mode 100644 index 0000000000..4a16be573d --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/SConstruct @@ -0,0 +1,54 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rtthread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +rtconfig.BSP_LIBRARY_TYPE = None + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/renesas/libraries/bsp-template/board/Kconfig b/bsp/renesas/libraries/bsp-template/board/Kconfig new file mode 100644 index 0000000000..14280da7ec --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/board/Kconfig @@ -0,0 +1,58 @@ +menu "Hardware Drivers Config" + + config SOC_R7FA6M4AF + bool + select SOC_SERIES_R7FA6M4 + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + + menu "Onboard Peripheral Drivers" + + endmenu + + menu "On-chip Peripheral Drivers" + + source "../libraries/HAL_Drivers/Kconfig" + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + select RT_USING_SERIAL_V2 + if BSP_USING_UART + + menuconfig BSP_USING_UART0 + bool "Enable UART0" + default n + if BSP_USING_UART0 + config BSP_UART0_RX_USING_DMA + bool "Enable UART0 RX DMA" + depends on BSP_USING_UART0 && RT_SERIAL_USING_DMA + default n + + config BSP_UART0_TX_USING_DMA + bool "Enable UART0 TX DMA" + depends on BSP_USING_UART0 && RT_SERIAL_USING_DMA + default n + + config BSP_UART0_RX_BUFSIZE + int "Set UART0 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART0_TX_BUFSIZE + int "Set UART0 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + endif + + endmenu + + menu "Board extended module Drivers" + + endmenu +endmenu diff --git a/bsp/renesas/libraries/bsp-template/board/SConscript b/bsp/renesas/libraries/bsp-template/board/SConscript new file mode 100644 index 0000000000..ca95be14e2 --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/board/SConscript @@ -0,0 +1,12 @@ +import os +from building import * + +objs = [] +cwd = GetCurrentDir() +list = os.listdir(cwd) + +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + objs = objs + SConscript(os.path.join(item, 'SConscript')) + +Return('objs') diff --git a/bsp/renesas/libraries/bsp-template/board/ports/SConscript b/bsp/renesas/libraries/bsp-template/board/ports/SConscript new file mode 100644 index 0000000000..3477ad3180 --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/board/ports/SConscript @@ -0,0 +1,24 @@ + +from building import * +import rtconfig + +cwd = GetCurrentDir() + +src = [] + +if GetDepend(['BSP_USING_RW007']): + src += Glob('drv_rw007.c') + +CPPPATH = [cwd] +LOCAL_CCFLAGS = '' + +if rtconfig.PLATFORM == 'gcc' or 'armclang': + LOCAL_CCFLAGS += ' -std=c99' +elif rtconfig.PLATFORM == 'armcc': + LOCAL_CCFLAGS += ' --c99' +elif rtconfig.PLATFORM == 'armclang': + LOCAL_CCFLAGS += ' -std=c99' + +group = DefineGroup('Drivers', src, depend = [], CPPPATH = CPPPATH, LOCAL_CCFLAGS = LOCAL_CCFLAGS) + +Return('group') diff --git a/bsp/renesas/libraries/bsp-template/board/ports/gpio_cfg.h b/bsp/renesas/libraries/bsp-template/board/ports/gpio_cfg.h new file mode 100644 index 0000000000..294477ee31 --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/board/ports/gpio_cfg.h @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022-01-19 Sherman first version + */ + +/* Number of IRQ channels on the device */ +#define RA_IRQ_MAX 16 + +/* PIN to IRQx table */ +#define PIN2IRQX_TABLE \ +{ \ + switch (pin) \ + { \ + case BSP_IO_PORT_04_PIN_00: \ + case BSP_IO_PORT_02_PIN_06: \ + case BSP_IO_PORT_01_PIN_05: \ + return 0; \ + case BSP_IO_PORT_02_PIN_05: \ + case BSP_IO_PORT_01_PIN_01: \ + case BSP_IO_PORT_01_PIN_04: \ + return 1; \ + case BSP_IO_PORT_02_PIN_03: \ + case BSP_IO_PORT_01_PIN_00: \ + case BSP_IO_PORT_02_PIN_13: \ + return 2; \ + case BSP_IO_PORT_02_PIN_02: \ + case BSP_IO_PORT_01_PIN_10: \ + case BSP_IO_PORT_02_PIN_12: \ + return 3; \ + case BSP_IO_PORT_04_PIN_02: \ + case BSP_IO_PORT_01_PIN_11: \ + case BSP_IO_PORT_04_PIN_11: \ + return 4; \ + case BSP_IO_PORT_04_PIN_01: \ + case BSP_IO_PORT_03_PIN_02: \ + case BSP_IO_PORT_04_PIN_10: \ + return 5; \ + case BSP_IO_PORT_03_PIN_01: \ + case BSP_IO_PORT_00_PIN_00: \ + case BSP_IO_PORT_04_PIN_09: \ + return 6; \ + case BSP_IO_PORT_00_PIN_01: \ + case BSP_IO_PORT_04_PIN_08: \ + return 7; \ + case BSP_IO_PORT_00_PIN_02: \ + case BSP_IO_PORT_03_PIN_05: \ + case BSP_IO_PORT_04_PIN_15: \ + return 8; \ + case BSP_IO_PORT_00_PIN_04: \ + case BSP_IO_PORT_03_PIN_04: \ + case BSP_IO_PORT_04_PIN_14: \ + return 9; \ + case BSP_IO_PORT_00_PIN_05: \ + case BSP_IO_PORT_07_PIN_09: \ + return 10; \ + case BSP_IO_PORT_05_PIN_01: \ + case BSP_IO_PORT_00_PIN_06: \ + case BSP_IO_PORT_07_PIN_08: \ + return 11; \ + case BSP_IO_PORT_05_PIN_02: \ + case BSP_IO_PORT_00_PIN_08: \ + return 12; \ + case BSP_IO_PORT_00_PIN_15: \ + case BSP_IO_PORT_00_PIN_09: \ + return 13; \ + case BSP_IO_PORT_04_PIN_03: \ + case BSP_IO_PORT_05_PIN_12: \ + case BSP_IO_PORT_05_PIN_05: \ + return 14; \ + case BSP_IO_PORT_04_PIN_04: \ + case BSP_IO_PORT_05_PIN_11: \ + case BSP_IO_PORT_05_PIN_06: \ + return 15; \ + default : \ + return -1; \ + } \ +} diff --git a/bsp/renesas/libraries/bsp-template/ra/SConscript b/bsp/renesas/libraries/bsp-template/ra/SConscript new file mode 100644 index 0000000000..fd53aae32f --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/ra/SConscript @@ -0,0 +1,34 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = GetCurrentDir() +src = [] +group = [] +CPPPATH = [] + +if rtconfig.PLATFORM == 'iar': + print("\nThe current project does not support iar build\n") + Return('group') +elif rtconfig.PLATFORM == 'gcc': + src += Glob(cwd + '/fsp/src/bsp/mcu/all/*.c') + src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c'] + src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c'] + src += Glob(cwd + '/fsp/src/r_*/*.c') + CPPPATH = [ cwd + '/arm/CMSIS_5/CMSIS/Core/Include', + cwd + '/fsp/inc', + cwd + '/fsp/inc/api', + cwd + '/fsp/inc/instances',] +elif rtconfig.PLATFORM == 'armclang': + if GetOption('target') != 'mdk5': + src += Glob(cwd + '/fsp/src/bsp/mcu/all/*.c') + src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c'] + src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c'] + src += Glob(cwd + '/fsp/src/r_*/*.c') + CPPPATH = [ cwd + '/arm/CMSIS_5/CMSIS/Core/Include', + cwd + '/fsp/inc', + cwd + '/fsp/inc/api', + cwd + '/fsp/inc/instances',] + +group = DefineGroup('ra', src, depend = [''], CPPPATH = CPPPATH) +Return('group') diff --git a/bsp/renesas/libraries/bsp-template/ra_cfg/SConscript b/bsp/renesas/libraries/bsp-template/ra_cfg/SConscript new file mode 100644 index 0000000000..b059da45f9 --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/ra_cfg/SConscript @@ -0,0 +1,22 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = GetCurrentDir() +src = [] +group = [] +CPPPATH = [] + +if rtconfig.PLATFORM == 'iar': + print("\nThe current project does not support iar build\n") + Return('group') +elif rtconfig.PLATFORM == 'gcc': + src = Glob('*.c') + CPPPATH = [cwd+'/fsp_cfg', cwd + '/fsp_cfg/bsp'] +elif rtconfig.PLATFORM == 'armclang': + if GetOption('target') != 'mdk5': + src = Glob('*.c') + CPPPATH = [cwd+'/fsp_cfg', cwd + '/fsp_cfg/bsp'] + +group += DefineGroup('ra_cfg', src, depend = [''], CPPPATH = CPPPATH) +Return('group') diff --git a/bsp/renesas/libraries/bsp-template/ra_gen/SConscript b/bsp/renesas/libraries/bsp-template/ra_gen/SConscript new file mode 100644 index 0000000000..40ab0bdf61 --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/ra_gen/SConscript @@ -0,0 +1,22 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = GetCurrentDir() +src = [] +group = [] +CPPPATH = [] + +if rtconfig.PLATFORM == 'iar': + print("\nThe current project does not support iar build\n") + Return('group') +elif rtconfig.PLATFORM == 'gcc': + src = Glob('*.c') + CPPPATH = [cwd, ] +elif rtconfig.PLATFORM == 'armclang': + if GetOption('target') != 'mdk5': + src = Glob('*.c') + CPPPATH = [cwd, ] + +group = DefineGroup('ra_gen', src, depend = [''], CPPPATH = CPPPATH) +Return('group') diff --git a/bsp/renesas/libraries/bsp-template/rtconfig.h b/bsp/renesas/libraries/bsp-template/rtconfig.h new file mode 100644 index 0000000000..f585aed516 --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/rtconfig.h @@ -0,0 +1,219 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_HOOK_USING_FUNC_PTR +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 +#define RT_USING_TIMER_SOFT +#define RT_TIMER_THREAD_PRIO 4 +#define RT_TIMER_THREAD_STACK_SIZE 512 + +/* kservice optimization */ + +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_SMALL_MEM +#define RT_USING_SMALL_MEM_AS_HEAP +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart7" +#define RT_VER_NUM 0x40100 +#define ARCH_ARM +#define RT_USING_CPU_FFS +#define ARCH_ARM_CORTEX_M +#define ARCH_ARM_CORTEX_M4 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define RT_USING_MSH +#define FINSH_USING_MSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_CMD_SIZE 80 +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_USING_SERIAL +#define RT_USING_SERIAL_V2 +#define RT_SERIAL_USING_DMA +#define RT_USING_PIN + +/* Using USB */ + + +/* POSIX layer and C standard library */ + +#define RT_LIBC_DEFAULT_TIMEZONE 8 + +/* POSIX (Portable Operating System Interface) layer */ + + +/* Interprocess Communication (IPC) */ + + +/* Socket is in the 'Network' category */ + +/* Network */ + +/* Socket abstraction layer */ + + +/* Network interface device */ + + +/* light weight TCP/IP stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* RT-Thread Utestcases */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + +/* LVGL: powerful and easy-to-use embedded GUI library */ + + +/* u8g2: a monochrome graphic library */ + + +/* PainterEngine: A cross-platform graphics application framework written in C language */ + + +/* tools packages */ + + +/* system packages */ + +/* enhanced kernel services */ + + +/* POSIX extension functions */ + + +/* acceleration: Assembly language or algorithmic acceleration packages */ + + +/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + + +/* Micrium: Micrium software products porting for RT-Thread */ + + +/* peripheral libraries and drivers */ + + +/* AI packages */ + + +/* miscellaneous packages */ + +/* samples: kernel and components samples */ + + +/* entertainment: terminal games and other interesting software packages */ + +#define SOC_FAMILY_RENESAS +#define SOC_SERIES_R7FA6M4 + +/* Hardware Drivers Config */ + +#define SOC_R7FA6M4AF + +/* Onboard Peripheral Drivers */ + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART7 +#define BSP_UART7_RX_BUFSIZE 256 +#define BSP_UART7_TX_BUFSIZE 0 +#define BSP_USING_UART9 +#define BSP_UART9_RX_BUFSIZE 256 +#define BSP_UART9_TX_BUFSIZE 0 + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/renesas/libraries/bsp-template/rtconfig.py b/bsp/renesas/libraries/bsp-template/rtconfig.py new file mode 100644 index 0000000000..956dda67c6 --- /dev/null +++ b/bsp/renesas/libraries/bsp-template/rtconfig.py @@ -0,0 +1,102 @@ +import os +import sys + +# toolchains options +ARCH='arm' +CPU='cortex-m4' +CROSS_TOOL='gcc' + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = 'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armclang' + EXEC_PATH = 'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = 'C:/Program Files/IAR Systems/Embedded Workbench 8.0' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' +# BUILD = 'release' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + NM = PREFIX + 'nm' + + DEVICE = ' -mcpu=cortex-m33 -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T script/fsp.ld -L script/' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g -Wall' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -Os' + + POST_ACTION = OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n' + # POST_ACTION += OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armclang': + # toolchains + CC = 'armclang' + CXX = 'armclang' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M33' + + CFLAGS = ' -mcpu=Cortex-M33 -xc -std=c99 --target=arm-arm-none-eabi -mfpu=fpv5-sp-d16 -mfloat-abi=hard -c' + CFLAGS += ' -fno-rtti -funsigned-char -ffunction-sections' + CFLAGS += ' -Wno-license-management -Wuninitialized -Wall -Wmissing-declarations -Wpointer-arith -Waggregate-return -Wfloat-equal' + + AFLAGS = DEVICE + ' --apcs=interwork ' + + LFLAGS = DEVICE + ' --scatter ' + 'script/fsp.scat' + LFLAGS +=' --info sizes --info totals --info unused --info veneers ' + LFLAGS += ' --list rt-thread.map --strict' + LFLAGS += ' --diag_suppress 6319,6314 --summary_stderr --info summarysizes' + LFLAGS += ' --map --load_addr_map_info --xref --callgraph --symbols' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCLANG/lib' + + EXEC_PATH += '/ARM/ARMCLANG/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -Os' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET \n' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) \ No newline at end of file diff --git a/bsp/renesas/ra6m4-cpk/.config b/bsp/renesas/ra6m4-cpk/.config index a9987213e0..41cc64b3b0 100644 --- a/bsp/renesas/ra6m4-cpk/.config +++ b/bsp/renesas/ra6m4-cpk/.config @@ -194,25 +194,9 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # # Network # - -# -# Socket abstraction layer -# # CONFIG_RT_USING_SAL is not set - -# -# Network interface device -# # CONFIG_RT_USING_NETDEV is not set - -# -# light weight TCP/IP stack -# # CONFIG_RT_USING_LWIP is not set - -# -# AT commands -# # CONFIG_RT_USING_AT is not set # @@ -295,7 +279,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_JIOT-C-SDK is not set # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set # CONFIG_PKG_USING_JOYLINK is not set -# CONFIG_PKG_USING_EZ_IOT_OS is not set # CONFIG_PKG_USING_NIMBLE is not set # CONFIG_PKG_USING_OTA_DOWNLOADER is not set # CONFIG_PKG_USING_IPMSG is not set @@ -330,7 +313,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set # CONFIG_PKG_USING_HM is not set # CONFIG_PKG_USING_SMALL_MODBUS is not set -# CONFIG_PKG_USING_NET_SERVER is not set # # security packages @@ -344,7 +326,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # # language packages # -# CONFIG_PKG_USING_LUATOS_SOC is not set # CONFIG_PKG_USING_LUA is not set # CONFIG_PKG_USING_JERRYSCRIPT is not set # CONFIG_PKG_USING_MICROPYTHON is not set @@ -388,7 +369,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_MCURSES is not set # CONFIG_PKG_USING_TERMBOX is not set # CONFIG_PKG_USING_VT100 is not set -# CONFIG_PKG_USING_QRCODE is not set # # tools packages @@ -399,6 +379,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_SYSTEMVIEW is not set # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set # CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set @@ -448,8 +429,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # # CONFIG_PKG_USING_POSIX_GETLINE is not set # CONFIG_PKG_USING_POSIX_WCWIDTH is not set -# CONFIG_PKG_USING_POSIX_ITOA is not set -# CONFIG_PKG_USING_POSIX_STRINGS is not set # # acceleration: Assembly language or algorithmic acceleration packages @@ -506,6 +485,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_MCUBOOT is not set # CONFIG_PKG_USING_TINYUSB is not set # CONFIG_PKG_USING_USB_STACK is not set +# CONFIG_PKG_USING_LUATOS_SOC is not set # # peripheral libraries and drivers @@ -562,7 +542,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_SSD1306 is not set # CONFIG_PKG_USING_QKEY is not set # CONFIG_PKG_USING_RS485 is not set -# CONFIG_PKG_USING_RS232 is not set # CONFIG_PKG_USING_NES is not set # CONFIG_PKG_USING_VIRTUAL_SENSOR is not set # CONFIG_PKG_USING_VDEVICE is not set @@ -584,7 +563,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_BL_MCU_SDK is not set # CONFIG_PKG_USING_SOFT_SERIAL is not set # CONFIG_PKG_USING_MB85RS16 is not set -# CONFIG_PKG_USING_CW2015 is not set # # AI packages @@ -650,13 +628,14 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set # CONFIG_PKG_USING_DESIGN_PATTERN is not set -# CONFIG_PKG_USING_CONTROLLER is not set -# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set +CONFIG_SOC_FAMILY_RENESAS=y +CONFIG_SOC_SERIES_R7FA6M4=y +# CONFIG_SOC_SERIES_R7FA2L1 is not set # # Hardware Drivers Config # -CONFIG_SOC_SERIES_R7FA6M4AF=y +CONFIG_SOC_R7FA6M4AF=y # # Onboard Peripheral Drivers @@ -668,22 +647,31 @@ CONFIG_SOC_SERIES_R7FA6M4AF=y CONFIG_BSP_USING_GPIO=y # CONFIG_BSP_USING_ONCHIP_FLASH is not set # CONFIG_BSP_USING_WDT is not set +# CONFIG_BSP_USING_ONCHIP_RTC is not set CONFIG_BSP_USING_UART=y +# CONFIG_BSP_USING_UART0 is not set +# CONFIG_BSP_USING_UART1 is not set +# CONFIG_BSP_USING_UART2 is not set +# CONFIG_BSP_USING_UART3 is not set +# CONFIG_BSP_USING_UART4 is not set +# CONFIG_BSP_USING_UART5 is not set +# CONFIG_BSP_USING_UART6 is not set CONFIG_BSP_USING_UART7=y # CONFIG_BSP_UART7_RX_USING_DMA is not set # CONFIG_BSP_UART7_TX_USING_DMA is not set CONFIG_BSP_UART7_RX_BUFSIZE=256 CONFIG_BSP_UART7_TX_BUFSIZE=0 +# CONFIG_BSP_USING_UART8 is not set +# CONFIG_BSP_USING_UART9 is not set # CONFIG_BSP_USING_I2C is not set -# CONFIG_BSP_USING_ONCHIP_RTC is not set # CONFIG_BSP_USING_SPI is not set # CONFIG_BSP_USING_ADC is not set # CONFIG_BSP_USING_DAC is not set # CONFIG_BSP_USING_PWM is not set +# CONFIG_BSP_USING_SDHI is not set # CONFIG_BSP_USING_CAN is not set # # Board extended module Drivers # # CONFIG_BSP_USING_RW007 is not set -CONFIG_SOC_FAMILY_RENESAS=y diff --git a/bsp/renesas/ra6m4-cpk/.ignore_format.yml b/bsp/renesas/ra6m4-cpk/.ignore_format.yml index 7880684094..af51bf92aa 100644 --- a/bsp/renesas/ra6m4-cpk/.ignore_format.yml +++ b/bsp/renesas/ra6m4-cpk/.ignore_format.yml @@ -6,3 +6,4 @@ dir_path: - ra - ra_gen - ra_cfg +- RTE diff --git a/bsp/renesas/ra6m4-cpk/.settings/standalone.prefs b/bsp/renesas/ra6m4-cpk/.settings/standalone.prefs index e857c7f65b..12e56408bd 100644 --- a/bsp/renesas/ra6m4-cpk/.settings/standalone.prefs +++ b/bsp/renesas/ra6m4-cpk/.settings/standalone.prefs @@ -1,4 +1,4 @@ -#Thu Jan 13 17:43:26 CST 2022 +#Tue Mar 08 16:52:02 CST 2022 com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/libraries= com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/all=3983299396,ra/fsp/src/bsp/mcu/all/bsp_delay.h|4222527282,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|1499520276,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|3984836408,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|546480625,ra/fsp/inc/fsp_common_api.h|3297195641,ra/fsp/inc/fsp_version.h|1615019982,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|3549961311,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|2386285210,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|521902797,ra/fsp/src/bsp/mcu/all/bsp_security.h|1904866635,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|1728953905,ra/fsp/inc/fsp_features.h|470601830,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|2977689308,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|3606266210,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|1353647784,ra/fsp/src/bsp/mcu/all/bsp_delay.c|568600546,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|400573940,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|3492513568,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|460577388,ra/fsp/src/bsp/mcu/all/bsp_io.h|1236602439,ra/fsp/src/bsp/mcu/all/bsp_io.c|2847966430,ra/fsp/src/bsp/mcu/all/bsp_security.c|1992062042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|2425160085,ra/fsp/inc/api/bsp_api.h|1939984091,ra/fsp/inc/api/r_ioport_api.h|2920829723,ra/fsp/src/bsp/mcu/all/bsp_guard.c|3753300083,ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h|1552630912,ra/fsp/src/bsp/mcu/all/bsp_guard.h|3998046333,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h|1630997354,ra/fsp/src/bsp/mcu/all/bsp_irq.c|2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|2906400,ra/fsp/src/bsp/mcu/all/bsp_common.c|731782070,ra/fsp/src/bsp/mcu/all/bsp_irq.h|2208590403,ra/fsp/inc/instances/r_ioport.h|3255765648,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|4051445857,ra/fsp/src/bsp/mcu/all/bsp_common.h diff --git a/bsp/renesas/ra6m4-cpk/Kconfig b/bsp/renesas/ra6m4-cpk/Kconfig index 72b823f886..061dbecbd3 100644 --- a/bsp/renesas/ra6m4-cpk/Kconfig +++ b/bsp/renesas/ra6m4-cpk/Kconfig @@ -25,14 +25,5 @@ config ENV_DIR source "$RTT_DIR/Kconfig" source "$PKGS_DIR/Kconfig" -source "$BSP_DIR/drivers/Kconfig" - -config SOC_FAMILY_RENESAS - bool - default y - -config SOC_SERIES_R7FA6M4AF - bool - select ARCH_ARM_CORTEX_M4 - select SOC_FAMILY_RENESAS - default y \ No newline at end of file +source "../libraries/Kconfig" +source "$BSP_DIR/board/Kconfig" diff --git a/bsp/renesas/ra6m4-cpk/README.md b/bsp/renesas/ra6m4-cpk/README.md index f81f105be6..ff6369df78 100644 --- a/bsp/renesas/ra6m4-cpk/README.md +++ b/bsp/renesas/ra6m4-cpk/README.md @@ -15,7 +15,7 @@ 开发板正面外观如下图： -![image-20211011174017429](docs/picture/cpk-ra6m4.png) +![image-20211011174017429](docs/picture/cpk-ra6m4.png) 该开发板常用 **板载资源** 如下： @@ -77,13 +77,13 @@ - 下载：打开 J-Flash lite 工具，选择芯片型号 R7FA6M4AF，点击 OK 进入工具。选择 BSP 目录下 MDK 编译出的 /object/ra6m4.hex 文件，点击 Program Device 按钮开始烧录。具体操作过程可参考下图步骤： -![image-20211011181555421](docs/picture/jflash1.png) +![image-20211011181555421](docs/picture/jflash1.png) -![image-20211011182047981](docs/picture/jflash2.png) +![image-20211011182047981](docs/picture/jflash2.png) -![image-20211011182434519](docs/picture/jflash.png) +![image-20211011182434519](docs/picture/jflash.png) -![image-20211011182949604](docs/picture/jflash3.png) +![image-20211011182949604](docs/picture/jflash3.png) **查看运行结果** @@ -159,7 +159,7 @@ void hal_entry(void) 2. 下载安装完成后，需要添加 CPK-RA6M4 开发板的官方板级支持包 > 打开[ CPK-RA6M4 开发板详情页](https://www2.renesas.cn/jp/zh/products/microcontrollers-microprocessors/ra-cortex-m-mcus/cpk-ra6m4-evaluation-board)，在**“下载”**列表中找到 **”CPK-RA6M4板级支持包“**，点击链接即可下载 3. 如何将 **”CPK-RA6M4板级支持包“**添加到 FSP 中，请参考文档[如何导入板级支持包](https://www2.renesas.cn/document/ppt/1527171?language=zh&r=1527191) -4. 请查看文档：[使用瑞萨 FSP 配置工具](./docs/使用瑞萨FSP配置工具.md)。在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置。 +4. 请查看文档：[使用 FSP 配置外设驱动](../docs/RA系列使用FSP配置外设驱动.md)，在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置。 **ENV 配置** @@ -180,7 +180,7 @@ void hal_entry(void) 可按照下图操作，修改 Utilities 中的选项： -![image-20211214102231248](docs/picture/readme_faq1.png) +![image-20211214102231248](docs/picture/readme_faq1.png) ## 联系人信息 diff --git a/bsp/renesas/ra6m4-cpk/RTE/_Target_1/RTE_Components.h b/bsp/renesas/ra6m4-cpk/RTE/_Target_1/RTE_Components.h index 4b13b539de..d5d79fdd80 100644 --- a/bsp/renesas/ra6m4-cpk/RTE/_Target_1/RTE_Components.h +++ b/bsp/renesas/ra6m4-cpk/RTE/_Target_1/RTE_Components.h @@ -3,8 +3,8 @@ * Auto generated Run-Time-Environment Configuration File * *** Do not modify ! *** * - * Project: 'project' - * Target: 'Target 1' + * Project: 'project' + * Target: 'Target 1' */ #ifndef RTE_COMPONENTS_H diff --git a/bsp/renesas/ra6m4-cpk/SConscript b/bsp/renesas/ra6m4-cpk/SConscript index 6c129cbc40..8c8b1c92c8 100644 --- a/bsp/renesas/ra6m4-cpk/SConscript +++ b/bsp/renesas/ra6m4-cpk/SConscript @@ -9,12 +9,16 @@ src = [] CPPPATH = [] list = os.listdir(cwd) -if rtconfig.CROSS_TOOL == 'iar': +if rtconfig.PLATFORM == 'iar': print("\nThe current project does not support iar build\n") Return('group') -elif rtconfig.CROSS_TOOL == 'gcc': +elif rtconfig.PLATFORM == 'gcc': CPPPATH = [cwd] src = Glob('./src/*.c') +elif rtconfig.PLATFORM == 'armclang': + if GetOption('target') != 'mdk5': + CPPPATH = [cwd] + src = Glob('./src/*.c') group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) diff --git a/bsp/renesas/ra6m4-cpk/SConstruct b/bsp/renesas/ra6m4-cpk/SConstruct index 232c6fca61..4a16be573d 100644 --- a/bsp/renesas/ra6m4-cpk/SConstruct +++ b/bsp/renesas/ra6m4-cpk/SConstruct @@ -33,8 +33,22 @@ if rtconfig.PLATFORM == 'iar': Export('RTT_ROOT') Export('rtconfig') +SDK_ROOT = os.path.abspath('./') +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +rtconfig.BSP_LIBRARY_TYPE = None + # prepare building environment objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript'))) + # make a building DoBuilding(TARGET, objs) diff --git a/bsp/renesas/ra6m4-cpk/board/Kconfig b/bsp/renesas/ra6m4-cpk/board/Kconfig new file mode 100644 index 0000000000..b918a15257 --- /dev/null +++ b/bsp/renesas/ra6m4-cpk/board/Kconfig @@ -0,0 +1,474 @@ +menu "Hardware Drivers Config" + + config SOC_R7FA6M4AF + bool + select SOC_SERIES_R7FA6M4 + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + + menu "Onboard Peripheral Drivers" + + endmenu + + menu "On-chip Peripheral Drivers" + + source "../libraries/HAL_Drivers/Kconfig" + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + select RT_USING_SERIAL_V2 + if BSP_USING_UART + + menuconfig BSP_USING_UART0 + bool "Enable UART0" + default n + if BSP_USING_UART0 + config BSP_UART0_RX_USING_DMA + bool "Enable UART0 RX DMA" + depends on BSP_USING_UART0 && RT_SERIAL_USING_DMA + default n + + config BSP_UART0_TX_USING_DMA + bool "Enable UART0 TX DMA" + depends on BSP_USING_UART0 && RT_SERIAL_USING_DMA + default n + + config BSP_UART0_RX_BUFSIZE + int "Set UART0 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART0_TX_BUFSIZE + int "Set UART0 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART1 + bool "Enable UART1" + default n + if BSP_USING_UART1 + config BSP_UART1_RX_USING_DMA + bool "Enable UART1 RX DMA" + depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA + default n + + config BSP_UART1_TX_USING_DMA + bool "Enable UART1 TX DMA" + depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA + default n + + config BSP_UART1_RX_BUFSIZE + int "Set UART1 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART1_TX_BUFSIZE + int "Set UART1 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART2 + bool "Enable UART2" + default n + if BSP_USING_UART2 + config BSP_UART2_RX_USING_DMA + bool "Enable UART2 RX DMA" + depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA + default n + + config BSP_UART2_TX_USING_DMA + bool "Enable UART2 TX DMA" + depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA + default n + + config BSP_UART2_RX_BUFSIZE + int "Set UART2 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART2_TX_BUFSIZE + int "Set UART2 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART3 + bool "Enable UART3" + default n + if BSP_USING_UART3 + config BSP_UART3_RX_USING_DMA + bool "Enable UART3 RX DMA" + depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA + default n + + config BSP_UART3_TX_USING_DMA + bool "Enable UART3 TX DMA" + depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA + default n + + config BSP_UART3_RX_BUFSIZE + int "Set UART3 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART3_TX_BUFSIZE + int "Set UART3 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART4 + bool "Enable UART4" + default n + if BSP_USING_UART4 + config BSP_UART4_RX_USING_DMA + bool "Enable UART4 RX DMA" + depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA + default n + + config BSP_UART4_TX_USING_DMA + bool "Enable UART4 TX DMA" + depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA + default n + + config BSP_UART4_RX_BUFSIZE + int "Set UART4 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART4_TX_BUFSIZE + int "Set UART4 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART5 + bool "Enable UART5" + default n + if BSP_USING_UART5 + config BSP_UART5_RX_USING_DMA + bool "Enable UART5 RX DMA" + depends on BSP_USING_UART5 && RT_SERIAL_USING_DMA + default n + + config BSP_UART5_TX_USING_DMA + bool "Enable UART5 TX DMA" + depends on BSP_USING_UART5 && RT_SERIAL_USING_DMA + default n + + config BSP_UART5_RX_BUFSIZE + int "Set UART5 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART5_TX_BUFSIZE + int "Set UART5 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART6 + bool "Enable UART6" + default n + if BSP_USING_UART6 + config BSP_UART6_RX_USING_DMA + bool "Enable UART6 RX DMA" + depends on BSP_USING_UART6 && RT_SERIAL_USING_DMA + default n + + config BSP_UART6_TX_USING_DMA + bool "Enable UART6 TX DMA" + depends on BSP_USING_UART6 && RT_SERIAL_USING_DMA + default n + + config BSP_UART6_RX_BUFSIZE + int "Set UART6 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART6_TX_BUFSIZE + int "Set UART6 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART7 + bool "Enable UART7" + default n + if BSP_USING_UART7 + config BSP_UART7_RX_USING_DMA + bool "Enable UART7 RX DMA" + depends on BSP_USING_UART7 && RT_SERIAL_USING_DMA + default n + + config BSP_UART7_TX_USING_DMA + bool "Enable UART7 TX DMA" + depends on BSP_USING_UART7 && RT_SERIAL_USING_DMA + default n + + config BSP_UART7_RX_BUFSIZE + int "Set UART7 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART7_TX_BUFSIZE + int "Set UART7 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART8 + bool "Enable UART8" + default n + if BSP_USING_UART8 + config BSP_UART8_RX_USING_DMA + bool "Enable UART8 RX DMA" + depends on BSP_USING_UART8 && RT_SERIAL_USING_DMA + default n + + config BSP_UART8_TX_USING_DMA + bool "Enable UART8 TX DMA" + depends on BSP_USING_UART8 && RT_SERIAL_USING_DMA + default n + + config BSP_UART8_RX_BUFSIZE + int "Set UART8 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART8_TX_BUFSIZE + int "Set UART8 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART9 + bool "Enable UART9" + default n + if BSP_USING_UART9 + config BSP_UART9_RX_USING_DMA + bool "Enable UART9 RX DMA" + depends on BSP_USING_UART9 && RT_SERIAL_USING_DMA + default n + + config BSP_UART9_TX_USING_DMA + bool "Enable UART9 TX DMA" + depends on BSP_USING_UART9 && RT_SERIAL_USING_DMA + default n + + config BSP_UART9_RX_BUFSIZE + int "Set UART9 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART9_TX_BUFSIZE + int "Set UART9 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + endif + + menuconfig BSP_USING_I2C + bool "Enable I2C BUS" + default n + select RT_USING_I2C + select RT_USING_I2C_BITOPS + select RT_USING_PIN + if BSP_USING_I2C + menuconfig BSP_USING_I2C1 + bool "Enable I2C1 BUS (software simulation)" + default y + if BSP_USING_I2C1 + config BSP_I2C1_SCL_PIN + hex "i2c1 scl pin number" + range 0x0000 0x0B0F + default 0x0512 + config BSP_I2C1_SDA_PIN + hex "I2C1 sda pin number" + range 0x0000 0x0B0F + default 0x0511 + endif + endif + + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + default n + select RT_USING_SPI + if BSP_USING_SPI + config BSP_SPI_USING_DTC_DMA + bool "Enable SPI DTC transfers data without using the CPU." + default n + + config BSP_USING_SPI0 + bool "Enable SPI0 BUS" + default n + + config BSP_USING_SPI1 + bool "Enable SPI1 BUS" + default n + endif + + menuconfig BSP_USING_ADC + bool "Enable ADC" + default n + select RT_USING_ADC + if BSP_USING_ADC + config BSP_USING_ADC0 + bool "Enable ADC0" + default n + + config BSP_USING_ADC1 + bool "Enable ADC1" + default n + endif + + menuconfig BSP_USING_DAC + bool "Enable DAC" + default n + select RT_USING_DAC + if BSP_USING_DAC + config BSP_USING_DAC0 + bool "Enable DAC0" + default n + + config BSP_USING_DAC1 + bool "Enable DAC1" + default n + endif + + menuconfig BSP_USING_PWM + bool "Enable PWM" + default n + select RT_USING_PWM + if BSP_USING_PWM + config BSP_USING_PWM0 + bool "Enable GPT0 (32-Bits) output PWM" + default n + + config BSP_USING_PWM1 + bool "Enable GPT1 (32-Bits) output PWM" + default n + + config BSP_USING_PWM2 + bool "Enable GPT2 (32-Bits) output PWM" + default n + + config BSP_USING_PWM3 + bool "Enable GPT3 (32-Bits) output PWM" + default n + + config BSP_USING_PWM4 + bool "Enable GPT4 (16-Bits) output PWM" + default n + + config BSP_USING_PWM5 + bool "Enable GPT5 (16-Bits) output PWM" + default n + + config BSP_USING_PWM6 + bool "Enable GPT6 (16-Bits) output PWM" + default n + + config BSP_USING_PWM7 + bool "Enable GPT7 (16-Bits) output PWM" + default n + + config BSP_USING_PWM8 + bool "Enable GPT8 (16-Bits) output PWM" + default n + + config BSP_USING_PWM9 + bool "Enable GPT9 (16-Bits) output PWM" + default n + endif + + menuconfig BSP_USING_SDHI + bool "Enable SDHI" + default n + select RT_USING_SDIO + select RT_USING_DFS + select RT_LIBC_USING_FILEIO + select RT_USING_POSIX + if BSP_USING_SDHI + config SDHI_USING_1_BIT + bool "Use 1-bit Mode(4-bit when disable)" + default y + endif + + menuconfig BSP_USING_CAN + bool "Enable CAN" + default n + select RT_USING_CAN + if BSP_USING_CAN + config BSP_USING_CAN0 + bool "Enable CAN0" + default n + + config BSP_USING_CAN1 + bool "Enable CAN1" + default n + endif + + endmenu + + menu "Board extended module Drivers" + + menuconfig BSP_USING_RW007 + bool "Enable RW007" + default n + select PKG_USING_RW007 + select BSP_USING_SPI + + if BSP_USING_RW007 + config RA_RW007_SPI_BUS_NAME + string "RW007 BUS NAME" + default "spi1" + + config RA_RW007_CS_PIN + hex "(HEX)CS pin index" + default 0x040D + + config RA_RW007_BOOT0_PIN + hex "(HEX)BOOT0 pin index (same as spi clk pin)" + default 0x040C + + config RA_RW007_BOOT1_PIN + hex "(HEX)BOOT1 pin index (same as spi cs pin)" + default 0x040D + + config RA_RW007_INT_BUSY_PIN + hex "(HEX)INT/BUSY pin index" + default 0x0506 + + config RA_RW007_RST_PIN + hex "(HEX)RESET pin index" + default 0x040F + endif + + endmenu +endmenu diff --git a/bsp/renesas/ra6m4-cpk/board/SConscript b/bsp/renesas/ra6m4-cpk/board/SConscript new file mode 100644 index 0000000000..a27ea8e470 --- /dev/null +++ b/bsp/renesas/ra6m4-cpk/board/SConscript @@ -0,0 +1,16 @@ +import os +from building import * + +objs = [] +cwd = GetCurrentDir() +list = os.listdir(cwd) +CPPPATH = [cwd] +src = Glob('*.c') + +objs = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) + +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + objs = objs + SConscript(os.path.join(item, 'SConscript')) + +Return('objs') diff --git a/bsp/renesas/ra6m4-cpk/board/board.h b/bsp/renesas/ra6m4-cpk/board/board.h new file mode 100644 index 0000000000..999e4749fe --- /dev/null +++ b/bsp/renesas/ra6m4-cpk/board/board.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-10 Sherman first version + */ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define RA_SRAM_SIZE 256 +#define RA_SRAM_END (0x20000000 + RA_SRAM_SIZE * 1024) + +#ifdef __ARMCC_VERSION +extern int Image$$RAM_END$$ZI$$Base; +#define HEAP_BEGIN ((void *)&Image$$RAM_END$$ZI$$Base) +#elif __ICCARM__ +#pragma section="CSTACK" +#define HEAP_BEGIN (__segment_end("CSTACK")) +#else +extern int __RAM_segment_used_end__; +#define HEAP_BEGIN (&__RAM_segment_used_end__) +#endif + +#define HEAP_END RA_SRAM_END + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bsp/renesas/ra6m4-cpk/board/ports/SConscript b/bsp/renesas/ra6m4-cpk/board/ports/SConscript new file mode 100644 index 0000000000..3477ad3180 --- /dev/null +++ b/bsp/renesas/ra6m4-cpk/board/ports/SConscript @@ -0,0 +1,24 @@ + +from building import * +import rtconfig + +cwd = GetCurrentDir() + +src = [] + +if GetDepend(['BSP_USING_RW007']): + src += Glob('drv_rw007.c') + +CPPPATH = [cwd] +LOCAL_CCFLAGS = '' + +if rtconfig.PLATFORM == 'gcc' or 'armclang': + LOCAL_CCFLAGS += ' -std=c99' +elif rtconfig.PLATFORM == 'armcc': + LOCAL_CCFLAGS += ' --c99' +elif rtconfig.PLATFORM == 'armclang': + LOCAL_CCFLAGS += ' -std=c99' + +group = DefineGroup('Drivers', src, depend = [], CPPPATH = CPPPATH, LOCAL_CCFLAGS = LOCAL_CCFLAGS) + +Return('group') diff --git a/bsp/renesas/ra6m4-cpk/board/ports/drv_rw007.c b/bsp/renesas/ra6m4-cpk/board/ports/drv_rw007.c new file mode 100644 index 0000000000..14e4155b59 --- /dev/null +++ b/bsp/renesas/ra6m4-cpk/board/ports/drv_rw007.c @@ -0,0 +1,67 @@ +#include +#include +#ifdef BSP_USING_RW007 +#include +#include +#include +#include + +extern void spi_wifi_isr(int vector); + +static void rw007_gpio_init(void) +{ + /* Configure IO */ + rt_pin_mode(RA_RW007_RST_PIN, PIN_MODE_OUTPUT); + rt_pin_mode(RA_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLDOWN); + + /* Reset rw007 and config mode */ + rt_pin_write(RA_RW007_RST_PIN, PIN_LOW); + rt_thread_delay(rt_tick_from_millisecond(100)); + rt_pin_write(RA_RW007_RST_PIN, PIN_HIGH); + + /* Wait rw007 ready(exit busy stat) */ + while (!rt_pin_read(RA_RW007_INT_BUSY_PIN)) + { + rt_thread_delay(5); + } + + rt_thread_delay(rt_tick_from_millisecond(200)); + rt_pin_mode(RA_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLUP); +} + +static struct rt_spi_device rw007_dev; + +int wifi_spi_device_init(void) +{ + char sn_version[32]; + uint32_t cs_pin = RA_RW007_CS_PIN; + + rw007_gpio_init(); + rt_hw_spi_device_attach(&rw007_dev, "wspi", RA_RW007_SPI_BUS_NAME, (void *)cs_pin); + rt_hw_wifi_init("wspi"); + + rt_wlan_set_mode(RT_WLAN_DEVICE_STA_NAME, RT_WLAN_STATION); + rt_wlan_set_mode(RT_WLAN_DEVICE_AP_NAME, RT_WLAN_AP); + + rw007_sn_get(sn_version); + rt_kprintf("\nrw007 sn: [%s]\n", sn_version); + rw007_version_get(sn_version); + rt_kprintf("rw007 ver: [%s]\n\n", sn_version); + + return 0; +} +INIT_APP_EXPORT(wifi_spi_device_init); + +static void int_wifi_irq(void *p) +{ + ((void)p); + spi_wifi_isr(0); +} + +void spi_wifi_hw_init(void) +{ + rt_pin_attach_irq(RA_RW007_INT_BUSY_PIN, PIN_IRQ_MODE_FALLING, int_wifi_irq, 0); + rt_pin_irq_enable(RA_RW007_INT_BUSY_PIN, RT_TRUE); +} + +#endif /* BSP_USING_RW007 */ diff --git a/bsp/renesas/ra6m4-cpk/board/ports/fal_cfg.h b/bsp/renesas/ra6m4-cpk/board/ports/fal_cfg.h new file mode 100644 index 0000000000..37d4e87e0a --- /dev/null +++ b/bsp/renesas/ra6m4-cpk/board/ports/fal_cfg.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-08-21 MurphyZhao the first version + */ +#ifndef _FAL_CFG_H_ +#define _FAL_CFG_H_ + +#include +#include + +/* enable stm32l4 onchip flash driver sample */ +#define FAL_FLASH_PORT_DRIVER_STM32L4 +/* enable SFUD flash driver sample */ +#define FAL_FLASH_PORT_DRIVER_SFUD + +extern const struct fal_flash_dev _onchip_flash_8k; +extern const struct fal_flash_dev _onchip_flash_32k; + +/* flash device table */ +#define FAL_FLASH_DEV_TABLE \ +{ \ + &_onchip_flash_8k, \ + &_onchip_flash_32k, \ +} +/* ====================== Partition Configuration ========================== */ +#ifdef FAL_PART_HAS_TABLE_CFG +/** partition table, The chip flash partition is defined in "\ra\fsp\src\bsp\mcu\ra6m4\bsp_feature.h". + * More details can be found in the RA6M4 Group User Manual: Hardware section 47 Flash memory.*/ +#define FAL_PART_TABLE \ +{ \ + {FAL_PART_MAGIC_WROD, "app", "onchip_flash_8k", 0, 64 * 1024, 0}, \ + {FAL_PART_MAGIC_WROD, "param", "onchip_flash_32k", 0, 32 * 30 * 1024, 0}, \ +} +#endif /* FAL_PART_HAS_TABLE_CFG */ +#endif /* _FAL_CFG_H_ */ + diff --git a/bsp/renesas/ra6m4-cpk/board/ports/gpio_cfg.h b/bsp/renesas/ra6m4-cpk/board/ports/gpio_cfg.h new file mode 100644 index 0000000000..843fea7bbe --- /dev/null +++ b/bsp/renesas/ra6m4-cpk/board/ports/gpio_cfg.h @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022-01-19 Sherman first version + */ + +/* Number of IRQ channels on the device */ +#define RA_IRQ_MAX 16 + +/* PIN to IRQx table */ +#define PIN2IRQX_TABLE(pin) \ +{ \ + switch (pin) \ + { \ + case BSP_IO_PORT_04_PIN_00: \ + case BSP_IO_PORT_02_PIN_06: \ + case BSP_IO_PORT_01_PIN_05: \ + return 0; \ + case BSP_IO_PORT_02_PIN_05: \ + case BSP_IO_PORT_01_PIN_01: \ + case BSP_IO_PORT_01_PIN_04: \ + return 1; \ + case BSP_IO_PORT_02_PIN_03: \ + case BSP_IO_PORT_01_PIN_00: \ + case BSP_IO_PORT_02_PIN_13: \ + return 2; \ + case BSP_IO_PORT_02_PIN_02: \ + case BSP_IO_PORT_01_PIN_10: \ + case BSP_IO_PORT_02_PIN_12: \ + return 3; \ + case BSP_IO_PORT_04_PIN_02: \ + case BSP_IO_PORT_01_PIN_11: \ + case BSP_IO_PORT_04_PIN_11: \ + return 4; \ + case BSP_IO_PORT_04_PIN_01: \ + case BSP_IO_PORT_03_PIN_02: \ + case BSP_IO_PORT_04_PIN_10: \ + return 5; \ + case BSP_IO_PORT_03_PIN_01: \ + case BSP_IO_PORT_00_PIN_00: \ + case BSP_IO_PORT_04_PIN_09: \ + return 6; \ + case BSP_IO_PORT_00_PIN_01: \ + case BSP_IO_PORT_04_PIN_08: \ + return 7; \ + case BSP_IO_PORT_00_PIN_02: \ + case BSP_IO_PORT_03_PIN_05: \ + case BSP_IO_PORT_04_PIN_15: \ + return 8; \ + case BSP_IO_PORT_00_PIN_04: \ + case BSP_IO_PORT_03_PIN_04: \ + case BSP_IO_PORT_04_PIN_14: \ + return 9; \ + case BSP_IO_PORT_00_PIN_05: \ + case BSP_IO_PORT_07_PIN_09: \ + return 10; \ + case BSP_IO_PORT_05_PIN_01: \ + case BSP_IO_PORT_00_PIN_06: \ + case BSP_IO_PORT_07_PIN_08: \ + return 11; \ + case BSP_IO_PORT_05_PIN_02: \ + case BSP_IO_PORT_00_PIN_08: \ + return 12; \ + case BSP_IO_PORT_00_PIN_15: \ + case BSP_IO_PORT_00_PIN_09: \ + return 13; \ + case BSP_IO_PORT_04_PIN_03: \ + case BSP_IO_PORT_05_PIN_12: \ + case BSP_IO_PORT_05_PIN_05: \ + return 14; \ + case BSP_IO_PORT_04_PIN_04: \ + case BSP_IO_PORT_05_PIN_11: \ + case BSP_IO_PORT_05_PIN_06: \ + return 15; \ + default : \ + return -1; \ + } \ +} diff --git a/bsp/renesas/ra6m4-cpk/buildinfo.gpdsc b/bsp/renesas/ra6m4-cpk/buildinfo.gpdsc index 90f1f75496..3fb53af721 100644 --- a/bsp/renesas/ra6m4-cpk/buildinfo.gpdsc +++ b/bsp/renesas/ra6m4-cpk/buildinfo.gpdsc @@ -113,11 +113,14 @@ + + + diff --git a/bsp/renesas/ra6m4-cpk/configuration.xml b/bsp/renesas/ra6m4-cpk/configuration.xml index c239e5f470..e2cb6b7350 100644 --- a/bsp/renesas/ra6m4-cpk/configuration.xml +++ b/bsp/renesas/ra6m4-cpk/configuration.xml @@ -202,7 +202,7 @@ - + diff --git a/bsp/renesas/ra6m4-cpk/docs/picture/1635909864954.png b/bsp/renesas/ra6m4-cpk/docs/picture/1635909864954.png deleted file mode 100644 index f8a1333083..0000000000 Binary files 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"b/bsp/renesas/ra6m4-cpk/docs/\344\275\277\347\224\250\347\221\236\350\220\250FSP\351\205\215\347\275\256\345\267\245\345\205\267.md" deleted file mode 100644 index 41c91fae80..0000000000 --- "a/bsp/renesas/ra6m4-cpk/docs/\344\275\277\347\224\250\347\221\236\350\220\250FSP\351\205\215\347\275\256\345\267\245\345\205\267.md" +++ /dev/null @@ -1,297 +0,0 @@ -## 在 MDK 中使用 FSP - -### 添加RA Smart Config - -1. 打开 MDK，选择 “Tools -> Customize Tools Menu…” -2. 点击 “new” 图标，添加一条自定义命令: RA Smart Configurator -3. Command 输入工具的安装路径， 点击“**…**”找到安装路径下的“rasc.exe”文件并选中 (rasc 安装目录下) -4. Initial Folder 输入参数: $P -5. Arguments 输入参数: --device $D --compiler ARMv6 configuration.xml -6. 点击 OK 保存命令 - -![img](picture/customize.png) - -7. 点击添加的命令 “Tools -> RA smart Configurator”，**打开配置工具**：RA Smart Config - -![image.png](picture/openrasc.png) - -### 添加 Device Partition Manager，添加步骤同上。 - -1. 输入命令名称:`Device Partition Manager` -2. Command: 在安装路径选中`rasc.exe` -3. Initial Folder :`$P` -4. Arguments:`-application com.renesas.cdt.ddsc.dpm.ui.dpmapplication configuration.xml "SL%L"` - -> PS：以上相关操作也可以在 FSP 的说明文档中找到。 -> -> 文档路径（本地）：在 FSP 的安装目录下 .\fsp_documentation\v3.5.0\fsp_user_manual_v3.5.0\index.html -> -> 文档路径（官网）：https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp#document - -### FSP 版本选择 - -此 BSP 已更新 **FSP 3.5.0** 版本的支持，请使用 **FSP 3.5.0** 版本进行配置修改。下文中部分操作截图使用的是 FSP 3.1.0 版本，仅供参考。 - -**使用 RASC 前请务必检查 FSP version 、Board、Device 配置项是否正确。** - -![fsp_version](picture/fsp_version.png) - -## 更新工程配置 - -使用 FSP 配置完成后如果有新的文件添加进工程中，不会马上添加进去。需要先编译一次，如果弹出如下提醒，选择 “是” 然后再次编译即可。 - -![img](picture/import_changes.png) - -## 如何使用 RASC 添加外设 - -**注意：文档中的外设添加步骤均为单独配置的说明，排版顺序不代表外设添加顺序，如遇到引脚冲突请查阅开发板及芯片手册的相关章节。** - -### UART - -如何添加一个 UART 端口外设配置？ - -1. 选择 Stacks 配置页，点击 New Stack 找到 UART。 - -![image.png](picture/rascuart.png) - -2. 配置 UART 参数，因为需要适配 RT-Thread 驱动中使用的命名，所以需要修改命名，设置**name** 、**channel** 、**callback** 是一致的标号。![image.png](picture/rascuart1.png) - -### GPIO 中断 - -如何添加一个 IO 中断？ - -1. 选择引脚编号，进入配置，比如选择 P105 做为中断引脚。可先找到引脚查看可配置成的 IRQx 通道号。 - -![image-20211103200949759](picture/p105.png) - -2. 打开 ICU 中断通道 IRQ00 - -![image-20211103200813467](picture/irq0.png) - -3. 创建 stack 并进入配置。因为需要适配 RT-Thread 驱动中使用的命名，所以需要修改命名，设置**name** 、**channel** 、**callback** 是一致的标号。选择你希望的触发方式，最后保存配置，生成配置代码。 - -![](picture/1635929089445.png) - -![image-20211103201047103](picture/irq1.png) - -4. 测试中断是否成功开启 - - ```c - #define IRQ_TEST_PIN "p105" - void irq_callback_test(void *args) - { - rt_kprintf("\n IRQ00 triggered \n"); - } - - void icu_sample(void) - { - /* init */ - rt_uint32_t pin = rt_pin_get(IRQ_TEST_PIN); - rt_kprintf("\n pin number : 0x%04X \n", pin); - rt_err_t err = rt_pin_attach_irq(pin, PIN_IRQ_MODE_RISING, irq_callback_test, RT_NULL); - if(RT_EOK != err) - { - rt_kprintf("\n attach irq failed. \n"); - } - err = rt_pin_irq_enable(pin, PIN_IRQ_ENABLE); - if(RT_EOK != err) - { - rt_kprintf("\n enable irq failed. \n"); - } - } - MSH_CMD_EXPORT(icu_sample, icu sample); - ``` - -### WDT - -1. 创建 WDT - -![image-20211019152302939](picture/wdt.png) - -2. 配置 WDT，需要注意在 RT-Thread 中只使用了一个 WDT 设备，所以没有对其进行编号，如果是新创建的 WDT 设备需要注意 name 字段，在驱动中默认使用的是`g_wdt` 。 - -![image-20211019152407572](picture/wdt_config.png) - -3. 如何在 ENV 中打开 WDT 以及[WDT 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/watchdog/watchdog) - -![image-20211027183406251](picture/wdt_env.png) - -### RTC - -1. 添加 RTC 设备 - -![image-20211019152536749](picture/rtc.png) - -2. 配置 RTC，需要注意在 RT-Thread 中只是用了一个 RTC 设备，所以没有对其进行编号，如果是新创建的 RTC 设备需要注意 name 字段，在驱动中默认使用的是`g_rtc` 。修改 Callback 为 rtc_callback - -![image-20211019152627412](picture/rtc_config.png) - -3. 如何在 ENV 中打开 RTC 以及[ RTC 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/rtc/rtc) - -![image-20211027181550233](picture/rtc_env.png) - -### Flash - -1. 创建 Flash - -![image-20211026105031200](picture/add_flash.png) - -2. 配置 Flash，需要注意在 RT-Thread 中只使用了一个 flash 设备，所以没有对其进行编号，如果是新创建的 flash 设备需要注意 name 字段，在驱动中默认使用的是`g_flash` 。 - -![image-20211026105628706](picture/config_flash.png) - -3. 如何在 ENV 中打开 Flash - -![image-20211026123252310](picture/flash_menuconfig.png) - -### SPI - -1. 添加一个 SPI 外设端口 - -![image-20211027180820968](picture/spi_add.png) - -2. 配置 channel、name、Clock Phase、Clock Polarity、Callback、 SPI Mode 等参数，波特率在代码中可通过 API 修改，这里可以设置一个默认值。 - -![img](picture/spi.png) - -3. 在 Pins 中打开 SPI0 ，配置端口引脚。**注意：请勿在此处配置 SSLx 片选引脚，片选引脚的控制在驱动程序中由软件控制。** - -![image-20211209162334093](picture/spi_pin.png) - - -4. 如何在 ENV 中打开 SPI 以及 [SPI 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/spi/spi) - - ![image-20211027181444023](picture/spi_env.png) - -### ADC/DAC - -创建 ADC/DAC - -![img](picture/adc_dac.png) - -- **ADC** - -1. 配置 name、unit、mode，选择扫描的通道编号 - -![img](picture/adc_config.png) - -2. 配置扫描通道对应的引脚 - -![img](picture/adc_config1.png) - -3. 在 menuconfig 中打开对应的通道 - -- **DAC** - -1. 需要先关闭 P014 的默认 mode - -![img](picture/dac_config0.png) - -2. 开启 DAC0 通道 - -![img](picture/dac_config1.png) - -3. 修改通道号为 0，与 DAC0 对应 - -![img](picture/dac_config2.png) - -4. 在 menuconfig 中打开对应的通道 - -### 通用 PWM 定时器（GPT） - -GPT 定时器在该芯片中可作为通用定时器，也可以用于产生 PWM 信号。在将其用于产生 PWM 信号时，GPT 定时器提供了 gpt0 - gpt9 总共 10 个通道，每个通道可以设定两个输出端口。当前版本的 PWM 驱动将每个通道都看做一个单独的 PWM 设备，每个设备都只有一个通道。用户可以选择开启一个通道的任意一个输出端口，或将两个端口均开启，但在同时开启两个端口的情况下，它们输出的波形将完全一致。 - -1. 添加 GPT 设备 - - ![img](./picture/add_gpt1.png) -2. 配置通道 - - ![img](./picture/add_gpt2.png) - - 对 GPT 较为关键的配置如图所示，具体解释如下： - - 1. 将``Common`` ->``Pin Output Support`` 设置为 Enable ，以开启 PWM 波形的输出。 - 2. 指定 GPT 通道，并根据通道数指定 GPT 的名称，例如此处指定 GPT 通道 3 ，所以 GPT 的名称必须为``g_timer3``。并且将定时器模式设置为 PWM ，并指定每个 PWM 周期的计数值。 - 3. 设定 PWM 通道默认输出的占空比，这里为 50% 。 - 4. 设定 GPT 通道下两个输出端口的使能状态。 - 5. 此处设置 GPT 通道下两个输出端口各自对应的引脚。 -3. 配置输出引脚 - - ![img](./picture/add_gpt3.png) - - 在完成上一步对 GPT 定时器的设置后，根据图示找到对应 GPT 通道输出引脚设置的界面（这里是 GPT3），将图中标号 **1** 处设置为 ``GTIOCA or GTIOCB`` ，并根据需要在图中标号 **2** 处设置 GPT 通道下两个输出端口各自对应的输出引脚。 - - 4. 在 menuconfig 中打开对应的通道，[RT-Thread 的 pwm 框架介绍](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/pwm/pwm) - - ![image-20211103202216381](picture/pwm_env.png) - -### CAN - -1. 添加CAN - -![image-20211102145023112](picture/can.png) - -2. 配置Callback为 `can0_callback` 或 `can1_callback` - -![image-20211102145227603](picture/can_callback.png) - -3. 配置其他选项，并生成代码。 - -4. 使用ENV使能CAN。[CAN设备使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/can/can) - -![image-20211102145613309](picture/can_menuconfig.png) - - -### 使用 WiFi 模块 [RW007 ](https://github.com/RT-Thread-packages/rw007) - -1. 软件包配置中找到 RW007，并修改为下图配置 - -![image-20211108142805319](picture/rw007_pkg.png) - -2. menuconfig 中打开驱动的 RW007 配置，默认使用了 SPI1 端口。所以需要打开 SPI1 总线。 - -![image-20211108142453678](picture/rw007_spi.png) - -![image-20211213212034701](picture/drv_rw007.png) - -3. 在设备驱动框架中打开 [WLAN 框架](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/wlan/wlan)， - -![image-20211108143027485](picture/rw007_wlan.png) - -在网络配置中打开 NETDEV 组件： - -![image-20211108143712513](picture/rw007_netdev.png) - -在 kernel 中打开 mempool 配置： - -![image-20211209161902884](picture/rw007_mempool.png) - -4. FSP 中打开添加 SPI 外设端口，[如何添加SPI](#SPI)。下图以 SPI1 端口为例的配置如下： - -![image-20211108183631379](picture/rw007_spicfg.png) - -5. RW007 有一个从机控制的 INT 引脚，需要占用一个 IRQ 通道，下图以 P506 为例的配置如下： - -![image-20211108183724282](picture/rw007_int.png) - -6. RW007 的 RESET 控制引脚修改默认配置，这里在 RASC 中 mode 设为关闭，交由 RW007 中进行控制。 - -![image-20211213144108558](picture/rw007_reset.png) - -7. 配置完成，检查 MDK 工程中是否加入了必要的文件 - -![image-20211109102232233](picture/rw007_mdk.png) - -8. 编译下载，验证结果。 - -系统启动会自动获取 RW007 的信息，输入`wifi scan` 命令扫描环境中的 WiFi 信号。[更多 WiFi 命令](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/wlan/wlan?id=finsh-%e5%91%bd%e4%bb%a4) - -![image-20211109103856130](picture/rw007_test.png) - -使用 `WiFi join` 命令连接 WiFi 热点 ： - -![image-20211109104735733](picture/rw007_wifijoin.png) - -使用 `ping rt-thread.com` 测试网络连接： - -![image-20211109104700939](picture/rw007_ping.png) \ No newline at end of file diff --git a/bsp/renesas/ra6m4-cpk/drivers/Kconfig b/bsp/renesas/ra6m4-cpk/drivers/Kconfig deleted file mode 100644 index 5f7a820626..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/Kconfig +++ /dev/null @@ -1,235 +0,0 @@ -menu "Hardware Drivers Config" - - config SOC_SERIES_R7FA6M4AF - bool - select RT_USING_COMPONENTS_INIT - select RT_USING_USER_MAIN - default y - - menu "Onboard Peripheral Drivers" - - endmenu - - menu "On-chip Peripheral Drivers" - - config BSP_USING_GPIO - bool "Enable GPIO" - select RT_USING_PIN - default y - - config BSP_USING_ONCHIP_FLASH - bool "Enable Onchip FLASH" - default n - - config BSP_USING_WDT - bool "Enable Watchdog Timer" - select RT_USING_WDT - default n - - menuconfig BSP_USING_UART - bool "Enable UART" - default y - select RT_USING_SERIAL - select RT_USING_SERIAL_V2 - if BSP_USING_UART - menuconfig BSP_USING_UART7 - bool "Enable UART7 (Console)" - default y - if BSP_USING_UART7 - config BSP_UART7_RX_USING_DMA - bool "Enable UART7 RX DMA" - depends on BSP_USING_UART7 && RT_SERIAL_USING_DMA - default n - - config BSP_UART7_TX_USING_DMA - bool "Enable UART7 TX DMA" - depends on BSP_USING_UART7 && RT_SERIAL_USING_DMA - default n - - config BSP_UART7_RX_BUFSIZE - int "Set UART7 RX buffer size" - range 64 65535 - depends on RT_USING_SERIAL_V2 - default 256 - - config BSP_UART7_TX_BUFSIZE - int "Set UART7 TX buffer size" - range 0 65535 - depends on RT_USING_SERIAL_V2 - default 0 - endif - endif - - menuconfig BSP_USING_I2C - bool "Enable I2C BUS" - default n - select RT_USING_I2C - select RT_USING_I2C_BITOPS - select RT_USING_PIN - if BSP_USING_I2C - menuconfig BSP_USING_I2C1 - bool "Enable I2C1 BUS (software simulation)" - default y - if BSP_USING_I2C1 - config BSP_I2C1_SCL_PIN - hex "i2c1 scl pin number" - range 0x0000 0x0B0F - default 0x0512 - config BSP_I2C1_SDA_PIN - hex "I2C1 sda pin number" - range 0x0000 0x0B0F - default 0x0511 - endif - endif - - menuconfig BSP_USING_ONCHIP_RTC - bool "Enable RTC" - select RT_USING_RTC - default n - if BSP_USING_ONCHIP_RTC - endif - - menuconfig BSP_USING_SPI - bool "Enable SPI BUS" - default n - select RT_USING_SPI - if BSP_USING_SPI - config BSP_SPI_USING_DTC_DMA - bool "Enable SPI DTC transfers data without using the CPU." - default n - - config BSP_USING_SPI0 - bool "Enable SPI0 BUS" - default n - - config BSP_USING_SPI1 - bool "Enable SPI1 BUS" - default n - endif - - menuconfig BSP_USING_ADC - bool "Enable ADC" - default n - select RT_USING_ADC - if BSP_USING_ADC - config BSP_USING_ADC0 - bool "Enable ADC0" - default n - - config BSP_USING_ADC1 - bool "Enable ADC1" - default n - endif - - menuconfig BSP_USING_DAC - bool "Enable DAC" - default n - select RT_USING_DAC - if BSP_USING_DAC - config BSP_USING_DAC0 - bool "Enable DAC0" - default n - - config BSP_USING_DAC1 - bool "Enable DAC1" - default n - endif - - menuconfig BSP_USING_PWM - bool "Enable PWM" - default n - select RT_USING_PWM - if BSP_USING_PWM - config BSP_USING_PWM0 - bool "Enable GPT0 (32-Bits) output PWM" - default n - - config BSP_USING_PWM1 - bool "Enable GPT1 (32-Bits) output PWM" - default n - - config BSP_USING_PWM2 - bool "Enable GPT2 (32-Bits) output PWM" - default n - - config BSP_USING_PWM3 - bool "Enable GPT3 (32-Bits) output PWM" - default n - - config BSP_USING_PWM4 - bool "Enable GPT4 (16-Bits) output PWM" - default n - - config BSP_USING_PWM5 - bool "Enable GPT5 (16-Bits) output PWM" - default n - - config BSP_USING_PWM6 - bool "Enable GPT6 (16-Bits) output PWM" - default n - - config BSP_USING_PWM7 - bool "Enable GPT7 (16-Bits) output PWM" - default n - - config BSP_USING_PWM8 - bool "Enable GPT8 (16-Bits) output PWM" - default n - - config BSP_USING_PWM9 - bool "Enable GPT9 (16-Bits) output PWM" - default n - endif - - menuconfig BSP_USING_CAN - bool "Enable CAN" - default n - select RT_USING_CAN - if BSP_USING_CAN - config BSP_USING_CAN0 - bool "Enable CAN0" - default n - - config BSP_USING_CAN1 - bool "Enable CAN1" - default n - endif - - endmenu - - menu "Board extended module Drivers" - - menuconfig BSP_USING_RW007 - bool "Enable RW007" - default n - select PKG_USING_RW007 - select BSP_USING_SPI - - if BSP_USING_RW007 - config RA_RW007_SPI_BUS_NAME - string "RW007 BUS NAME" - default "spi1" - - config RA_RW007_CS_PIN - hex "(HEX)CS pin index" - default 0x040D - - config RA_RW007_BOOT0_PIN - hex "(HEX)BOOT0 pin index (same as spi clk pin)" - default 0x040C - - config RA_RW007_BOOT1_PIN - hex "(HEX)BOOT1 pin index (same as spi cs pin)" - default 0x040D - - config RA_RW007_INT_BUSY_PIN - hex "(HEX)INT/BUSY pin index" - default 0x0506 - - config RA_RW007_RST_PIN - hex "(HEX)RESET pin index" - default 0x040F - endif - - endmenu -endmenu diff --git a/bsp/renesas/ra6m4-cpk/drivers/SConscript b/bsp/renesas/ra6m4-cpk/drivers/SConscript deleted file mode 100644 index ca19599087..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/SConscript +++ /dev/null @@ -1,55 +0,0 @@ -Import('RTT_ROOT') -Import('rtconfig') -from building import * - -cwd = GetCurrentDir() - -# add the general drivers. -src = Split(""" - drv_common.c -""") - -if GetDepend(['BSP_USING_UART']): - if GetDepend(['RT_USING_SERIAL_V2']): - src += ['drv_usart_v2.c'] - else: - print("\nThe current project does not support serial-v1\n") - Return('group') - -if GetDepend(['BSP_USING_GPIO']): - src += ['drv_gpio.c'] - -if GetDepend(['BSP_USING_WDT']): - src += ['drv_wdt.c'] - -if GetDepend(['BSP_USING_ONCHIP_RTC']): - src += ['drv_rtc.c'] - -if GetDepend(['BSP_USING_I2C', 'RT_USING_I2C_BITOPS']): - if GetDepend('BSP_USING_I2C0') or GetDepend('BSP_USING_I2C1'): - src += ['drv_soft_i2c.c'] - -if GetDepend(['BSP_USING_SPI']): - src += ['drv_spi.c'] - -if GetDepend(['BSP_USING_ADC']): - src += ['drv_adc.c'] - -if GetDepend(['BSP_USING_DAC']): - src += ['drv_dac.c'] - -if GetDepend(['BSP_USING_ONCHIP_FLASH']): - src += ['drv_flash.c'] - -if GetDepend(['BSP_USING_PWM']): - src += ['drv_pwm.c'] - -if GetDepend(['BSP_USING_CAN']): - src += ['drv_can.c'] - -path = [cwd] -path += [cwd + '/config'] - -group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path) - -Return('group') diff --git a/bsp/renesas/ra6m4-cpk/drivers/board.h b/bsp/renesas/ra6m4-cpk/drivers/board.h deleted file mode 100644 index 999e4749fe..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/board.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-10 Sherman first version - */ - -#ifndef __BOARD_H__ -#define __BOARD_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define RA_SRAM_SIZE 256 -#define RA_SRAM_END (0x20000000 + RA_SRAM_SIZE * 1024) - -#ifdef __ARMCC_VERSION -extern int Image$$RAM_END$$ZI$$Base; -#define HEAP_BEGIN ((void *)&Image$$RAM_END$$ZI$$Base) -#elif __ICCARM__ -#pragma section="CSTACK" -#define HEAP_BEGIN (__segment_end("CSTACK")) -#else -extern int __RAM_segment_used_end__; -#define HEAP_BEGIN (&__RAM_segment_used_end__) -#endif - -#define HEAP_END RA_SRAM_END - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/bsp/renesas/ra6m4-cpk/drivers/config/drv_config.h b/bsp/renesas/ra6m4-cpk/drivers/config/drv_config.h deleted file mode 100644 index bb57d8079c..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/config/drv_config.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#ifndef __DRV_CONFIG_H__ -#define __DRV_CONFIG_H__ - -#include "board.h" -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef SOC_SERIES_R7FA6M4AF -#include "ra6m4/uart_config.h" - -#ifdef BSP_USING_ADC -#include "ra6m4/adc_config.h" -#endif - -#ifdef BSP_USING_DAC -#include "ra6m4/dac_config.h" -#endif - -#ifdef BSP_USING_PWM -#include "ra6m4/pwm_config.h" -#endif - -#ifdef BSP_USING_CAN -#include "ra6m4/can_config.h" -#endif - -#endif/* SOC_SERIES_R7FA6M4AF */ - -#ifdef __cplusplus -} -#endif - -#endif/* __DRV_CONFIG_H__ */ diff --git a/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/adc_config.h b/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/adc_config.h deleted file mode 100644 index 4575d4dff1..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/adc_config.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-19 Mr.Tiger first version - */ - -#ifndef __ADC_CONFIG_H__ -#define __ADC_CONFIG_H__ - -#include -#include -#include "hal_data.h" -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1) -struct ra_adc_map -{ - char name; - const adc_cfg_t *g_cfg; - const adc_instance_ctrl_t *g_ctrl; - const adc_channel_cfg_t *g_channel_cfg; -}; - -struct ra_dev -{ - rt_adc_device_t ra_adc_device_t; - struct ra_adc_map *ra_adc_dev; -}; -#endif -#endif - -#ifdef __cplusplus -} -#endif - diff --git a/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/can_config.h b/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/can_config.h deleted file mode 100644 index 8bd3dd5600..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/can_config.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-29 mazhiyuan first version - */ - -#ifndef __CAN_CONFIG_H__ -#define __CAN_CONFIG_H__ - -#include -#include "hal_data.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(BSP_USING_CAN0) -#ifndef CAN0_CONFIG -#define CAN0_CONFIG \ - { \ - .name = "can0", \ - .num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can0, \ - .p_api_ctrl = &g_can0_ctrl, \ - .p_cfg = &g_can0_cfg, \ - } -#endif /* CAN0_CONFIG */ -#endif /* BSP_USING_CAN0 */ - -#if defined(BSP_USING_CAN1) -#ifndef CAN1_CONFIG -#define CAN1_CONFIG \ - { \ - .name = "can1", \ - .num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can1, \ - .p_api_ctrl = &g_can1_ctrl, \ - .p_cfg = &g_can1_cfg, \ - } -#endif /* CAN1_CONFIG */ -#endif /* BSP_USING_CAN1 */ - -#ifdef __cplusplus -} -#endif -#endif diff --git a/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/dac_config.h b/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/dac_config.h deleted file mode 100644 index 0765a8c228..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/dac_config.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-19 Mr.Tiger first version - */ - -#ifndef __DAC_CONFIG_H__ -#define __DAC_CONFIG_H__ - -#include -#include -#include "hal_data.h" -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef BSP_USING_DAC -struct ra_dac_map -{ - char name; - const struct st_dac_cfg *g_cfg; - const struct st_dac_instance_ctrl *g_ctrl; -}; - -struct ra_dac_dev -{ - rt_dac_device_t ra_dac_device_t; - struct ra_dac_map *ra_dac_map_dev; -}; -#endif - -#endif - -#ifdef __cplusplus -} -#endif - diff --git a/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/pwm_config.h b/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/pwm_config.h deleted file mode 100644 index 9dd5f01e54..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/pwm_config.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-26 KevinXu first version - */ -#ifndef __PWM_CONFIG_H__ -#define __PWM_CONFIG_H__ - -#include -#include -#include "hal_data.h" - -#ifdef __cplusplus -extern "C" { -#endif - -enum -{ -#ifdef BSP_USING_PWM0 - BSP_PWM0_INDEX, -#endif -#ifdef BSP_USING_PWM1 - BSP_PWM1_INDEX, -#endif -#ifdef BSP_USING_PWM2 - BSP_PWM2_INDEX, -#endif -#ifdef BSP_USING_PWM3 - BSP_PWM3_INDEX, -#endif -#ifdef BSP_USING_PWM4 - BSP_PWM4_INDEX, -#endif -#ifdef BSP_USING_PWM5 - BSP_PWM5_INDEX, -#endif -#ifdef BSP_USING_PWM6 - BSP_PWM6_INDEX, -#endif -#ifdef BSP_USING_PWM7 - BSP_PWM7_INDEX, -#endif -#ifdef BSP_USING_PWM8 - BSP_PWM8_INDEX, -#endif -#ifdef BSP_USING_PWM9 - BSP_PWM9_INDEX, -#endif - BSP_PWMS_NUM -}; - -#define PWM_DRV_INITIALIZER(num) \ - { \ - .name = "pwm"#num , \ - .g_cfg = &g_timer##num##_cfg, \ - .g_ctrl = &g_timer##num##_ctrl, \ - .g_timer = &g_timer##num, \ - } - -#ifdef __cplusplus -} -#endif - -#endif /* __PWM_CONFIG_H__ */ diff --git a/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/uart_config.h b/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/uart_config.h deleted file mode 100644 index b0593a457e..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/config/ra6m4/uart_config.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#ifndef __UART_CONFIG_H__ -#define __UART_CONFIG_H__ - -#include -#include "hal_data.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(BSP_USING_UART7) -#ifndef UART7_CONFIG -#define UART7_CONFIG \ - { \ - .name = "uart7", \ - .p_api_ctrl = &g_uart7_ctrl, \ - .p_cfg = &g_uart7_cfg, \ - } -#endif /* UART7_CONFIG */ -#endif /* BSP_USING_UART7 */ - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_adc.c b/bsp/renesas/ra6m4-cpk/drivers/drv_adc.c deleted file mode 100644 index 9fd734d922..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_adc.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-19 Mr.Tiger first version - */ - -#include "drv_config.h" -#ifdef RT_USING_ADC - -// #define DRV_DEBUG -#define DBG_TAG "drv.adc" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ -#include - -struct ra_adc_map ra_adc[] = -{ -#if defined(BSP_USING_ADC0) - {'0', &g_adc0_cfg, &g_adc0_ctrl, &g_adc0_channel_cfg}, -#endif - -#if defined(BSP_USING_ADC1) - {'1', &g_adc1_cfg, &g_adc1_ctrl, &g_adc1_channel_cfg}, -#endif -}; - -#if defined(BSP_USING_ADC0) -struct rt_adc_device adc0_device; -struct ra_dev _ra_adc0_device = {.ra_adc_device_t = &adc0_device, .ra_adc_dev = &ra_adc[0]}; -#endif - -#if defined(BSP_USING_ADC1) -struct rt_adc_device adc1_device; -struct ra_dev _ra_adc1_device = {.ra_adc_device_t = &adc1_device, .ra_adc_dev = &ra_adc[1]}; -#endif - -static rt_err_t ra_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled) -{ - RT_ASSERT(device != RT_NULL); - struct ra_adc_map *adc = (struct ra_adc_map *)device->parent.user_data; - /**< start adc*/ - if (enabled) - { - if (FSP_SUCCESS != R_ADC_ScanStart((adc_ctrl_t *)adc->g_ctrl)) - { - LOG_E("start adc%c failed.", adc->name); - return -RT_ERROR; - } - } - else - { - /**< stop adc*/ - if (FSP_SUCCESS != R_ADC_ScanStop((adc_ctrl_t *)adc->g_ctrl)) - { - LOG_E("stop adc%c failed.", adc->name); - return -RT_ERROR; - } - } - return RT_EOK; -} - -rt_err_t ra_adc_close(struct rt_adc_device *device) -{ - RT_ASSERT(device != RT_NULL); - struct ra_adc_map *adc = (struct ra_adc_map *)(struct ra_adc_map *)device->parent.user_data; - if (FSP_SUCCESS != R_ADC_Close((adc_ctrl_t *)adc->g_ctrl)) - { - LOG_E("close adc%c failed.", adc->name); - return -RT_ERROR; - } - return RT_EOK; -} - -static rt_err_t ra_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value) -{ - RT_ASSERT(device != RT_NULL); - struct ra_adc_map *adc = (struct ra_adc_map *)device->parent.user_data; - if (RT_EOK != R_ADC_Read32((adc_ctrl_t *)adc->g_ctrl, channel, value)) - { - LOG_E("get adc value failed.\n"); - return -RT_ERROR; - } - return RT_EOK; -} - -static const struct rt_adc_ops ra_adc_ops = -{ - .enabled = ra_adc_enabled, - .convert = ra_get_adc_value, -}; - -static int ra_adc_init(void) -{ -#if defined(BSP_USING_ADC0) - R_ADC_Open((adc_ctrl_t *)_ra_adc0_device.ra_adc_dev->g_ctrl, - (adc_cfg_t const * const)_ra_adc0_device.ra_adc_dev->g_cfg); - - R_ADC_ScanCfg((adc_ctrl_t *)_ra_adc0_device.ra_adc_dev->g_ctrl, - (adc_cfg_t const * const)_ra_adc0_device.ra_adc_dev->g_channel_cfg); - - if (RT_EOK != rt_hw_adc_register(_ra_adc0_device.ra_adc_device_t, "adc0", &ra_adc_ops, (void *)_ra_adc0_device.ra_adc_dev)) - { - LOG_E("adc0 register failed"); - return -RT_ERROR; - } -#endif - -#if defined(BSP_USING_ADC1) - R_ADC_Open((adc_ctrl_t *)_ra_adc1_device.ra_adc_dev->g_ctrl, - (adc_cfg_t const * const)_ra_adc1_device.ra_adc_dev->g_cfg); - - R_ADC_ScanCfg((adc_ctrl_t *)_ra_adc1_device.ra_adc_dev->g_ctrl, - (adc_cfg_t const * const)_ra_adc1_device.ra_adc_dev->g_channel_cfg); - - if (RT_EOK != rt_hw_adc_register(_ra_adc1_device.ra_adc_device_t, "adc1", &ra_adc_ops, (void *)_ra_adc1_device.ra_adc_dev)) - { - LOG_E("adc1 register failed"); - return -RT_ERROR; - } -#endif - - return RT_EOK; -} -INIT_BOARD_EXPORT(ra_adc_init); -#endif diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_can.c b/bsp/renesas/ra6m4-cpk/drivers/drv_can.c deleted file mode 100644 index f87e0d9155..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_can.c +++ /dev/null @@ -1,310 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-29 mazhiyuan first version - */ - -#include "drv_can.h" - -static struct ra_can_config can_config[] = -{ -#ifdef BSP_USING_CAN0 - CAN0_CONFIG, -#endif - -#ifdef BSP_USING_CAN1 - CAN1_CONFIG -#endif -}; - -enum -{ -#ifdef BSP_USING_CAN0 - CAN0_INDEX, -#endif - -#ifdef BSP_USING_CAN1 - CAN1_INDEX, -#endif -}; - -static struct ra_can can_obj[sizeof(can_config) / sizeof(can_config[0])] = {0}; - -static const struct ra_baud_rate_tab can_baud_rate_tab[] = -{ - {CAN1MBaud, 3, 6, 3, 1 + 4}, - {CAN800kBaud, 4, 15, 5, 1 + 2}, - {CAN500kBaud, 4, 14, 5, 1 + 4}, - {CAN250kBaud, 4, 14, 5, 1 + 9}, - {CAN125kBaud, 4, 14, 5, 1 + 19}, - {CAN100kBaud, 4, 14, 5, 1 + 24}, - {CAN50kBaud, 4, 14, 5, 1 + 49}, - {CAN20kBaud, 4, 14, 5, 1 + 124}, - {CAN10kBaud, 4, 14, 5, 1 + 249} -}; - -static rt_uint32_t get_can_baud_index(rt_uint32_t baud) -{ - rt_uint32_t len, index; - - len = sizeof(can_baud_rate_tab) / sizeof(can_baud_rate_tab[0]); - for (index = 0; index < len; index++) - { - if (can_baud_rate_tab[index].baud_rate == baud) - return index; - } - - return 0; /* default baud is CAN1MBaud */ -} - -static void ra_can_get_config(void) -{ - struct can_configure config = CANDEFAULTCONFIG; -#ifdef BSP_USING_CAN0 - can_obj[CAN0_INDEX].can_dev.config = config; - can_obj[CAN0_INDEX].can_dev.config.msgboxsz = CAN_NO_OF_MAILBOXES_g_can0; - can_obj[CAN0_INDEX].can_dev.config.sndboxnumber = 1; - can_obj[CAN0_INDEX].can_dev.config.ticks = 50; -#endif -#ifdef BSP_USING_CAN1 - can_obj[CAN1_INDEX].can_dev.config = config; - can_obj[CAN1_INDEX].can_dev.config.msgboxsz = CAN_NO_OF_MAILBOXES_g_can1; - can_obj[CAN1_INDEX].can_dev.config.sndboxnumber = 1; - can_obj[CAN1_INDEX].can_dev.config.ticks = 50; -#endif -} -rt_err_t ra_can_configure(struct rt_can_device *can_dev, struct can_configure *cfg) -{ - struct ra_can *can; - RT_ASSERT(can_dev != RT_NULL); - RT_ASSERT(cfg != RT_NULL); - - fsp_err_t err = FSP_SUCCESS; - - can = rt_container_of(can_dev, struct ra_can, can_dev); - RT_ASSERT(can != RT_NULL); - err = R_CAN_Open(can->config->p_api_ctrl, can->config->p_cfg); - if (FSP_SUCCESS != err) - { - return RT_ERROR; - } - return RT_EOK; -} -rt_err_t ra_can_control(struct rt_can_device *can_dev, int cmd, void *arg) -{ - struct ra_can *can; - can_info_t can_info; - rt_uint32_t argval; - RT_ASSERT(can_dev != RT_NULL); - can = rt_container_of(can_dev, struct ra_can, can_dev); - switch (cmd) - { - case RT_DEVICE_CTRL_CLR_INT: - R_BSP_IrqStatusClear((IRQn_Type)arg); - break; - case RT_CAN_CMD_SET_BAUD: - argval = (rt_uint32_t) arg; - if (argval != CAN1MBaud && - argval != CAN800kBaud && - argval != CAN500kBaud && - argval != CAN250kBaud && - argval != CAN125kBaud && - argval != CAN100kBaud && - argval != CAN50kBaud && - argval != CAN20kBaud && - argval != CAN10kBaud) - { - return -RT_ERROR; - } - if (argval != can->can_dev.config.baud_rate) - { - can->can_dev.config.baud_rate = argval; - uint32_t index = get_can_baud_index(argval); - can->config->p_cfg->p_bit_timing->baud_rate_prescaler = can_baud_rate_tab[index].prescaler; - can->config->p_cfg->p_bit_timing->synchronization_jump_width = can_baud_rate_tab[index].sjw; - can->config->p_cfg->p_bit_timing->time_segment_1 = can_baud_rate_tab[index].ts1; - can->config->p_cfg->p_bit_timing->time_segment_2 = can_baud_rate_tab[index].ts2; - return ra_can_configure(&can->can_dev, &can->can_dev.config); - } - break; - case RT_CAN_CMD_SET_MODE: - argval = (rt_uint32_t) arg; - if (argval != RT_CAN_MODE_NORMAL && - argval != RT_CAN_MODE_LISEN && - argval != RT_CAN_MODE_LOOPBACK) - { - return -RT_ERROR; - } - if (argval != can->can_dev.config.mode) - { - can_test_mode_t mode_to_set; - can->can_dev.config.mode = argval; - switch (argval) - { - case RT_CAN_MODE_NORMAL: - mode_to_set = CAN_TEST_MODE_DISABLED; - case RT_CAN_MODE_LISEN: - mode_to_set = CAN_TEST_MODE_LISTEN; - case RT_CAN_MODE_LOOPBACK: - mode_to_set = CAN_TEST_MODE_LOOPBACK_INTERNAL; - } - R_CAN_ModeTransition(can->config->p_api_ctrl, ((can_instance_ctrl_t *)(can->config->p_api_ctrl))->operation_mode, mode_to_set); - } - break; - case RT_CAN_CMD_GET_STATUS: - R_CAN_InfoGet(can->config->p_api_ctrl, &can_info); - can->can_dev.status.rcverrcnt = can_info.error_count_receive; - can->can_dev.status.snderrcnt = can_info.error_count_transmit; - can->can_dev.status.errcode = can_info.error_code; - rt_memcpy(arg, &can->can_dev.status, sizeof(can->can_dev.status)); - break; - default: - return -RT_ERROR; - } - return RT_EOK; -} -int ra_can_sendmsg(struct rt_can_device *can_dev, const void *buf, rt_uint32_t boxno) -{ - struct ra_can *can; - can_frame_t g_can_tx_frame; - struct rt_can_msg *msg_rt = (struct rt_can_msg *)buf; - RT_ASSERT(can_dev != RT_NULL); - RT_ASSERT(buf != RT_NULL); - - g_can_tx_frame.id = msg_rt->id; - g_can_tx_frame.id_mode = msg_rt->ide; - g_can_tx_frame.type = msg_rt->rtr; - g_can_tx_frame.data_length_code = msg_rt->len; - g_can_tx_frame.options = 0; - memcpy(g_can_tx_frame.data, msg_rt->data, 8); - can = rt_container_of(can_dev, struct ra_can, can_dev); - RT_ASSERT(boxno < can->config->num_of_mailboxs); - - if (R_CAN_Write(can->config->p_api_ctrl, boxno, &g_can_tx_frame) != FSP_SUCCESS) - { - rt_exit_critical(); - return RT_ERROR; - } - return RT_EOK; -} - -int ra_can_recvmsg(struct rt_can_device *can_dev, void *buf, rt_uint32_t boxno) -{ - struct rt_can_msg *msg_rt = (struct rt_can_msg *)buf; - can_frame_t *msg_ra; - struct ra_can *can; - - RT_ASSERT(can_dev != RT_NULL); - RT_ASSERT(buf != RT_NULL); - can = rt_container_of(can_dev, struct ra_can, can_dev); - RT_ASSERT(boxno < can->config->num_of_mailboxs); - if (can->callback_args->mailbox != boxno) - return 0; - msg_ra = can->callback_args->p_frame; - - msg_rt->id = msg_ra->id; - msg_rt->ide = msg_ra->id_mode; - msg_rt->rtr = msg_ra->type; - msg_rt->rsv = RT_NULL; - msg_rt->len = msg_ra->data_length_code; - msg_rt->priv = boxno; - msg_rt->hdr = RT_NULL; - memcpy(msg_rt->data, msg_ra->data, msg_ra->data_length_code); - return sizeof(struct rt_can_msg); -} -const struct rt_can_ops ra_can_ops = -{ - .configure = ra_can_configure, - .control = ra_can_control, - .sendmsg = ra_can_sendmsg, - .recvmsg = ra_can_recvmsg -}; - -#ifdef BSP_USING_CAN0 -void can0_callback(can_callback_args_t *p_args) -{ - rt_interrupt_enter(); - switch (p_args->event) - { - case CAN_EVENT_TX_COMPLETE: - rt_hw_can_isr(&can_obj[CAN0_INDEX].can_dev, RT_CAN_EVENT_TX_DONE | p_args->mailbox << 8); - break; - case CAN_EVENT_RX_COMPLETE: - can_obj[CAN0_INDEX].callback_args = p_args; - if (p_args->event == CAN_EVENT_RX_COMPLETE) - rt_hw_can_isr(&can_obj[CAN0_INDEX].can_dev, RT_CAN_EVENT_RX_IND | p_args->mailbox << 8); - break; - case CAN_EVENT_TX_ABORTED: - rt_hw_can_isr(&can_obj[CAN0_INDEX].can_dev, RT_CAN_EVENT_TX_FAIL | p_args->mailbox << 8); - break; - case CAN_EVENT_MAILBOX_MESSAGE_LOST: //overwrite/overrun error event - case CAN_EVENT_BUS_RECOVERY: //Bus recovery error event - case CAN_EVENT_ERR_BUS_OFF: //error Bus Off event - case CAN_EVENT_ERR_PASSIVE: //error passive event - case CAN_EVENT_ERR_WARNING: //error warning event - case CAN_EVENT_ERR_BUS_LOCK: //error bus lock - case CAN_EVENT_ERR_CHANNEL: //error channel - case CAN_EVENT_ERR_GLOBAL: //error global - { - break; - } - } - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_CAN1 -void can1_callback(can_callback_args_t *p_args) -{ - rt_interrupt_enter(); - switch (p_args->event) - { - case CAN_EVENT_TX_COMPLETE: - rt_hw_can_isr(&can_obj[CAN1_INDEX].can_dev, RT_CAN_EVENT_TX_DONE | p_args->mailbox << 8); - break; - case CAN_EVENT_RX_COMPLETE: - can_obj[CAN1_INDEX].callback_args = p_args; - if (p_args->event == CAN_EVENT_RX_COMPLETE) - rt_hw_can_isr(&can_obj[CAN1_INDEX].can_dev, RT_CAN_EVENT_RX_IND | p_args->mailbox << 8); - break; - case CAN_EVENT_TX_ABORTED: - rt_hw_can_isr(&can_obj[CAN1_INDEX].can_dev, RT_CAN_EVENT_TX_FAIL | p_args->mailbox << 8); - break; - case CAN_EVENT_MAILBOX_MESSAGE_LOST: //overwrite/overrun error event - case CAN_EVENT_BUS_RECOVERY: //Bus recovery error event - case CAN_EVENT_ERR_BUS_OFF: //error Bus Off event - case CAN_EVENT_ERR_PASSIVE: //error passive event - case CAN_EVENT_ERR_WARNING: //error warning event - case CAN_EVENT_ERR_BUS_LOCK: //error bus lock - case CAN_EVENT_ERR_CHANNEL: //error channel - case CAN_EVENT_ERR_GLOBAL: //error global - { - break; - } - } - rt_interrupt_leave(); -} -#endif - -int rt_hw_can_init(void) -{ - rt_err_t result = 0; - rt_size_t obj_num = sizeof(can_obj) / sizeof(struct ra_can); - ra_can_get_config(); - for (int i = 0; i < obj_num; i++) - { - /* init CAN object */ - can_obj[i].config = &can_config[i]; - can_obj[i].can_dev.ops = &ra_can_ops; - /* register CAN device */ - result = rt_hw_can_register(&can_obj[i].can_dev, can_obj[i].config->name, can_obj[i].can_dev.ops, RT_NULL); - RT_ASSERT(result == RT_EOK); - } - - return result; -} -INIT_BOARD_EXPORT(rt_hw_can_init); diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_can.h b/bsp/renesas/ra6m4-cpk/drivers/drv_can.h deleted file mode 100644 index 9e17c612fd..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_can.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-29 mazhiyuan first version - */ - -#ifndef __DRV_CAN_H__ -#define __DRV_CAN_H__ - -#include -#include -#include -#include -#include -#include - -/* renesas config class */ -struct ra_can_config -{ - const char *name; - int num_of_mailboxs; - can_ctrl_t *const p_api_ctrl; - can_cfg_t const *const p_cfg; -}; - -struct ra_can -{ - struct rt_can_device can_dev; - struct ra_can_config *config; - can_callback_args_t *callback_args; -}; - -struct ra_baud_rate_tab -{ - rt_uint32_t baud_rate; - rt_uint32_t sjw; - rt_uint32_t ts1; - rt_uint32_t ts2; - rt_uint32_t prescaler; -}; - -int rt_hw_can_init(void); - -#endif diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_common.c b/bsp/renesas/ra6m4-cpk/drivers/drv_common.c deleted file mode 100644 index 4dadc8d4cb..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_common.c +++ /dev/null @@ -1,185 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2018-11-7 SummerGift first version - */ - -#include -#include -#include "board.h" - -#ifdef RT_USING_PIN - #include -#endif - -#ifdef RT_USING_SERIAL - #ifdef RT_USING_SERIAL_V2 - #include - #else - #include - #endif -#endif - -#ifdef RT_USING_FINSH -#include -static void reboot(uint8_t argc, char **argv) -{ - rt_hw_cpu_reset(); -} -MSH_CMD_EXPORT(reboot, Reboot System); -#endif /* RT_USING_FINSH */ - -/* SysTick configuration */ -void rt_hw_systick_init(void) -{ - SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); - NVIC_SetPriority(SysTick_IRQn, 0xFF); -} - -/** - * This is the timer interrupt service routine. - * - */ -void SysTick_Handler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - rt_tick_increase(); - - /* leave interrupt */ - rt_interrupt_leave(); -} - - -/** - * @brief This function is executed in case of error occurrence. - * @param None - * @retval None - */ -void _Error_Handler(char *s, int num) -{ - /* USER CODE BEGIN Error_Handler */ - /* User can add his own implementation to report the HAL error return state */ - while (1) - { - } - /* USER CODE END Error_Handler */ -} - -/** - * This function will delay for some us. - * - * @param us the delay time of us - */ -void rt_hw_us_delay(rt_uint32_t us) -{ - rt_uint32_t ticks; - rt_uint32_t told, tnow, tcnt = 0; - rt_uint32_t reload = SysTick->LOAD; - - ticks = us * reload / (1000000 / RT_TICK_PER_SECOND); - told = SysTick->VAL; - while (1) - { - tnow = SysTick->VAL; - if (tnow != told) - { - if (tnow < told) - { - tcnt += told - tnow; - } - else - { - tcnt += reload - tnow + told; - } - told = tnow; - if (tcnt >= ticks) - { - break; - } - } - } -} - -/** - * This function will initial STM32 board. - */ -RT_WEAK void rt_hw_board_init() -{ - - rt_hw_systick_init(); - - /* Heap initialization */ -#if defined(RT_USING_HEAP) - rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); -#endif - - /* Pin driver initialization is open by default */ -#ifdef RT_USING_PIN - rt_hw_pin_init(); -#endif - - /* USART driver initialization is open by default */ -#ifdef RT_USING_SERIAL - rt_hw_usart_init(); -#endif - - /* Set the shell console output device */ -#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE) - rt_console_set_device(RT_CONSOLE_DEVICE_NAME); -#endif - - /* Board underlying hardware initialization */ -#ifdef RT_USING_COMPONENTS_INIT - rt_components_board_init(); -#endif -} - -FSP_CPP_HEADER -void R_BSP_WarmStart(bsp_warm_start_event_t event); -FSP_CPP_FOOTER - -/*******************************************************************************************************************//** - * This function is called at various points during the startup process. This implementation uses the event that is - * called right before main() to set up the pins. - * - * @param[in] event Where at in the start up process the code is currently at - **********************************************************************************************************************/ -void R_BSP_WarmStart (bsp_warm_start_event_t event) -{ - if (BSP_WARM_START_RESET == event) - { -#if BSP_FEATURE_FLASH_LP_VERSION != 0 - - /* Enable reading from data flash. */ - R_FACI_LP->DFLCTL = 1U; - - /* Would normally have to wait tDSTOP(6us) for data flash recovery. Placing the enable here, before clock and - * C runtime initialization, should negate the need for a delay since the initialization will typically take more than 6us. */ -#endif - } - - if (BSP_WARM_START_POST_C == event) - { - /* C runtime environment and system clocks are setup. */ - - /* Configure pins. */ - R_IOPORT_Open(&g_ioport_ctrl, g_ioport.p_cfg); - } -} - -#if BSP_TZ_SECURE_BUILD - -BSP_CMSE_NONSECURE_ENTRY void template_nonsecure_callable (); - -/* Trustzone Secure Projects require at least one nonsecure callable function in order to build (Remove this if it is not required to build). */ -BSP_CMSE_NONSECURE_ENTRY void template_nonsecure_callable () -{ - -} -#endif \ No newline at end of file diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_common.h b/bsp/renesas/ra6m4-cpk/drivers/drv_common.h deleted file mode 100644 index 2c2a76334f..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_common.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2018-11-7 SummerGift first version - */ - -#ifndef __DRV_COMMON_H__ -#define __DRV_COMMON_H__ - -#include -#include -#ifdef RT_USING_DEVICE - #include -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -void _Error_Handler(char *s, int num); - -#ifndef Error_Handler -#define Error_Handler() _Error_Handler(__FILE__, __LINE__) -#endif - -#define DMA_NOT_AVAILABLE ((DMA_INSTANCE_TYPE *)0xFFFFFFFFU) - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_dac.c b/bsp/renesas/ra6m4-cpk/drivers/drv_dac.c deleted file mode 100644 index 805b8121da..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_dac.c +++ /dev/null @@ -1,113 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-19 Mr.Tiger first version - */ - -#include -#include "drv_config.h" -#ifdef RT_USING_DAC - -//#define DRV_DEBUG -#define DBG_TAG "drv.dac" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ -#include - -struct ra_dac_map ra_dac[] = -{ -#ifdef BSP_USING_DAC0 - {'0', &g_dac0_cfg, &g_dac0_ctrl}, -#endif -#ifdef BSP_USING_DAC1 - {'1', &g_dac1_cfg, &g_dac1_ctrl}, -#endif -}; - -#ifdef BSP_USING_DAC0 -struct rt_dac_device dac0_device; -struct ra_dac_dev _ra_dac0_device = {.ra_dac_device_t = &dac0_device, .ra_dac_map_dev = &ra_dac[0]}; -#endif - -#ifdef BSP_USING_DAC1 -struct rt_dac_device dac1_device; -struct ra_dac_dev _ra_dac1_device = {.ra_dac_device_t = &dac1_device, .ra_dac_map_dev = &ra_dac[1]}; -#endif - -rt_err_t ra_dac_disabled(struct rt_dac_device *device, rt_uint32_t channel) -{ - RT_ASSERT(device != RT_NULL); - struct ra_dac_map *dac = (struct ra_dac_map *)device->parent.user_data; - if (FSP_SUCCESS != R_DAC_Stop((dac_ctrl_t *)dac->g_ctrl)) - { - LOG_E("dac%c stop failed.", dac->name); - return -RT_ERROR; - } - return RT_EOK; -} - -rt_err_t ra_dac_enabled(struct rt_dac_device *device, rt_uint32_t channel) -{ - RT_ASSERT(device != RT_NULL); - struct ra_dac_map *dac = (struct ra_dac_map *)device->parent.user_data; - if (FSP_SUCCESS != R_DAC_Start((dac_ctrl_t *)dac->g_ctrl)) - { - LOG_E("dac%c start failed.", dac->name); - return -RT_ERROR; - } - return RT_EOK; -} - -rt_err_t ra_dac_write(struct rt_dac_device *device, rt_uint32_t channel, rt_uint32_t *value) -{ - RT_ASSERT(device != RT_NULL); - struct ra_dac_map *dac = (struct ra_dac_map *)device->parent.user_data; - if (FSP_SUCCESS != R_DAC_Write((dac_ctrl_t *)dac->g_ctrl, *value)) - { - LOG_E("dac%c set value failed.", dac->name); - return -RT_ERROR; - } - return RT_EOK; -} - -struct rt_dac_ops ra_dac_ops = -{ - .disabled = ra_dac_disabled, - .enabled = ra_dac_enabled, - .convert = ra_dac_write, -}; - -static int ra_dac_init(void) -{ -#ifdef BSP_USING_DAC0 - _ra_dac0_device.ra_dac_device_t->ops = &ra_dac_ops; - R_DAC_Open((dac_ctrl_t *)_ra_dac0_device.ra_dac_map_dev->g_ctrl, (dac_cfg_t const *)_ra_dac0_device.ra_dac_map_dev->g_cfg); - if (FSP_SUCCESS != rt_hw_dac_register(_ra_dac0_device.ra_dac_device_t, "dac0", &ra_dac_ops, (void *)_ra_dac0_device.ra_dac_map_dev)) - { - LOG_E("dac0 register failed"); - return -RT_ERROR; - } -#endif - -#ifdef BSP_USING_DAC1 - _ra_dac1_device.ra_dac_device_t->ops = &ra_dac_ops; - R_DAC_Open((dac_ctrl_t *)_ra_dac1_device.ra_dac_map_dev->g_ctrl, (dac_cfg_t const *) _ra_dac1_device.ra_dac_map_dev->g_cfg); - if (FSP_SUCCESS != rt_hw_dac_register(_ra_dac1_device.ra_dac_device_t, "dac1", &ra_dac_ops, (void *)_ra_dac1_device.ra_dac_map_dev)) - { - LOG_E("dac1 register failed"); - return -RT_ERROR; - } -#endif - - return RT_EOK; -} -INIT_DEVICE_EXPORT(ra_dac_init); - -#endif diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_flash.c b/bsp/renesas/ra6m4-cpk/drivers/drv_flash.c deleted file mode 100644 index 4a4fc0fc6b..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_flash.c +++ /dev/null @@ -1,283 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-11-30 flybreak first version - */ - -#include -#include -#include - -#include "board.h" -#include "hal_data.h" -#include "drv_flash.h" - -#include - -#if defined(PKG_USING_FAL) - #include "fal.h" -#endif - -//#define DRV_DEBUG -#define LOG_TAG "drv.flash" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ -#include - -int _flash_init(void) -{ - fsp_err_t err = FSP_SUCCESS; - /* Open Flash_HP */ - err = R_FLASH_HP_Open(&g_flash_ctrl, &g_flash_cfg); - /* Handle Error */ - if (FSP_SUCCESS != err) - { - LOG_E("\r\n Flah_HP_Open API failed"); - } - /* Setup Default Block 0 as Startup Setup Block */ - err = R_FLASH_HP_StartUpAreaSelect(&g_flash_ctrl, FLASH_STARTUP_AREA_BLOCK0, true); - if (err != FSP_SUCCESS) - { - LOG_E("\r\n Flah_HP_StartUpAreaSelect API failed"); - } - return 0; -} - -/** - * Read data from flash. - * @note This operation's units is word. - * - * @param addr flash address - * @param buf buffer to store read data - * @param size read bytes size - * - * @return result - */ -int _flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size) -{ - size_t i; - - for (i = 0; i < size; i++, buf++, addr++) - { - *buf = *(rt_uint8_t *) addr; - } - - return size; -} - -/** - * Write data to flash. - * @note This operation's units is word. - * @note This operation must after erase. @see flash_erase. - * - * @param addr flash address - * @param buf the write data buffer - * @param size write bytes size - * - * @return result - */ -int _flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size) -{ - rt_err_t result = RT_EOK; - rt_base_t level; - fsp_err_t err = FSP_SUCCESS; - size_t written_size = 0; - - if (size % BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE) - { - LOG_E("Flash Write size must be an integer multiple of %d", BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE); - return -RT_EINVAL; - } - - while (written_size < size) - { - level = rt_hw_interrupt_disable(); - R_FLASH_HP_Reset(&g_flash_ctrl); - /* Write code flash data*/ - err = R_FLASH_HP_Write(&g_flash_ctrl, (uint32_t)(buf + written_size), addr + written_size, BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE); - rt_hw_interrupt_enable(level); - - /* Error Handle */ - if (FSP_SUCCESS != err) - { - LOG_E("Write API failed"); - return -RT_EIO; - } - - written_size += BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE; - } - - if (result != RT_EOK) - { - return result; - } - - return size; -} - -/** - * Erase data on flash. - * @note This operation is irreversible. - * @note This operation's units is different which on many chips. - * - * @param addr flash address - * @param size erase bytes size - * - * @return result - */ -int _flash_erase_8k(rt_uint32_t addr, size_t size) -{ - fsp_err_t err = FSP_SUCCESS; - rt_base_t level; - - if ((addr + size) > BSP_FEATURE_FLASH_HP_CF_REGION0_SIZE) - { - LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size)); - return -RT_EINVAL; - } - - if (size < 1) - { - return -RT_EINVAL; - } - - level = rt_hw_interrupt_disable(); - R_FLASH_HP_Reset(&g_flash_ctrl); - /* Erase Block */ - err = R_FLASH_HP_Erase(&g_flash_ctrl, RT_ALIGN_DOWN(addr, FLASH_HP_CF_BLOCK_SIZE_8KB), (size - 1) / BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE + 1); - rt_hw_interrupt_enable(level); - - if (err != FSP_SUCCESS) - { - LOG_E("Erase API failed"); - return -RT_EIO; - } - - LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size); - return size; -} - -int _flash_erase_32k(rt_uint32_t addr, size_t size) -{ - fsp_err_t err = FSP_SUCCESS; - rt_base_t level; - - if (size < 1) - { - return -RT_EINVAL; - } - - level = rt_hw_interrupt_disable(); - R_FLASH_HP_Reset(&g_flash_ctrl); - /* Erase Block */ - err = R_FLASH_HP_Erase(&g_flash_ctrl, RT_ALIGN_DOWN(addr, FLASH_HP_CF_BLOCK_SIZE_32KB), (size - 1) / BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE + 1); - rt_hw_interrupt_enable(level); - - if (err != FSP_SUCCESS) - { - LOG_E("Erase API failed"); - return -RT_EIO; - } - - LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size); - return size; -} - -#if defined(PKG_USING_FAL) - -static int fal_flash_read_8k(long offset, rt_uint8_t *buf, size_t size); -static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size); - -static int fal_flash_write_8k(long offset, const rt_uint8_t *buf, size_t size); -static int fal_flash_write_32k(long offset, const rt_uint8_t *buf, size_t size); - -static int fal_flash_erase_8k(long offset, size_t size); -static int fal_flash_erase_32k(long offset, size_t size); - -const struct fal_flash_dev _onchip_flash_8k = { "onchip_flash_8k", FLASH_HP_CF_BLCOK_0, FLASH_HP_CF_BLOCK_8, (8 * 1024), {_flash_init, fal_flash_read_8k, fal_flash_write_8k, fal_flash_erase_8k} }; -const struct fal_flash_dev _onchip_flash_32k = { "onchip_flash_32k", FLASH_HP_CF_BLOCK_8, 32 * 30 * 1024, (32 * 1024), {_flash_init, fal_flash_read_32k, fal_flash_write_32k, fal_flash_erase_32k} }; - -static int fal_flash_read_8k(long offset, rt_uint8_t *buf, size_t size) -{ - return _flash_read(_onchip_flash_8k.addr + offset, buf, size); -} - -static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size) -{ - return _flash_read(_onchip_flash_32k.addr + offset, buf, size); -} - -static int fal_flash_write_8k(long offset, const rt_uint8_t *buf, size_t size) -{ - return _flash_write(_onchip_flash_8k.addr + offset, buf, size); -} - -static int fal_flash_write_32k(long offset, const rt_uint8_t *buf, size_t size) -{ - return _flash_write(_onchip_flash_32k.addr + offset, buf, size); -} - -static int fal_flash_erase_8k(long offset, size_t size) -{ - return _flash_erase_8k(_onchip_flash_8k.addr + offset, size); -} - -static int fal_flash_erase_32k(long offset, size_t size) -{ - return _flash_erase_32k(_onchip_flash_32k.addr + offset, size); -} - -int flash_test(void) -{ -#define TEST_OFF (_onchip_flash_32k.len - BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE) - const struct fal_partition *param; - uint8_t write_buffer[BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE] = {0}; - uint8_t read_buffer[BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE] = {0}; - - /* Set write buffer, clear read buffer */ - for (uint8_t index = 0; index < BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE; index++) - { - write_buffer[index] = index; - read_buffer[index] = 0; - } - - fal_init(); - - param = fal_partition_find("param"); - if (param == RT_NULL) - { - LOG_E("not find partition param!"); - return -1; - } - LOG_I("Erase Start..."); - fal_partition_erase(param, TEST_OFF, BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE); - LOG_I("Erase succeeded!"); - LOG_I("Write Start..."); - fal_partition_write(param, TEST_OFF, write_buffer, sizeof(write_buffer)); - LOG_I("Write succeeded!"); - LOG_I("Read Start..."); - fal_partition_read(param, TEST_OFF, read_buffer, BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE); - LOG_I("Read succeeded!"); - - for (int i = 0; i < BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE; i++) - { - if (read_buffer[i] != write_buffer[i]) - { - LOG_E("Data verification failed!"); - return -1; - } - } - - LOG_I("Data verification succeeded!"); - return 0; -} -MSH_CMD_EXPORT(flash_test, "drv flash test."); - -#endif diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_flash.h b/bsp/renesas/ra6m4-cpk/drivers/drv_flash.h deleted file mode 100644 index 0940884834..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_flash.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-11-30 flybreak first version - */ - -#ifndef __DRV_FLASH_H__ -#define __DRV_FLASH_H__ - -#include -#include "rtdevice.h" -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/* Code Flash */ -#define FLASH_HP_CF_BLOCK_SIZE_32KB (32*1024) /* Block Size 32 KB */ -#define FLASH_HP_CF_BLOCK_SIZE_8KB (8*1024) /* Block Size 8KB */ - -#define FLASH_HP_CF_BLCOK_0 0x00000000U /* 8 KB: 0x00000000 - 0x00001FFF */ -#define FLASH_HP_CF_BLOCK_1 0x00002000U /* 8 KB: 0x00002000 - 0x00003FFF */ -#define FLASH_HP_CF_BLOCK_2 0x00004000U /* 8 KB: 0x00004000 - 0x00005FFF */ -#define FLASH_HP_CF_BLOCK_3 0x00006000U /* 8 KB: 0x00006000 - 0x00007FFF */ -#define FLASH_HP_CF_BLOCK_4 0x00008000U /* 8 KB: 0x00008000 - 0x00009FFF */ -#define FLASH_HP_CF_BLOCK_5 0x0000A000U /* 8 KB: 0x0000A000 - 0x0000BFFF */ -#define FLASH_HP_CF_BLOCK_6 0x0000C000U /* 8 KB: 0x0000C000 - 0x0000DFFF */ -#define FLASH_HP_CF_BLOCK_7 0x0000E000U /* 8 KB: 0x0000E000 - 0x0000FFFF */ -#define FLASH_HP_CF_BLOCK_8 0x00010000U /* 32 KB: 0x00010000 - 0x00017FFF */ -#define FLASH_HP_CF_BLOCK_9 0x00018000U /* 32 KB: 0x00018000 - 0x0001FFFF */ -#define FLASH_HP_CF_BLCOK_10 0x00020000U /* 32 KB: 0x00020000 - 0x0004FFFF */ - -#define FLASH_HP_DF_BLOCK_SIZE (64) -/* Data Flash */ -#if (defined (BOARD_RA6M4_EK) || defined (BOARD_RA6M5_EK) || defined (BOARD_RA4M3_EK)||defined(BOARD_RA4M2_EK)) - -#define FLASH_HP_DF_BLOCK_0 0x08000000U /* 64 B: 0x40100000 - 0x4010003F */ -#define FLASH_HP_DF_BLOCK_1 0x08000040U /* 64 B: 0x40100040 - 0x4010007F */ -#define FLASH_HP_DF_BLOCK_2 0x08000080U /* 64 B: 0x40100080 - 0x401000BF */ -#define FLASH_HP_DF_BLOCK_3 0x080000C0U /* 64 B: 0x401000C0 - 0x401000FF */ - -#else - -#define FLASH_HP_DF_BLOCK_0 0x40100000U /* 64 B: 0x40100000 - 0x4010003F */ -#define FLASH_HP_DF_BLOCK_1 0x40100040U /* 64 B: 0x40100040 - 0x4010007F */ -#define FLASH_HP_DF_BLOCK_2 0x40100080U /* 64 B: 0x40100080 - 0x401000BF */ -#define FLASH_HP_DF_BLOCK_3 0x401000C0U /* 64 B: 0x401000C0 - 0x401000FF */ - -#endif - -#define BLOCK_SIZE (128) -#define BLOCK_NUM (2) - -#ifdef __cplusplus -} -#endif - -#endif /* __DRV_FLASH_H__ */ diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_gpio.c b/bsp/renesas/ra6m4-cpk/drivers/drv_gpio.c deleted file mode 100644 index 228b76585a..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_gpio.c +++ /dev/null @@ -1,589 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#include - -#ifdef RT_USING_PIN - -#define DBG_TAG "drv.gpio" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ - -#ifdef R_ICU_H -static rt_base_t ra_pin_get_irqx(rt_uint32_t pin) -{ - switch (pin) - { - case BSP_IO_PORT_04_PIN_00: - case BSP_IO_PORT_02_PIN_06: - case BSP_IO_PORT_01_PIN_05: - return 0; - - case BSP_IO_PORT_02_PIN_05: - case BSP_IO_PORT_01_PIN_01: - case BSP_IO_PORT_01_PIN_04: - return 1; - - case BSP_IO_PORT_02_PIN_03: - case BSP_IO_PORT_01_PIN_00: - case BSP_IO_PORT_02_PIN_13: - return 2; - - case BSP_IO_PORT_02_PIN_02: - case BSP_IO_PORT_01_PIN_10: - case BSP_IO_PORT_02_PIN_12: - return 3; - - case BSP_IO_PORT_04_PIN_02: - case BSP_IO_PORT_01_PIN_11: - case BSP_IO_PORT_04_PIN_11: - return 4; - - case BSP_IO_PORT_04_PIN_01: - case BSP_IO_PORT_03_PIN_02: - case BSP_IO_PORT_04_PIN_10: - return 5; - - case BSP_IO_PORT_03_PIN_01: - case BSP_IO_PORT_00_PIN_00: - case BSP_IO_PORT_04_PIN_09: - return 6; - - case BSP_IO_PORT_00_PIN_01: - case BSP_IO_PORT_04_PIN_08: - return 7; - - case BSP_IO_PORT_00_PIN_02: - case BSP_IO_PORT_03_PIN_05: - case BSP_IO_PORT_04_PIN_15: - return 8; - - case BSP_IO_PORT_00_PIN_04: - case BSP_IO_PORT_03_PIN_04: - case BSP_IO_PORT_04_PIN_14: - return 9; - - case BSP_IO_PORT_00_PIN_05: - case BSP_IO_PORT_07_PIN_09: - return 10; - - case BSP_IO_PORT_05_PIN_01: - case BSP_IO_PORT_00_PIN_06: - case BSP_IO_PORT_07_PIN_08: - return 11; - - case BSP_IO_PORT_05_PIN_02: - case BSP_IO_PORT_00_PIN_08: - return 12; - - case BSP_IO_PORT_00_PIN_15: - case BSP_IO_PORT_00_PIN_09: - return 13; - - case BSP_IO_PORT_04_PIN_03: - case BSP_IO_PORT_05_PIN_12: - case BSP_IO_PORT_05_PIN_05: - return 14; - - case BSP_IO_PORT_04_PIN_04: - case BSP_IO_PORT_05_PIN_11: - case BSP_IO_PORT_05_PIN_06: - return 15; - - default : - return -1; - } -} - -static struct rt_pin_irq_hdr pin_irq_hdr_tab[] = -{ - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, -}; - -#define RA_IRQ_MAX 16 -struct ra_pin_irq_map pin_irq_map[RA_IRQ_MAX] = {0}; - -static void ra_pin_map_init(void) -{ -#ifdef VECTOR_NUMBER_ICU_IRQ0 - pin_irq_map[0].irq_ctrl = &g_external_irq0_ctrl; - pin_irq_map[0].irq_cfg = &g_external_irq0_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ1 - pin_irq_map[1].irq_ctrl = &g_external_irq1_ctrl; - pin_irq_map[1].irq_cfg = &g_external_irq1_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ2 - pin_irq_map[2].irq_ctrl = &g_external_irq2_ctrl; - pin_irq_map[2].irq_cfg = &g_external_irq2_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ3 - pin_irq_map[3].irq_ctrl = &g_external_irq3_ctrl; - pin_irq_map[3].irq_cfg = &g_external_irq3_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ4 - pin_irq_map[4].irq_ctrl = &g_external_irq4_ctrl; - pin_irq_map[4].irq_cfg = &g_external_irq4_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ5 - pin_irq_map[5].irq_ctrl = &g_external_irq5_ctrl; - pin_irq_map[5].irq_cfg = &g_external_irq5_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ6 - pin_irq_map[6].irq_ctrl = &g_external_irq6_ctrl; - pin_irq_map[6].irq_cfg = &g_external_irq6_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ7 - pin_irq_map[7].irq_ctrl = &g_external_irq7_ctrl; - pin_irq_map[7].irq_cfg = &g_external_irq7_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ8 - pin_irq_map[8].irq_ctrl = &g_external_irq8_ctrl; - pin_irq_map[8].irq_cfg = &g_external_irq8_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ9 - pin_irq_map[9].irq_ctrl = &g_external_irq9_ctrl; - pin_irq_map[9].irq_cfg = &g_external_irq9_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ10 - pin_irq_map[10].irq_ctrl = &g_external_irq10_ctrl; - pin_irq_map[10].irq_cfg = &g_external_irq10_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ11 - pin_irq_map[11].irq_ctrl = &g_external_irq11_ctrl; - pin_irq_map[11].irq_cfg = &g_external_irq11_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ12 - pin_irq_map[12].irq_ctrl = &g_external_irq12_ctrl; - pin_irq_map[12].irq_cfg = &g_external_irq12_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ13 - pin_irq_map[13].irq_ctrl = &g_external_irq13_ctrl; - pin_irq_map[13].irq_cfg = &g_external_irq13_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ14 - pin_irq_map[14].irq_ctrl = &g_external_irq14_ctrl; - pin_irq_map[14].irq_cfg = &g_external_irq14_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ15 - pin_irq_map[15].irq_ctrl = &g_external_irq15_ctrl; - pin_irq_map[15].irq_cfg = &g_external_irq15_cfg; -#endif -} -#endif /* R_ICU_H */ - -static void ra_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) -{ - fsp_err_t err; - /* Initialize the IOPORT module and configure the pins */ - err = R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg); - - if (err != FSP_SUCCESS) - { - LOG_E("GPIO open failed"); - return; - } - - switch (mode) - { - case PIN_MODE_OUTPUT: - err = R_IOPORT_PinCfg(&g_ioport_ctrl, pin, BSP_IO_DIRECTION_OUTPUT); - if (err != FSP_SUCCESS) - { - LOG_E("PIN_MODE_OUTPUT configuration failed"); - return; - } - break; - - case PIN_MODE_INPUT: - err = R_IOPORT_PinCfg(&g_ioport_ctrl, pin, BSP_IO_DIRECTION_INPUT); - if (err != FSP_SUCCESS) - { - LOG_E("PIN_MODE_INPUT configuration failed"); - return; - } - break; - - case PIN_MODE_OUTPUT_OD: - err = R_IOPORT_PinCfg(&g_ioport_ctrl, pin, IOPORT_CFG_NMOS_ENABLE); - if (err != FSP_SUCCESS) - { - LOG_E("PIN_MODE_OUTPUT_OD configuration failed"); - return; - } - break; - } -} - -static void ra_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) -{ - bsp_io_level_t level = BSP_IO_LEVEL_HIGH; - - if (value != level) - { - level = BSP_IO_LEVEL_LOW; - } - - R_BSP_PinAccessEnable(); - R_BSP_PinWrite(pin, level); - R_BSP_PinAccessDisable(); -} - -static int ra_pin_read(rt_device_t dev, rt_base_t pin) -{ - if ((pin > RA_MAX_PIN_VALUE) || (pin < RA_MIN_PIN_VALUE)) - { - LOG_E("GPIO pin value is illegal"); - return -RT_ERROR; - } - return R_BSP_PinRead(pin); -} - -static rt_err_t ra_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled) -{ -#ifdef R_ICU_H - rt_err_t err; - rt_int32_t irqx = ra_pin_get_irqx(pin); - if (PIN_IRQ_ENABLE == enabled) - { - if (0 <= irqx && irqx < sizeof(pin_irq_map) / sizeof(pin_irq_map[0])) - { - err = R_ICU_ExternalIrqOpen((external_irq_ctrl_t *const)pin_irq_map[irqx].irq_ctrl, - (external_irq_cfg_t const * const)pin_irq_map[irqx].irq_cfg); - /* Handle error */ - if (FSP_SUCCESS != err) - { - /* ICU Open failure message */ - LOG_E("\r\n**R_ICU_ExternalIrqOpen API FAILED**\r\n"); - return -RT_ERROR; - } - - err = R_ICU_ExternalIrqEnable((external_irq_ctrl_t *const)pin_irq_map[irqx].irq_ctrl); - /* Handle error */ - if (FSP_SUCCESS != err) - { - /* ICU Enable failure message */ - LOG_E("\r\n**R_ICU_ExternalIrqEnable API FAILED**\r\n"); - return -RT_ERROR; - } - } - } - else if (PIN_IRQ_DISABLE == enabled) - { - err = R_ICU_ExternalIrqDisable((external_irq_ctrl_t *const)pin_irq_map[irqx].irq_ctrl); - if (FSP_SUCCESS != err) - { - /* ICU Disable failure message */ - LOG_E("\r\n**R_ICU_ExternalIrqDisable API FAILED**\r\n"); - return -RT_ERROR; - } - err = R_ICU_ExternalIrqClose((external_irq_ctrl_t *const)pin_irq_map[irqx].irq_ctrl); - if (FSP_SUCCESS != err) - { - /* ICU Close failure message */ - LOG_E("\r\n**R_ICU_ExternalIrqClose API FAILED**\r\n"); - return -RT_ERROR; - } - } - return RT_EOK; -#else - return -RT_ERROR; -#endif -} - -static rt_err_t ra_pin_attach_irq(struct rt_device *device, rt_int32_t pin, - rt_uint32_t mode, void (*hdr)(void *args), void *args) -{ -#ifdef R_ICU_H - rt_int32_t irqx = ra_pin_get_irqx(pin); - if (0 <= irqx && irqx < (sizeof(pin_irq_map) / sizeof(pin_irq_map[0]))) - { - int level = rt_hw_interrupt_disable(); - if (pin_irq_hdr_tab[irqx].pin == irqx && - pin_irq_hdr_tab[irqx].hdr == hdr && - pin_irq_hdr_tab[irqx].mode == mode && - pin_irq_hdr_tab[irqx].args == args) - { - rt_hw_interrupt_enable(level); - return RT_EOK; - } - if (pin_irq_hdr_tab[irqx].pin != -1) - { - rt_hw_interrupt_enable(level); - return RT_EBUSY; - } - pin_irq_hdr_tab[irqx].pin = irqx; - pin_irq_hdr_tab[irqx].hdr = hdr; - pin_irq_hdr_tab[irqx].mode = mode; - pin_irq_hdr_tab[irqx].args = args; - rt_hw_interrupt_enable(level); - } - else return -RT_ERROR; - return RT_EOK; -#else - return -RT_ERROR; -#endif -} - -static rt_err_t ra_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) -{ -#ifdef R_ICU_H - rt_int32_t irqx = ra_pin_get_irqx(pin); - if (0 <= irqx && irqx < sizeof(pin_irq_map) / sizeof(pin_irq_map[0])) - { - int level = rt_hw_interrupt_disable(); - if (pin_irq_hdr_tab[irqx].pin == -1) - { - rt_hw_interrupt_enable(level); - return RT_EOK; - } - pin_irq_hdr_tab[irqx].pin = -1; - pin_irq_hdr_tab[irqx].hdr = RT_NULL; - pin_irq_hdr_tab[irqx].mode = 0; - pin_irq_hdr_tab[irqx].args = RT_NULL; - rt_hw_interrupt_enable(level); - } - else - { - return -RT_ERROR; - } - return RT_EOK; -#else - return -RT_ERROR; -#endif -} - -static rt_base_t ra_pin_get(const char *name) -{ - int pin_number = -1, port = -1, pin = -1; - if (rt_strlen(name) != 4) - return -1; - if ((name[0] == 'P') || (name[0] == 'p')) - { - if ('0' <= (int)name[1] && (int)name[1] <= '9') - { - port = ((int)name[1] - 48) * 16 * 16; - if ('0' <= (int)name[2] && (int)name[2] <= '9') - { - if ('0' <= (int)name[3] && (int)name[3] <= '9') - { - pin = ((int)name[2] - 48) * 10; - pin += (int)name[3] - 48; - pin_number = port + pin; - } - else return -1; - } - else return -1; - } - else return -1; - } - return pin_number; -} - -const static struct rt_pin_ops _ra_pin_ops = -{ - .pin_mode = ra_pin_mode, - .pin_write = ra_pin_write, - .pin_read = ra_pin_read, - .pin_attach_irq = ra_pin_attach_irq, - .pin_detach_irq = ra_pin_dettach_irq, - .pin_irq_enable = ra_pin_irq_enable, - .pin_get = ra_pin_get, -}; - -int rt_hw_pin_init(void) -{ -#ifdef R_ICU_H - ra_pin_map_init(); -#endif - return rt_device_pin_register("pin", &_ra_pin_ops, RT_NULL); -} - -#ifdef R_ICU_H -void irq0_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (0 == pin_irq_hdr_tab[0].pin) - { - pin_irq_hdr_tab[0].hdr(pin_irq_hdr_tab[0].args); - } - rt_interrupt_leave(); -}; - -void irq1_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (1 == pin_irq_hdr_tab[1].pin) - { - pin_irq_hdr_tab[1].hdr(pin_irq_hdr_tab[1].args); - } - rt_interrupt_leave(); -}; - -void irq2_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (2 == pin_irq_hdr_tab[2].pin) - { - pin_irq_hdr_tab[2].hdr(pin_irq_hdr_tab[2].args); - } - rt_interrupt_leave(); -}; - -void irq3_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (3 == pin_irq_hdr_tab[3].pin) - { - pin_irq_hdr_tab[3].hdr(pin_irq_hdr_tab[3].args); - } - rt_interrupt_leave(); -}; - -void irq4_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (4 == pin_irq_hdr_tab[4].pin) - { - pin_irq_hdr_tab[4].hdr(pin_irq_hdr_tab[4].args); - } - rt_interrupt_leave(); -}; - -void irq5_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (5 == pin_irq_hdr_tab[5].pin) - { - pin_irq_hdr_tab[5].hdr(pin_irq_hdr_tab[5].args); - } - rt_interrupt_leave(); -}; - -void irq6_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (6 == pin_irq_hdr_tab[6].pin) - { - pin_irq_hdr_tab[6].hdr(pin_irq_hdr_tab[6].args); - } - rt_interrupt_leave(); -}; - -void irq7_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (7 == pin_irq_hdr_tab[7].pin) - { - pin_irq_hdr_tab[7].hdr(pin_irq_hdr_tab[7].args); - } - rt_interrupt_leave(); -}; - -void irq8_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (8 == pin_irq_hdr_tab[8].pin) - { - pin_irq_hdr_tab[8].hdr(pin_irq_hdr_tab[8].args); - } - rt_interrupt_leave(); -}; - -void irq9_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (9 == pin_irq_hdr_tab[9].pin) - { - pin_irq_hdr_tab[9].hdr(pin_irq_hdr_tab[9].args); - } - rt_interrupt_leave(); -}; - -void irq10_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (10 == pin_irq_hdr_tab[10].pin) - { - pin_irq_hdr_tab[10].hdr(pin_irq_hdr_tab[10].args); - } - rt_interrupt_leave(); -}; - -void irq11_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (11 == pin_irq_hdr_tab[11].pin) - { - pin_irq_hdr_tab[11].hdr(pin_irq_hdr_tab[11].args); - } - rt_interrupt_leave(); -}; - -void irq12_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (12 == pin_irq_hdr_tab[12].pin) - { - pin_irq_hdr_tab[12].hdr(pin_irq_hdr_tab[12].args); - } - rt_interrupt_leave(); -}; - -void irq13_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (13 == pin_irq_hdr_tab[13].pin) - { - pin_irq_hdr_tab[13].hdr(pin_irq_hdr_tab[13].args); - } - rt_interrupt_leave(); -}; - -void irq14_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (14 == pin_irq_hdr_tab[14].pin) - { - pin_irq_hdr_tab[14].hdr(pin_irq_hdr_tab[14].args); - } - rt_interrupt_leave(); -}; - -void irq15_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (15 == pin_irq_hdr_tab[15].pin) - { - pin_irq_hdr_tab[15].hdr(pin_irq_hdr_tab[15].args); - } - rt_interrupt_leave(); -}; -#endif /* R_ICU_H */ - -#endif /* RT_USING_PIN */ diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_gpio.h b/bsp/renesas/ra6m4-cpk/drivers/drv_gpio.h deleted file mode 100644 index c72c636548..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_gpio.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#ifndef __DRV_GPIO_H__ -#define __DRV_GPIO_H__ - -#include -#include -#include -#include -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define RA_MIN_PIN_VALUE BSP_IO_PORT_00_PIN_00 -#define RA_MAX_PIN_VALUE BSP_IO_PORT_11_PIN_15 - -#ifdef R_ICU_H -struct ra_pin_irq_map -{ - const icu_instance_ctrl_t *irq_ctrl; - const external_irq_cfg_t *irq_cfg; -}; -#endif - -int rt_hw_pin_init(void); -#ifdef __cplusplus -} -#endif - -#endif /* __DRV_GPIO_H__ */ diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_pwm.c b/bsp/renesas/ra6m4-cpk/drivers/drv_pwm.c deleted file mode 100644 index 9b6369d9b3..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_pwm.c +++ /dev/null @@ -1,220 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-25 KevinXu first version - */ - -#include "drv_pwm.h" - -#ifdef RT_USING_PWM - -/* Declare the control function first */ -static rt_err_t drv_pwm_control(struct rt_device_pwm *, int, void *); -static struct rt_pwm_ops drv_ops = -{ - drv_pwm_control -}; - -static struct ra_pwm ra6m4_pwm_obj[BSP_PWMS_NUM] = -{ -#ifdef BSP_USING_PWM0 - [BSP_PWM0_INDEX] = PWM_DRV_INITIALIZER(0), -#endif -#ifdef BSP_USING_PWM1 - [BSP_PWM1_INDEX] = PWM_DRV_INITIALIZER(1), -#endif -#ifdef BSP_USING_PWM2 - [BSP_PWM2_INDEX] = PWM_DRV_INITIALIZER(2), -#endif -#ifdef BSP_USING_PWM3 - [BSP_PWM3_INDEX] = PWM_DRV_INITIALIZER(3), -#endif -#ifdef BSP_USING_PWM4 - [BSP_PWM4_INDEX] = PWM_DRV_INITIALIZER(4), -#endif -#ifdef BSP_USING_PWM5 - [BSP_PWM5_INDEX] = PWM_DRV_INITIALIZER(5), -#endif -#ifdef BSP_USING_PWM6 - [BSP_PWM6_INDEX] = PWM_DRV_INITIALIZER(6), -#endif -#ifdef BSP_USING_PWM7 - [BSP_PWM7_INDEX] = PWM_DRV_INITIALIZER(7), -#endif -#ifdef BSP_USING_PWM8 - [BSP_PWM8_INDEX] = PWM_DRV_INITIALIZER(8), -#endif -#ifdef BSP_USING_PWM9 - [BSP_PWM9_INDEX] = PWM_DRV_INITIALIZER(9), -#endif -}; - - -/* Convert the raw PWM period counts into ns */ -static rt_uint32_t _convert_counts_ns(uint32_t source_div, uint32_t raw) -{ - uint32_t pclkd_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_PCLKD) >> source_div; - uint32_t ns = (uint32_t)(((uint64_t)raw * 1000000000ULL) / pclkd_freq_hz); - return ns; -} - -/* Convert ns into raw PWM period counts */ -static rt_uint32_t _convert_ns_counts(uint32_t source_div, uint32_t raw) -{ - uint32_t pclkd_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_PCLKD) >> source_div; - uint32_t counts = (uint32_t)(((uint64_t)raw * (uint64_t)pclkd_freq_hz) / 1000000000ULL); - return counts; -} - - -/* PWM_CMD_ENABLE or PWM_CMD_DISABLE */ -static rt_err_t drv_pwm_enable(struct ra_pwm *device, - struct rt_pwm_configuration *configuration, - rt_bool_t enable) -{ - fsp_err_t err = FSP_SUCCESS; - - if (enable) - { - err = R_GPT_Start(device->g_ctrl); - } - else - { - err = R_GPT_Stop(device->g_ctrl); - } - - return (err == FSP_SUCCESS) ? RT_EOK : -RT_ERROR; -} - -/* PWM_CMD_GET */ -static rt_err_t drv_pwm_get(struct ra_pwm *device, - struct rt_pwm_configuration *configuration) -{ - timer_info_t info; - if (R_GPT_InfoGet(device->g_ctrl, &info) != FSP_SUCCESS) - return -RT_ERROR; - - configuration->pulse = - _convert_counts_ns(device->g_cfg->source_div, device->g_cfg->duty_cycle_counts); - configuration->period = - _convert_counts_ns(device->g_cfg->source_div, info.period_counts); - configuration->channel = device->g_cfg->channel; - - return RT_EOK; -} - -/* PWM_CMD_SET */ -static rt_err_t drv_pwm_set(struct ra_pwm *device, - struct rt_pwm_configuration *conf) -{ - uint32_t counts; - fsp_err_t fsp_erra; - fsp_err_t fsp_errb; - rt_err_t rt_err; - uint32_t pulse; - uint32_t period; - struct rt_pwm_configuration orig_conf; - - rt_err = drv_pwm_get(device, &orig_conf); - if (rt_err != RT_EOK) - { - return rt_err; - } - - /* Pulse cannot last longer than period. */ - period = conf->period; - pulse = (period >= conf->pulse) ? conf->pulse : period; - - /* Not to set period again if it's not changed. */ - if (period != orig_conf.period) - { - counts = _convert_ns_counts(device->g_cfg->source_div, period); - fsp_erra = R_GPT_PeriodSet(device->g_ctrl, counts); - if (fsp_erra != FSP_SUCCESS) - { - return -RT_ERROR; - } - } - - /* Two pins of a channel will not be separated. */ - counts = _convert_ns_counts(device->g_cfg->source_div, pulse); - fsp_erra = R_GPT_DutyCycleSet(device->g_ctrl, counts, GPT_IO_PIN_GTIOCA); - fsp_errb = R_GPT_DutyCycleSet(device->g_ctrl, counts, GPT_IO_PIN_GTIOCB); - if (fsp_erra != FSP_SUCCESS || fsp_errb != FSP_SUCCESS) - { - return -RT_ERROR; - } - - return RT_EOK; -} - -/** - * Implement of control method in struct rt_pwm_ops. - */ -static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg) -{ - struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg; - struct ra_pwm *pwm_device = (struct ra_pwm *)device->parent.user_data; - - /** - * There's actually only one GPT timer with 10 channels. In this case, the - * timer is separated into 10 PWM devices, so each device has only one - * channel. - */ - if (configuration->channel != 0) - { - return -RT_EINVAL; - } - - switch (cmd) - { - case PWM_CMD_ENABLE: - return drv_pwm_enable(pwm_device, configuration, RT_TRUE); - case PWM_CMD_DISABLE: - return drv_pwm_enable(pwm_device, configuration, RT_FALSE); - case PWM_CMD_GET: - return drv_pwm_get(pwm_device, configuration); - case PWM_CMD_SET: - return drv_pwm_set(pwm_device, configuration); - default: - return -RT_EINVAL; - } - - return RT_EOK; -} - -/** - * This is to register the PWM device - * - * Note that the PWM driver only supports one fixed pin. - */ -int rt_hw_pwm_init(void) -{ - rt_err_t ret = RT_EOK; - rt_err_t rt_err = RT_EOK; - fsp_err_t fsp_err = FSP_SUCCESS; - - for (int i = 0; i < BSP_PWMS_NUM; i++) - { - fsp_err = R_GPT_Open(ra6m4_pwm_obj[i].g_ctrl, - ra6m4_pwm_obj[i].g_cfg); - - rt_err = rt_device_pwm_register(&ra6m4_pwm_obj[i].pwm_device, - ra6m4_pwm_obj[i].name, - &drv_ops, - &ra6m4_pwm_obj[i]); - - if (fsp_err != FSP_SUCCESS || rt_err != RT_EOK) - { - ret = -RT_ERROR; - } - } - - return ret; -} -INIT_BOARD_EXPORT(rt_hw_pwm_init); -#endif /* RT_USING_PWM */ diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_pwm.h b/bsp/renesas/ra6m4-cpk/drivers/drv_pwm.h deleted file mode 100644 index 0bf39b8699..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_pwm.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-25 KevinXu first version - */ - -#ifndef __DRV_PWM_H__ -#define __DRV_PWM_H__ - -#include -#include -#include -#include -#include -#include - -/* PWM device object structure */ -struct ra_pwm -{ - struct rt_device_pwm pwm_device; - gpt_instance_ctrl_t *g_ctrl; - timer_instance_t const *const g_timer; - timer_cfg_t const *const g_cfg; - char *name; -}; - -/* Get ra6m4 pwm device object from the general pwm device object */ -#define _GET_RA6M4_PWM_OBJ(ptr) rt_container_of(ptr, struct ra_pwm, pwm_device) - -#endif /* __DRV_PWM_H__ */ diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_rtc.c b/bsp/renesas/ra6m4-cpk/drivers/drv_rtc.c deleted file mode 100644 index 379213fd93..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_rtc.c +++ /dev/null @@ -1,226 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-14 Mr.Tiger first version - */ - -#include -#include -#include "board.h" -#include -#include "hal_data.h" - -#ifdef BSP_USING_ONCHIP_RTC - -#define DBG_TAG "drv.rtc" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ -#include - -static rt_err_t ra_rtc_init(void) -{ - rt_err_t result = RT_EOK; - - if (R_RTC_Open(&g_rtc_ctrl, &g_rtc_cfg) != RT_EOK) - { - LOG_E("rtc init failed."); - result = -RT_ERROR; - } - - return result; -} - -static time_t get_rtc_timestamp(void) -{ - struct tm tm_new = {0}; - rtc_time_t g_current_time = {0}; - - R_RTC_CalendarTimeGet(&g_rtc_ctrl, &g_current_time); - - tm_new.tm_year = g_current_time.tm_year; - tm_new.tm_mon = g_current_time.tm_mon; - tm_new.tm_mday = g_current_time.tm_mday; - - tm_new.tm_hour = g_current_time.tm_hour; - tm_new.tm_min = g_current_time.tm_min; - tm_new.tm_sec = g_current_time.tm_sec; - - tm_new.tm_wday = g_current_time.tm_wday; - tm_new.tm_yday = g_current_time.tm_yday; - tm_new.tm_isdst = g_current_time.tm_isdst; - - return timegm(&tm_new); -} - -static rt_err_t ra_get_secs(void *args) -{ - *(rt_uint32_t *)args = get_rtc_timestamp(); - LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args); - - return RT_EOK; -} - -static rt_err_t set_rtc_time_stamp(time_t time_stamp) -{ - struct tm *p_tm; - rtc_time_t g_current_time = {0}; - p_tm = gmtime(&time_stamp); - if (p_tm->tm_year < 100) - { - return -RT_ERROR; - } - - g_current_time.tm_sec = p_tm->tm_sec ; - g_current_time.tm_min = p_tm->tm_min ; - g_current_time.tm_hour = p_tm->tm_hour; - - g_current_time.tm_mday = p_tm->tm_mday; - g_current_time.tm_mon = p_tm->tm_mon; - g_current_time.tm_year = p_tm->tm_year; - - g_current_time.tm_wday = p_tm->tm_wday; - g_current_time.tm_yday = p_tm->tm_yday; - - if (R_RTC_CalendarTimeSet(&g_rtc_ctrl, &g_current_time) != FSP_SUCCESS) - { - LOG_E("set rtc time failed."); - return -RT_ERROR; - } - - return RT_EOK; -} - -static rt_err_t ra_set_secs(void *args) -{ - - rt_err_t result = RT_EOK; - - if (set_rtc_time_stamp(*(rt_uint32_t *)args)) - { - result = -RT_ERROR; - } - LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args); - - return result; -} - -#ifdef RT_USING_ALARM -static rt_err_t ra_get_alarm(void *arg) -{ - rt_err_t result = RT_EOK; - struct rt_rtc_wkalarm *wkalarm = (struct rt_rtc_wkalarm *)arg; - rtc_alarm_time_t alarm_time_get = - { - .sec_match = RT_FALSE, - .min_match = RT_FALSE, - .hour_match = RT_FALSE, - .mday_match = RT_FALSE, - .mon_match = RT_FALSE, - .year_match = RT_FALSE, - .dayofweek_match = RT_FALSE, - }; - - if (RT_EOK == R_RTC_CalendarAlarmGet(&g_rtc_ctrl, &alarm_time_get)) - { - wkalarm->tm_hour = alarm_time_get.time.tm_hour; - wkalarm->tm_min = alarm_time_get.time.tm_min; - wkalarm->tm_sec = alarm_time_get.time.tm_sec; - } - else - { - LOG_E("Calendar alarm Get failed."); - } - - return result; -} - -static rt_err_t ra_set_alarm(void *arg) -{ - rt_err_t result = RT_EOK; - struct rt_rtc_wkalarm *wkalarm = (struct rt_rtc_wkalarm *)arg; - rtc_alarm_time_t alarm_time_set = - { - .sec_match = RT_TRUE, - .min_match = RT_TRUE, - .hour_match = RT_TRUE, - .mday_match = RT_FALSE, - .mon_match = RT_FALSE, - .year_match = RT_FALSE, - .dayofweek_match = RT_FALSE, - }; - - alarm_time_set.time.tm_hour = wkalarm->tm_hour; - alarm_time_set.time.tm_min = wkalarm->tm_min; - alarm_time_set.time.tm_sec = wkalarm->tm_sec; - if (1 == wkalarm->enable) - { - if (RT_EOK != R_RTC_CalendarAlarmSet(&g_rtc_ctrl, &alarm_time_set)) - { - LOG_E("Calendar alarm Set failed."); - result = -RT_ERROR; - } - } - else - { - alarm_time_set.sec_match = RT_FALSE; - alarm_time_set.min_match = RT_FALSE; - alarm_time_set.hour_match = RT_FALSE; - if (RT_EOK != R_RTC_CalendarAlarmSet(&g_rtc_ctrl, &alarm_time_set)) - { - LOG_E("Calendar alarm Stop failed."); - result = -RT_ERROR; - } - } - return result; -} -#endif /* RT_USING_ALARM */ - -void rtc_callback(rtc_callback_args_t *p_args) -{ -#ifdef RT_USING_ALARM - static rt_device_t ra_device; - if (RTC_EVENT_ALARM_IRQ == p_args->event) - { - rt_alarm_update(ra_device, 1); - } -#endif -} - -static const struct rt_rtc_ops ra_rtc_ops = -{ - .init = ra_rtc_init, - .get_secs = ra_get_secs, - .set_secs = ra_set_secs, -#ifdef RT_USING_ALARM - .set_alarm = ra_set_alarm, - .get_alarm = ra_get_alarm, -#endif -}; - -static rt_rtc_dev_t ra_rtc_dev; - -static int rt_hw_rtc_init(void) -{ - rt_err_t result; - - ra_rtc_dev.ops = &ra_rtc_ops; - - result = rt_hw_rtc_register(&ra_rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR, RT_NULL); - if (result != RT_EOK) - { - LOG_E("rtc register err code: %d", result); - return result; - } - LOG_D("rtc init success"); - - return RT_EOK; -} -INIT_DEVICE_EXPORT(rt_hw_rtc_init); -#endif diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_soft_i2c.c b/bsp/renesas/ra6m4-cpk/drivers/drv_soft_i2c.c deleted file mode 100644 index 2bd18241fa..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_soft_i2c.c +++ /dev/null @@ -1,218 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#include "board.h" -#include "drv_soft_i2c.h" -#include "drv_config.h" - -#ifdef RT_USING_I2C - -#define DBG_TAG "drv.i2c" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ - -#if !defined(BSP_USING_I2C0) && !defined(BSP_USING_I2C1) - #error "Please define at least one BSP_USING_I2Cx" - /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */ -#endif - -static const struct ra_soft_i2c_config soft_i2c_config[] = -{ -#ifdef BSP_USING_I2C0 - I2C0_BUS_CONFIG, -#endif -#ifdef BSP_USING_I2C1 - I2C1_BUS_CONFIG, -#endif -}; - -static struct ra_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])]; - -/** - * This function initializes the i2c pin. - * - * @param ra i2c dirver class. - */ -static void ra_i2c_gpio_init(struct ra_i2c *i2c) -{ - struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)i2c->ops.data; - - rt_pin_mode(cfg->scl, PIN_MODE_OUTPUT_OD); - rt_pin_mode(cfg->sda, PIN_MODE_OUTPUT_OD); - - rt_pin_write(cfg->scl, PIN_HIGH); - rt_pin_write(cfg->sda, PIN_HIGH); -} - -/** - * This function sets the sda pin. - * - * @param ra config class. - * @param The sda pin state. - */ -static void ra_set_sda(void *data, rt_int32_t state) -{ - struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)data; - if (state) - { - rt_pin_write(cfg->sda, PIN_HIGH); - } - else - { - rt_pin_write(cfg->sda, PIN_LOW); - } -} - -/** - * This function sets the scl pin. - * - * @param ra config class. - * @param The scl pin state. - */ -static void ra_set_scl(void *data, rt_int32_t state) -{ - struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)data; - if (state) - { - rt_pin_write(cfg->scl, PIN_HIGH); - } - else - { - rt_pin_write(cfg->scl, PIN_LOW); - } -} - -/** - * This function gets the sda pin state. - * - * @param The sda pin state. - */ -static rt_int32_t ra_get_sda(void *data) -{ - struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)data; - return rt_pin_read(cfg->sda); -} - -/** - * This function gets the scl pin state. - * - * @param The scl pin state. - */ -static rt_int32_t ra_get_scl(void *data) -{ - struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)data; - return rt_pin_read(cfg->scl); -} -/** - * The time delay function. - * - * @param microseconds. - */ -static void ra_udelay(rt_uint32_t us) -{ - rt_uint32_t ticks; - rt_uint32_t told, tnow, tcnt = 0; - rt_uint32_t reload = SysTick->LOAD; - - ticks = us * reload / (1000000 / RT_TICK_PER_SECOND); - told = SysTick->VAL; - while (1) - { - tnow = SysTick->VAL; - if (tnow != told) - { - if (tnow < told) - { - tcnt += told - tnow; - } - else - { - tcnt += reload - tnow + told; - } - told = tnow; - if (tcnt >= ticks) - { - break; - } - } - } -} - -static const struct rt_i2c_bit_ops ra_bit_ops_default = -{ - .data = RT_NULL, - .set_sda = ra_set_sda, - .set_scl = ra_set_scl, - .get_sda = ra_get_sda, - .get_scl = ra_get_scl, - .udelay = ra_udelay, - .delay_us = 1, - .timeout = 100 -}; - -/** - * if i2c is locked, this function will unlock it - * - * @param ra config class - * - * @return RT_EOK indicates successful unlock. - */ -static rt_err_t ra_i2c_bus_unlock(const struct ra_soft_i2c_config *cfg) -{ - rt_int32_t i = 0; - - if (PIN_LOW == rt_pin_read(cfg->sda)) - { - while (i++ < 9) - { - rt_pin_write(cfg->scl, PIN_HIGH); - ra_udelay(100); - rt_pin_write(cfg->scl, PIN_LOW); - ra_udelay(100); - } - } - if (PIN_LOW == rt_pin_read(cfg->sda)) - { - return -RT_ERROR; - } - - return RT_EOK; -} - -/* I2C initialization function */ -int rt_hw_i2c_init(void) -{ - rt_size_t obj_num = sizeof(i2c_obj) / sizeof(struct ra_i2c); - rt_err_t result; - - for (int i = 0; i < obj_num; i++) - { - i2c_obj[i].ops = ra_bit_ops_default; - i2c_obj[i].ops.data = (void *)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; - ra_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); - RT_ASSERT(result == RT_EOK); - ra_i2c_bus_unlock(&soft_i2c_config[i]); - - LOG_D("software simulation %s init done, pin scl: %d, pin sda %d", - soft_i2c_config[i].bus_name, - soft_i2c_config[i].scl, - soft_i2c_config[i].sda); - } - - return RT_EOK; -} -INIT_BOARD_EXPORT(rt_hw_i2c_init); - -#endif /* RT_USING_I2C */ diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_soft_i2c.h b/bsp/renesas/ra6m4-cpk/drivers/drv_soft_i2c.h deleted file mode 100644 index 098810b433..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_soft_i2c.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#ifndef __DRV_I2C__ -#define __DRV_I2C__ - -#include -#include -#include -#include - -/* ra config class */ -struct ra_soft_i2c_config -{ - rt_uint32_t scl; - rt_uint32_t sda; - const char *bus_name; -}; -/* ra i2c dirver class */ -struct ra_i2c -{ - struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; -}; - -#ifdef BSP_USING_I2C1 -#define I2C1_BUS_CONFIG \ - { \ - .scl = BSP_I2C1_SCL_PIN, \ - .sda = BSP_I2C1_SDA_PIN, \ - .bus_name = "i2c1", \ - } -#endif - -#ifdef BSP_USING_I2C2 -#define I2C2_BUS_CONFIG \ - { \ - .scl = BSP_I2C2_SCL_PIN, \ - .sda = BSP_I2C2_SDA_PIN, \ - .bus_name = "i2c2", \ - } -#endif - -int rt_hw_i2c_init(void); - -#endif diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_spi.c b/bsp/renesas/ra6m4-cpk/drivers/drv_spi.c deleted file mode 100644 index c57b7048f6..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_spi.c +++ /dev/null @@ -1,290 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-23 Mr.Tiger first version - * 2021-11-04 Sherman ADD complete_event - */ -/**< Note : Turn on any DMA mode and all SPIs will turn on DMA */ - -#include "drv_spi.h" - -#ifdef RT_USING_SPI - -//#define DRV_DEBUG -#define DBG_TAG "drv.spi" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ -#include - -#define RA_SPI0_EVENT 0x00 -#define RA_SPI1_EVENT 0x01 -static struct rt_event complete_event = {0}; - -static struct ra_spi_handle spi_handle[] = -{ -#ifdef BSP_USING_SPI0 - {.bus_name = "spi0", .spi_ctrl_t = &g_spi0_ctrl, .spi_cfg_t = &g_spi0_cfg,}, -#endif - -#ifdef BSP_USING_SPI1 - {.bus_name = "spi1", .spi_ctrl_t = &g_spi1_ctrl, .spi_cfg_t = &g_spi1_cfg,}, -#endif -}; - -static struct ra_spi spi_config[sizeof(spi_handle) / sizeof(spi_handle[0])] = {0}; - -void g_spi0_callback(spi_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (SPI_EVENT_TRANSFER_COMPLETE == p_args->event) - { - rt_event_send(&complete_event, RA_SPI0_EVENT); - } - rt_interrupt_leave(); -} - -void g_spi1_callback(spi_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (SPI_EVENT_TRANSFER_COMPLETE == p_args->event) - { - rt_event_send(&complete_event, RA_SPI1_EVENT); - } - rt_interrupt_leave(); -} - -static rt_err_t ra_wait_complete(rt_event_t event, const char bus_name[RT_NAME_MAX]) -{ - rt_uint32_t recved = 0x00; - - if (bus_name[3] == '0') - { - return rt_event_recv(event, - RA_SPI0_EVENT, - RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, - RT_WAITING_FOREVER, - &recved); - } - else if (bus_name[3] == '1') - { - return rt_event_recv(event, - RA_SPI1_EVENT, - RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, - RT_WAITING_FOREVER, - &recved); - } - return -RT_EINVAL; -} - -static spi_bit_width_t ra_width_shift(rt_uint8_t data_width) -{ - spi_bit_width_t bit_width = SPI_BIT_WIDTH_8_BITS; - if(data_width == 1) - bit_width = SPI_BIT_WIDTH_8_BITS; - else if(data_width == 2) - bit_width = SPI_BIT_WIDTH_16_BITS; - else if(data_width == 4) - bit_width = SPI_BIT_WIDTH_32_BITS; - - return bit_width; -} - -static rt_err_t ra_write_message(struct rt_spi_device *device, const void *send_buf, const rt_size_t len) -{ - RT_ASSERT(device != NULL); - RT_ASSERT(device->parent.user_data != NULL); - RT_ASSERT(send_buf != NULL); - RT_ASSERT(len > 0); - rt_err_t err = RT_EOK; - struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); - - spi_bit_width_t bit_width = ra_width_shift(spi_dev->rt_spi_cfg_t->data_width); - /**< send msessage */ - err = R_SPI_Write((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, send_buf, len, bit_width); - if (RT_EOK != err) - { - LOG_E("%s write failed.", spi_dev->ra_spi_handle_t->bus_name); - return -RT_ERROR; - } - /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */ - ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name); - return len; -} - -static rt_err_t ra_read_message(struct rt_spi_device *device, void *recv_buf, const rt_size_t len) -{ - RT_ASSERT(device != NULL); - RT_ASSERT(device->parent.user_data != NULL); - RT_ASSERT(recv_buf != NULL); - RT_ASSERT(len > 0); - rt_err_t err = RT_EOK; - struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); - - spi_bit_width_t bit_width = ra_width_shift(spi_dev->rt_spi_cfg_t->data_width); - /**< receive message */ - err = R_SPI_Read((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, recv_buf, len, bit_width); - if (RT_EOK != err) - { - LOG_E("\n%s write failed.\n", spi_dev->ra_spi_handle_t->bus_name); - return -RT_ERROR; - } - /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */ - ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name); - return len; -} - -static rt_err_t ra_write_read_message(struct rt_spi_device *device, struct rt_spi_message *message) -{ - RT_ASSERT(device != NULL); - RT_ASSERT(message != NULL); - RT_ASSERT(message->length > 0); - rt_err_t err = RT_EOK; - struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); - - spi_bit_width_t bit_width = ra_width_shift(spi_dev->rt_spi_cfg_t->data_width); - /**< write and receive message */ - err = R_SPI_WriteRead((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, message->send_buf, message->recv_buf, message->length, bit_width); - if (RT_EOK != err) - { - LOG_E("%s write and read failed.", spi_dev->ra_spi_handle_t->bus_name); - return -RT_ERROR; - } - /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */ - ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name); - return message->length; -} - -/**< init spi TODO : MSB does not support modification */ -static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device, - struct rt_spi_configuration *configuration) -{ - RT_ASSERT(device != NULL); - RT_ASSERT(configuration != NULL); - rt_err_t err = RT_EOK; - - struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); - spi_dev->cs_pin = (rt_uint32_t)device->parent.user_data; - - /**< data_width : 1 -> 8 bits , 2 -> 16 bits, 4 -> 32 bits, default 32 bits*/ - rt_uint8_t data_width = configuration->data_width / 8; - RT_ASSERT(data_width == 1 || data_width == 2 || data_width == 4); - configuration->data_width = configuration->data_width / 8; - spi_dev->rt_spi_cfg_t = configuration; - - spi_extended_cfg_t *spi_cfg = (spi_extended_cfg_t *)spi_dev->ra_spi_handle_t->spi_cfg_t->p_extend; - - /**< Configure Select Line */ - rt_pin_write(spi_dev->cs_pin, PIN_HIGH); - - /**< config bitrate */ - R_SPI_CalculateBitrate(spi_dev->rt_spi_cfg_t->max_hz, &spi_cfg->spck_div); - - /**< init */ - err = R_SPI_Open((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, (spi_cfg_t const * const)spi_dev->ra_spi_handle_t->spi_cfg_t); - /* handle error */ - if (RT_EOK != err) - { - LOG_E("%s init failed.", spi_dev->ra_spi_handle_t->bus_name); - return -RT_ERROR; - } - return RT_EOK; -} - -static rt_uint32_t ra_spixfer(struct rt_spi_device *device, struct rt_spi_message *message) -{ - RT_ASSERT(device != RT_NULL); - RT_ASSERT(device->bus != RT_NULL); - RT_ASSERT(message != RT_NULL); - - rt_err_t err = RT_EOK; - struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); - spi_dev->cs_pin = (rt_uint32_t)device->parent.user_data; - - if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS)) - { - if (device->config.mode & RT_SPI_CS_HIGH) - rt_pin_write(spi_dev->cs_pin, PIN_HIGH); - else - rt_pin_write(spi_dev->cs_pin, PIN_LOW); - } - - if (message->length > 0) - { - if (message->send_buf == RT_NULL && message->recv_buf != RT_NULL) - { - /**< receive message */ - err = ra_read_message(device, (void *)message->recv_buf, (const rt_size_t)message->length); - } - else if (message->send_buf != RT_NULL && message->recv_buf == RT_NULL) - { - /**< send message */ - err = ra_write_message(device, (const void *)message->send_buf, (const rt_size_t)message->length); - } - else if (message->send_buf != RT_NULL && message->recv_buf != RT_NULL) - { - /**< send and receive message */ - err = ra_write_read_message(device, message); - } - } - - if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS)) - { - if (device->config.mode & RT_SPI_CS_HIGH) - rt_pin_write(spi_dev->cs_pin, PIN_LOW); - else - rt_pin_write(spi_dev->cs_pin, PIN_HIGH); - } - return err; -} - -static const struct rt_spi_ops ra_spi_ops = -{ - .configure = ra_hw_spi_configure, - .xfer = ra_spixfer, -}; - -void rt_hw_spi_device_attach(struct rt_spi_device *device, const char *device_name, const char *bus_name, void *user_data) -{ - RT_ASSERT(device != NULL); - RT_ASSERT(device_name != NULL); - RT_ASSERT(bus_name != NULL); - RT_ASSERT(user_data != NULL); - - rt_err_t err = rt_spi_bus_attach_device(device, device_name, bus_name, user_data); - if (RT_EOK != err) - { - LOG_E("%s attach failed.", bus_name); - } -} - -int ra_hw_spi_init(void) -{ - for (rt_uint8_t spi_index = 0; spi_index < sizeof(spi_handle) / sizeof(spi_handle[0]); spi_index++) - { - spi_config[spi_index].ra_spi_handle_t = &spi_handle[spi_index]; - - /**< register spi bus */ - rt_err_t err = rt_spi_bus_register(&spi_config[spi_index].bus, spi_handle[spi_index].bus_name, &ra_spi_ops); - if (RT_EOK != err) - { - LOG_E("%s bus register failed.", spi_config[spi_index].ra_spi_handle_t->bus_name); - return -RT_ERROR; - } - } - - if (RT_EOK != rt_event_init(&complete_event, "ra_spi", RT_IPC_FLAG_PRIO)) - { - LOG_E("SPI transfer event init fail!"); - return -RT_ERROR; - } - return RT_EOK; -} -INIT_BOARD_EXPORT(ra_hw_spi_init); -#endif /* RT_USING_SPI */ diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_spi.h b/bsp/renesas/ra6m4-cpk/drivers/drv_spi.h deleted file mode 100644 index cb52433fc5..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_spi.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-23 Mr.Tiger first version - */ - -#ifndef __DRV_SPI_H__ -#define __DRV_SPI_H__ - -#include -#include -#include "hal_data.h" -#include "board.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef R_SPI_H -struct ra_spi_handle -{ - const char bus_name[RT_NAME_MAX]; - const spi_cfg_t *spi_cfg_t; - const spi_instance_ctrl_t *spi_ctrl_t; -}; - -struct ra_spi -{ - rt_uint32_t cs_pin; - struct ra_spi_handle *ra_spi_handle_t; - struct rt_spi_configuration *rt_spi_cfg_t; - struct rt_spi_bus bus; -}; -#endif - -void rt_hw_spi_device_attach(struct rt_spi_device *device, const char *device_name, const char *bus_name, void *user_data); - -#ifdef __cplusplus -} -#endif - -/* stm32 spi dirver class */ - -#endif /*__DRV_SPI_H__ */ diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_usart_v2.c b/bsp/renesas/ra6m4-cpk/drivers/drv_usart_v2.c deleted file mode 100644 index 080d89d022..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_usart_v2.c +++ /dev/null @@ -1,199 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#include - -#ifdef RT_USING_SERIAL_V2 - -//#define DRV_DEBUG -#define DBG_TAG "drv.usart" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ -#include - -static struct ra_uart_config uart_config[] = -{ -#ifdef BSP_USING_UART7 - UART7_CONFIG, -#endif - -#ifdef BSP_USING_UART1 - UART1_CONFIG, -#endif -}; - -enum -{ -#ifdef BSP_USING_UART7 - UART7_INDEX, -#endif - -#ifdef BSP_USING_UART1 - UART1_INDEX, -#endif -}; - -static struct ra_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0}; - -static void ra_uart_get_config(void) -{ - struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; - -#ifdef BSP_USING_UART7 - uart_obj[UART7_INDEX].serial.config = config; - uart_obj[UART7_INDEX].uart_dma_flag = 0; - - uart_obj[UART7_INDEX].serial.config.rx_bufsz = BSP_UART7_RX_BUFSIZE; - uart_obj[UART7_INDEX].serial.config.tx_bufsz = BSP_UART7_TX_BUFSIZE; -#endif - -#ifdef BSP_USING_UART1 - uart_obj[UART1_INDEX].serial.config = config; - uart_obj[UART1_INDEX].uart_dma_flag = 0; - - uart_obj[UART1_INDEX].serial.config.rx_bufsz = BSP_UART1_RX_BUFSIZE; - uart_obj[UART1_INDEX].serial.config.tx_bufsz = BSP_UART1_TX_BUFSIZE; -#endif -} - - -/* - * UART interface - */ -static rt_err_t ra_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg) -{ - struct ra_uart *uart; - RT_ASSERT(serial != RT_NULL); - RT_ASSERT(cfg != RT_NULL); - - fsp_err_t err = FSP_SUCCESS; - - uart = rt_container_of(serial, struct ra_uart, serial); - RT_ASSERT(uart != RT_NULL); - - err = R_SCI_UART_Open(uart->config->p_api_ctrl, uart->config->p_cfg); - if (FSP_SUCCESS != err) - { - return RT_ERROR; - } - - return RT_EOK; -} - -static rt_err_t ra_uart_control(struct rt_serial_device *serial, int cmd, void *arg) -{ - return RT_EOK; -} - -static int ra_uart_putc(struct rt_serial_device *serial, char c) -{ - struct ra_uart *uart; - RT_ASSERT(serial != RT_NULL); - - uart = rt_container_of(serial, struct ra_uart, serial); - RT_ASSERT(uart != RT_NULL); - - sci_uart_instance_ctrl_t *p_ctrl = (sci_uart_instance_ctrl_t *)uart->config->p_api_ctrl; - - p_ctrl->p_reg->TDR = c; - while ((p_ctrl->p_reg->SSR_b.TEND) == 0); - - return RT_EOK; -} - -static int ra_uart_getc(struct rt_serial_device *serial) -{ - return RT_EOK; -} - - -#ifdef BSP_USING_UART7 -void uart7_isr_cb(uart_callback_args_t *p_args) -{ - rt_interrupt_enter(); - - struct rt_serial_device *serial = &uart_obj[0].serial; - RT_ASSERT(serial != RT_NULL); - - if (UART_EVENT_RX_CHAR == p_args->event) - { - struct rt_serial_rx_fifo *rx_fifo; - rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; - RT_ASSERT(rx_fifo != RT_NULL); - - rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); - - rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); - } - - rt_interrupt_leave(); -} -#endif - - -#ifdef BSP_USING_UART1 -void uart1_isr_cb(uart_callback_args_t *p_args) -{ - rt_interrupt_enter(); - - struct rt_serial_device *serial = &uart_obj[1].serial; - RT_ASSERT(serial != RT_NULL); - - if (UART_EVENT_RX_CHAR == p_args->event) - { - struct rt_serial_rx_fifo *rx_fifo; - rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; - RT_ASSERT(rx_fifo != RT_NULL); - - rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); - - rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); - } - - rt_interrupt_leave(); -} -#endif - - -static const struct rt_uart_ops ra_uart_ops = -{ - .configure = ra_uart_configure, - .control = ra_uart_control, - .putc = ra_uart_putc, - .getc = ra_uart_getc, -}; - - -int rt_hw_usart_init(void) -{ - rt_err_t result = 0; - rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct ra_uart); - - ra_uart_get_config(); - for (int i = 0; i < obj_num; i++) - { - /* init UART object */ - uart_obj[i].config = &uart_config[i]; - uart_obj[i].serial.ops = &ra_uart_ops; - /* register UART device */ - result = rt_hw_serial_register(&uart_obj[i].serial, - uart_obj[i].config->name, - RT_DEVICE_FLAG_RDWR, - NULL); - RT_ASSERT(result == RT_EOK); - } - - return result; -} - -#endif /* RT_USING_SERIAL_V2 */ diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_usart_v2.h b/bsp/renesas/ra6m4-cpk/drivers/drv_usart_v2.h deleted file mode 100644 index d4fe7eb327..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_usart_v2.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#ifndef __DRV_USART_V2_H__ -#define __DRV_USART_V2_H__ - -#include -#include -#include -#include -#include -#include - -/* renesas config class */ -struct ra_uart_config -{ - const char *name; - uart_ctrl_t *const p_api_ctrl; - uart_cfg_t const *const p_cfg; -}; - -struct ra_uart -{ - struct rt_serial_device serial; - - rt_uint16_t uart_dma_flag; - - struct ra_uart_config *config; -}; - -int rt_hw_usart_init(void); - -#endif /* __DRV_USART_H__ */ diff --git a/bsp/renesas/ra6m4-cpk/drivers/drv_wdt.c b/bsp/renesas/ra6m4-cpk/drivers/drv_wdt.c deleted file mode 100644 index 44f64a1cce..0000000000 --- a/bsp/renesas/ra6m4-cpk/drivers/drv_wdt.c +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-20 Mr.Tiger first version - */ - -#include -#include -#include -#include -#include -#include - -#ifdef RT_USING_WDT - -//#define DRV_DEBUG -#define LOG_TAG "drv.wdt" -#include - -static struct rt_watchdog_device ra_wdt_dev; -static struct rt_watchdog_ops ops; - -static rt_err_t wdt_init(rt_watchdog_t *wdt) -{ - return RT_EOK; -} - -static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg) -{ - struct st_wdt_timeout_values *wdt_value = {0}; - switch (cmd) - { - /* feed the watchdog */ - case RT_DEVICE_CTRL_WDT_KEEPALIVE: - if (R_WDT_Refresh(&g_wdt_ctrl) != FSP_SUCCESS) - { - LOG_E("watch dog keepalive fail."); - } - break; - /* set watchdog timeout */ - case RT_DEVICE_CTRL_WDT_SET_TIMEOUT: - /**< set*/ - break; - case RT_DEVICE_CTRL_WDT_GET_TIMEOUT: - wdt_value = (struct st_wdt_timeout_values *)arg; - if (R_WDT_TimeoutGet(&g_wdt_ctrl, wdt_value) != FSP_SUCCESS) - { - LOG_E("wdt get timeout failed."); - return -RT_ERROR; - } - break; - case RT_DEVICE_CTRL_WDT_START: - if (R_WDT_Open(&g_wdt_ctrl, &g_wdt_cfg) == FSP_SUCCESS) - { - if (R_WDT_Refresh(&g_wdt_ctrl) != FSP_SUCCESS) - { - LOG_E("wdt start failed."); - return -RT_ERROR; - } - } - else - { - LOG_E("wdt start failed."); - return -RT_ERROR; - } - break; - default: - LOG_W("This command is not supported."); - return -RT_ERROR; - } - return RT_EOK; -} - -int rt_wdt_init(void) -{ - ops.init = &wdt_init; - ops.control = &wdt_control; - ra_wdt_dev.ops = &ops; - /* register watchdog device */ - if (rt_hw_watchdog_register(&ra_wdt_dev, "wdt", RT_DEVICE_FLAG_DEACTIVATE, RT_NULL) != RT_EOK) - { - LOG_E("wdt device register failed."); - return -RT_ERROR; - } - LOG_D("wdt device register success."); - return RT_EOK; -} -INIT_BOARD_EXPORT(rt_wdt_init); - -#endif /* RT_USING_WDT */ diff --git a/bsp/renesas/ra6m4-cpk/ports/SConscript b/bsp/renesas/ra6m4-cpk/ports/SConscript deleted file mode 100644 index ca95be14e2..0000000000 --- a/bsp/renesas/ra6m4-cpk/ports/SConscript +++ /dev/null @@ -1,12 +0,0 @@ -import os -from building import * - -objs = [] -cwd = GetCurrentDir() -list = os.listdir(cwd) - -for item in list: - if os.path.isfile(os.path.join(cwd, item, 'SConscript')): - objs = objs + SConscript(os.path.join(item, 'SConscript')) - -Return('objs') diff --git a/bsp/renesas/ra6m4-cpk/ports/fal/SConscript b/bsp/renesas/ra6m4-cpk/ports/fal/SConscript deleted file mode 100644 index c8931044c5..0000000000 --- a/bsp/renesas/ra6m4-cpk/ports/fal/SConscript +++ /dev/null @@ -1,22 +0,0 @@ - -from building import * -import rtconfig - -cwd = GetCurrentDir() - -src = [] - -src += Glob('*.c') -CPPPATH = [cwd] -LOCAL_CFLAGS = '' - -if rtconfig.PLATFORM == 'gcc': - LOCAL_CFLAGS += ' -std=c99' -elif rtconfig.PLATFORM == 'armcc': - LOCAL_CFLAGS += ' --c99' -elif rtconfig.PLATFORM == 'armclang': - LOCAL_CFLAGS += ' -std=c99' - -group = DefineGroup('FAL', src, depend = ['PKG_USING_FAL'], CPPPATH = CPPPATH, LOCAL_CFLAGS = LOCAL_CFLAGS) - -Return('group') diff --git a/bsp/renesas/ra6m4-cpk/ports/fal/fal_cfg.h b/bsp/renesas/ra6m4-cpk/ports/fal/fal_cfg.h deleted file mode 100644 index 37d4e87e0a..0000000000 --- a/bsp/renesas/ra6m4-cpk/ports/fal/fal_cfg.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2018-08-21 MurphyZhao the first version - */ -#ifndef _FAL_CFG_H_ -#define _FAL_CFG_H_ - -#include -#include - -/* enable stm32l4 onchip flash driver sample */ -#define FAL_FLASH_PORT_DRIVER_STM32L4 -/* enable SFUD flash driver sample */ -#define FAL_FLASH_PORT_DRIVER_SFUD - -extern const struct fal_flash_dev _onchip_flash_8k; -extern const struct fal_flash_dev _onchip_flash_32k; - -/* flash device table */ -#define FAL_FLASH_DEV_TABLE \ -{ \ - &_onchip_flash_8k, \ - &_onchip_flash_32k, \ -} -/* ====================== Partition Configuration ========================== */ -#ifdef FAL_PART_HAS_TABLE_CFG -/** partition table, The chip flash partition is defined in "\ra\fsp\src\bsp\mcu\ra6m4\bsp_feature.h". - * More details can be found in the RA6M4 Group User Manual: Hardware section 47 Flash memory.*/ -#define FAL_PART_TABLE \ -{ \ - {FAL_PART_MAGIC_WROD, "app", "onchip_flash_8k", 0, 64 * 1024, 0}, \ - {FAL_PART_MAGIC_WROD, "param", "onchip_flash_32k", 0, 32 * 30 * 1024, 0}, \ -} -#endif /* FAL_PART_HAS_TABLE_CFG */ -#endif /* _FAL_CFG_H_ */ - diff --git a/bsp/renesas/ra6m4-cpk/ports/rw007/SConscript b/bsp/renesas/ra6m4-cpk/ports/rw007/SConscript deleted file mode 100644 index 99b97f1a80..0000000000 --- a/bsp/renesas/ra6m4-cpk/ports/rw007/SConscript +++ /dev/null @@ -1,22 +0,0 @@ - -from building import * -import rtconfig - -cwd = GetCurrentDir() - -src = [] - -src += Glob('*.c') -CPPPATH = [cwd] -LOCAL_CFLAGS = '' - -if rtconfig.PLATFORM == 'gcc': - LOCAL_CFLAGS += ' -std=c99' -elif rtconfig.PLATFORM == 'armcc': - LOCAL_CFLAGS += ' --c99' -elif rtconfig.PLATFORM == 'armclang': - LOCAL_CFLAGS += ' -std=c99' - -group = DefineGroup('rw007', src, depend = ['BSP_USING_RW007'], CPPPATH = CPPPATH, LOCAL_CFLAGS = LOCAL_CFLAGS) - -Return('group') diff --git a/bsp/renesas/ra6m4-cpk/ports/rw007/drv_rw007.c b/bsp/renesas/ra6m4-cpk/ports/rw007/drv_rw007.c deleted file mode 100644 index 14e4155b59..0000000000 --- a/bsp/renesas/ra6m4-cpk/ports/rw007/drv_rw007.c +++ /dev/null @@ -1,67 +0,0 @@ -#include -#include -#ifdef BSP_USING_RW007 -#include -#include -#include -#include - -extern void spi_wifi_isr(int vector); - -static void rw007_gpio_init(void) -{ - /* Configure IO */ - rt_pin_mode(RA_RW007_RST_PIN, PIN_MODE_OUTPUT); - rt_pin_mode(RA_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLDOWN); - - /* Reset rw007 and config mode */ - rt_pin_write(RA_RW007_RST_PIN, PIN_LOW); - rt_thread_delay(rt_tick_from_millisecond(100)); - rt_pin_write(RA_RW007_RST_PIN, PIN_HIGH); - - /* Wait rw007 ready(exit busy stat) */ - while (!rt_pin_read(RA_RW007_INT_BUSY_PIN)) - { - rt_thread_delay(5); - } - - rt_thread_delay(rt_tick_from_millisecond(200)); - rt_pin_mode(RA_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLUP); -} - -static struct rt_spi_device rw007_dev; - -int wifi_spi_device_init(void) -{ - char sn_version[32]; - uint32_t cs_pin = RA_RW007_CS_PIN; - - rw007_gpio_init(); - rt_hw_spi_device_attach(&rw007_dev, "wspi", RA_RW007_SPI_BUS_NAME, (void *)cs_pin); - rt_hw_wifi_init("wspi"); - - rt_wlan_set_mode(RT_WLAN_DEVICE_STA_NAME, RT_WLAN_STATION); - rt_wlan_set_mode(RT_WLAN_DEVICE_AP_NAME, RT_WLAN_AP); - - rw007_sn_get(sn_version); - rt_kprintf("\nrw007 sn: [%s]\n", sn_version); - rw007_version_get(sn_version); - rt_kprintf("rw007 ver: [%s]\n\n", sn_version); - - return 0; -} -INIT_APP_EXPORT(wifi_spi_device_init); - -static void int_wifi_irq(void *p) -{ - ((void)p); - spi_wifi_isr(0); -} - -void spi_wifi_hw_init(void) -{ - rt_pin_attach_irq(RA_RW007_INT_BUSY_PIN, PIN_IRQ_MODE_FALLING, int_wifi_irq, 0); - rt_pin_irq_enable(RA_RW007_INT_BUSY_PIN, RT_TRUE); -} - -#endif /* BSP_USING_RW007 */ diff --git a/bsp/renesas/ra6m4-cpk/project.uvoptx b/bsp/renesas/ra6m4-cpk/project.uvoptx index 853ddaf732..c4f74e1594 100644 --- a/bsp/renesas/ra6m4-cpk/project.uvoptx +++ b/bsp/renesas/ra6m4-cpk/project.uvoptx @@ -170,7 +170,7 @@ - :Renesas RA Smart Configurator:Common Sources + Compiler 0 0 0 @@ -182,6 +182,486 @@ 0 0 0 + ..\..\..\components\libc\compilers\armlibc\syscalls.c + syscalls.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\armlibc\syscall_mem.c + syscall_mem.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\stdlib.c + stdlib.c + 0 + 0 + + + 1 + 4 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\time.c + time.c + 0 + 0 + + + + + CPU + 0 + 0 + 0 + 0 + + 2 + 5 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\div0.c + div0.c + 0 + 0 + + + 2 + 6 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\backtrace.c + backtrace.c + 0 + 0 + + + 2 + 7 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\showmem.c + showmem.c + 0 + 0 + + + 2 + 8 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m4\cpuport.c + cpuport.c + 0 + 0 + + + 2 + 9 + 2 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m4\context_rvds.S + context_rvds.S + 0 + 0 + + + + + DeviceDrivers + 0 + 0 + 0 + 0 + + 3 + 10 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\workqueue.c + workqueue.c + 0 + 0 + + + 3 + 11 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\waitqueue.c + waitqueue.c + 0 + 0 + + + 3 + 12 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\completion.c + completion.c + 0 + 0 + + + 3 + 13 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\dataqueue.c + dataqueue.c + 0 + 0 + + + 3 + 14 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\ringbuffer.c + ringbuffer.c + 0 + 0 + + + 3 + 15 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\pipe.c + pipe.c + 0 + 0 + + + 3 + 16 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\ringblk_buf.c + ringblk_buf.c + 0 + 0 + + + 3 + 17 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\misc\pin.c + pin.c + 0 + 0 + + + 3 + 18 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\serial\serial_v2.c + serial_v2.c + 0 + 0 + + + + + Drivers + 0 + 0 + 0 + 0 + + 4 + 19 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_gpio.c + drv_gpio.c + 0 + 0 + + + 4 + 20 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_usart_v2.c + drv_usart_v2.c + 0 + 0 + + + 4 + 21 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_common.c + drv_common.c + 0 + 0 + + + + + Finsh + 0 + 0 + 0 + 0 + + 5 + 22 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\shell.c + shell.c + 0 + 0 + + + 5 + 23 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\msh.c + msh.c + 0 + 0 + + + 5 + 24 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\cmd.c + cmd.c + 0 + 0 + + + + + Kernel + 0 + 0 + 0 + 0 + + 6 + 25 + 1 + 0 + 0 + 0 + ..\..\..\src\timer.c + timer.c + 0 + 0 + + + 6 + 26 + 1 + 0 + 0 + 0 + ..\..\..\src\object.c + object.c + 0 + 0 + + + 6 + 27 + 1 + 0 + 0 + 0 + ..\..\..\src\ipc.c + ipc.c + 0 + 0 + + + 6 + 28 + 1 + 0 + 0 + 0 + ..\..\..\src\kservice.c + kservice.c + 0 + 0 + + + 6 + 29 + 1 + 0 + 0 + 0 + ..\..\..\src\mem.c + mem.c + 0 + 0 + + + 6 + 30 + 1 + 0 + 0 + 0 + ..\..\..\src\thread.c + thread.c + 0 + 0 + + + 6 + 31 + 1 + 0 + 0 + 0 + ..\..\..\src\device.c + device.c + 0 + 0 + + + 6 + 32 + 1 + 0 + 0 + 0 + ..\..\..\src\components.c + components.c + 0 + 0 + + + 6 + 33 + 1 + 0 + 0 + 0 + ..\..\..\src\scheduler.c + scheduler.c + 0 + 0 + + + 6 + 34 + 1 + 0 + 0 + 0 + ..\..\..\src\clock.c + clock.c + 0 + 0 + + + 6 + 35 + 1 + 0 + 0 + 0 + ..\..\..\src\idle.c + idle.c + 0 + 0 + + + 6 + 36 + 1 + 0 + 0 + 0 + ..\..\..\src\irq.c + irq.c + 0 + 0 + + + + + :Renesas RA Smart Configurator:Common Sources + 0 + 0 + 0 + 0 + + 7 + 37 + 1 + 0 + 0 + 0 .\src\hal_entry.c hal_entry.c 0 diff --git a/bsp/renesas/ra6m4-cpk/project.uvprojx b/bsp/renesas/ra6m4-cpk/project.uvprojx index b7ae8d4d7b..5010686678 100644 --- a/bsp/renesas/ra6m4-cpk/project.uvprojx +++ b/bsp/renesas/ra6m4-cpk/project.uvprojx @@ -1,7 +1,10 @@ + 2.1 +
### uVision Project, (C) Keil Software
+ Target 1 @@ -16,28 +19,28 @@ Renesas.RA_DFP.3.1.0 https://www2.renesas.eu/Keil_MDK_Packs/ CPUTYPE("Cortex-M33") FPU3(SFPU) DSP TZ CLOCK(12000000) ELITTLE - - - + + + 0 - - - - - - - - - - + + + + + + + + + + $$Device:R7FA6M4AF3CFB$SVD\R7FA6M4AF.svd 0 0 - - - - - + + + + + 0 0 @@ -46,7 +49,7 @@ 1 .\Objects\ - ra6m4_cpk + rtthread 1 0 1 @@ -59,8 +62,8 @@ 0 0 - - + + 0 0 0 @@ -69,8 +72,8 @@ 0 0 - - + + 0 0 0 @@ -80,14 +83,14 @@ 0 0 cmd /c "start "Renesas" /w cmd /c ""$Slauncher\rasc_launcher.bat" "3.5.0" --gensecurebundle --compiler ARMv6 "$Pconfiguration.xml" "$L%L" 2> "%%TEMP%%\rasc_stderr.out""" - + 0 0 2 0 0 - + 0 @@ -101,15 +104,15 @@ 0 0 3 - - + + 1 - - - - + + + + SARMCM3.DLL -MPU TCM.DLL @@ -134,12 +137,12 @@ -1 1 - + "" () - - - - + + + + 0 @@ -172,7 +175,7 @@ 0 0 "Cortex-M33" - + 0 0 0 @@ -306,7 +309,7 @@ 0x0 - + 1 @@ -334,9 +337,9 @@ 0 -Wno-license-management -Wuninitialized -Wall -Wmissing-declarations -Wpointer-arith -Waggregate-return -Wfloat-equal - SOC_R7FA6M4AF, __RTTHREAD__, RT_USING_ARM_LIBC, __CLK_TCK=RT_TICK_PER_SECOND - - ..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\extension;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;drivers;drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc;..\..\..\examples\utest\testcases\kernel + __RTTHREAD__, RT_USING_ARM_LIBC, __CLK_TCK=RT_TICK_PER_SECOND + + ..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\extension;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\ports;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc @@ -351,10 +354,10 @@ 0 4 - - - - + + + + @@ -364,14 +367,14 @@ 0 0 0 - - - + + + .\script\fsp.scat - - - - + + + + 6319,6314 @@ -385,26 +388,20 @@ 1 ..\..\..\components\libc\compilers\armlibc\syscalls.c - - syscall_mem.c 1 ..\..\..\components\libc\compilers\armlibc\syscall_mem.c - - - time.c + stdlib.c 1 - ..\..\..\components\libc\compilers\common\time.c + ..\..\..\components\libc\compilers\common\stdlib.c - - - stdlib.c + time.c 1 - ..\..\..\components\libc\compilers\common\stdlib.c + ..\..\..\components\libc\compilers\common\time.c @@ -416,34 +413,26 @@ 1 ..\..\..\libcpu\arm\common\div0.c - - backtrace.c 1 ..\..\..\libcpu\arm\common\backtrace.c - - showmem.c 1 ..\..\..\libcpu\arm\common\showmem.c - - - - context_rvds.S - 2 - ..\..\..\libcpu\arm\cortex-m4\context_rvds.S - - - cpuport.c 1 ..\..\..\libcpu\arm\cortex-m4\cpuport.c + + context_rvds.S + 2 + ..\..\..\libcpu\arm\cortex-m4\context_rvds.S + @@ -454,57 +443,41 @@ 1 ..\..\..\components\drivers\ipc\workqueue.c - - waitqueue.c 1 ..\..\..\components\drivers\ipc\waitqueue.c - - completion.c 1 ..\..\..\components\drivers\ipc\completion.c - - - pipe.c + dataqueue.c 1 - ..\..\..\components\drivers\ipc\pipe.c + ..\..\..\components\drivers\ipc\dataqueue.c - - - ringblk_buf.c + ringbuffer.c 1 - ..\..\..\components\drivers\ipc\ringblk_buf.c + ..\..\..\components\drivers\ipc\ringbuffer.c - - - dataqueue.c + pipe.c 1 - ..\..\..\components\drivers\ipc\dataqueue.c + ..\..\..\components\drivers\ipc\pipe.c - - - ringbuffer.c + ringblk_buf.c 1 - ..\..\..\components\drivers\ipc\ringbuffer.c + ..\..\..\components\drivers\ipc\ringblk_buf.c - - pin.c 1 ..\..\..\components\drivers\misc\pin.c - - serial_v2.c 1 @@ -518,21 +491,17 @@ drv_gpio.c 1 - drivers\drv_gpio.c + ..\libraries\HAL_Drivers\drv_gpio.c - - drv_usart_v2.c 1 - drivers\drv_usart_v2.c + ..\libraries\HAL_Drivers\drv_usart_v2.c - - drv_common.c 1 - drivers\drv_common.c + ..\libraries\HAL_Drivers\drv_common.c @@ -544,15 +513,11 @@ 1 ..\..\..\components\finsh\shell.c - - msh.c 1 ..\..\..\components\finsh\msh.c - - cmd.c 1 @@ -564,109 +529,102 @@ Kernel - device.c - 1 - ..\..\..\src\device.c - - - - - irq.c + timer.c 1 - ..\..\..\src\irq.c + ..\..\..\src\timer.c - - object.c 1 ..\..\..\src\object.c - - ipc.c 1 ..\..\..\src\ipc.c - - kservice.c 1 ..\..\..\src\kservice.c - - - timer.c + mem.c 1 - ..\..\..\src\timer.c + ..\..\..\src\mem.c - - thread.c 1 ..\..\..\src\thread.c - - - components.c + device.c 1 - ..\..\..\src\components.c + ..\..\..\src\device.c - - - idle.c + components.c 1 - ..\..\..\src\idle.c + ..\..\..\src\components.c - - scheduler.c 1 ..\..\..\src\scheduler.c - - clock.c 1 ..\..\..\src\clock.c + + idle.c + 1 + ..\..\..\src\idle.c + + + irq.c + 1 + ..\..\..\src\irq.c + + + + :Renesas RA Smart Configurator:Common Sources - mem.c + hal_entry.c 1 - ..\..\..\src\mem.c + .\src\hal_entry.c + + ::Flex Software + + - + - + - + - + - + + diff --git a/bsp/renesas/ra6m4-cpk/ra/SConscript b/bsp/renesas/ra6m4-cpk/ra/SConscript index e9b91784b5..fd53aae32f 100644 --- a/bsp/renesas/ra6m4-cpk/ra/SConscript +++ b/bsp/renesas/ra6m4-cpk/ra/SConscript @@ -6,21 +6,29 @@ cwd = GetCurrentDir() src = [] group = [] CPPPATH = [] -CPPDEFINES = ['SOC_R7FA6M4AF'] -if rtconfig.CROSS_TOOL == 'iar': +if rtconfig.PLATFORM == 'iar': print("\nThe current project does not support iar build\n") Return('group') -elif rtconfig.CROSS_TOOL == 'gcc': +elif rtconfig.PLATFORM == 'gcc': src += Glob(cwd + '/fsp/src/bsp/mcu/all/*.c') src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c'] src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c'] src += Glob(cwd + '/fsp/src/r_*/*.c') - CPPPATH = [ cwd + '/arm/CMSIS_5/CMSIS/Core/Include', cwd + '/fsp/inc', cwd + '/fsp/inc/api', cwd + '/fsp/inc/instances',] +elif rtconfig.PLATFORM == 'armclang': + if GetOption('target') != 'mdk5': + src += Glob(cwd + '/fsp/src/bsp/mcu/all/*.c') + src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c'] + src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c'] + src += Glob(cwd + '/fsp/src/r_*/*.c') + CPPPATH = [ cwd + '/arm/CMSIS_5/CMSIS/Core/Include', + cwd + '/fsp/inc', + cwd + '/fsp/inc/api', + cwd + '/fsp/inc/instances',] -group = DefineGroup('ra', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES) +group = DefineGroup('ra', src, depend = [''], CPPPATH = CPPPATH) Return('group') diff --git a/bsp/renesas/ra6m4-cpk/ra_cfg/SConscript b/bsp/renesas/ra6m4-cpk/ra_cfg/SConscript index e5a035e74e..21f29eb460 100644 --- a/bsp/renesas/ra6m4-cpk/ra_cfg/SConscript +++ b/bsp/renesas/ra6m4-cpk/ra_cfg/SConscript @@ -7,13 +7,17 @@ src = [] group = [] CPPPATH = [] -if rtconfig.CROSS_TOOL == 'iar': +if rtconfig.PLATFORM == 'iar': print("\nThe current project does not support iar build\n") Return('group') -elif rtconfig.CROSS_TOOL == 'gcc': +elif rtconfig.PLATFORM == 'gcc': src = Glob('*.c') CPPPATH = [cwd+'/fsp_cfg', cwd + '/fsp_cfg/bsp'] +elif rtconfig.PLATFORM == 'armclang': + if GetOption('target') != 'mdk5': + src = Glob('*.c') + CPPPATH = [cwd+'/fsp_cfg', cwd + '/fsp_cfg/bsp'] -group = group + DefineGroup('ra_cfg', src, depend = [''], CPPPATH = CPPPATH) +group += DefineGroup('ra_cfg', src, depend = [''], CPPPATH = CPPPATH) Return('group') diff --git a/bsp/renesas/ra6m4-cpk/ra_gen/SConscript b/bsp/renesas/ra6m4-cpk/ra_gen/SConscript index 68084fbd28..5fb4a860df 100644 --- a/bsp/renesas/ra6m4-cpk/ra_gen/SConscript +++ b/bsp/renesas/ra6m4-cpk/ra_gen/SConscript @@ -7,12 +7,16 @@ src = [] group = [] CPPPATH = [] -if rtconfig.CROSS_TOOL == 'iar': +if rtconfig.PLATFORM == 'iar': print("\nThe current project does not support iar build\n") Return('group') -elif rtconfig.CROSS_TOOL == 'gcc': +elif rtconfig.PLATFORM == 'gcc' : src = Glob('*.c') CPPPATH = [cwd, ] +elif rtconfig.PLATFORM == 'armclang': + if GetOption('target') != 'mdk5': + src = Glob('*.c') + CPPPATH = [cwd, ] group = DefineGroup('ra_gen', src, depend = [''], CPPPATH = CPPPATH) Return('group') diff --git a/bsp/renesas/ra6m4-cpk/ra_gen/hal_data.c b/bsp/renesas/ra6m4-cpk/ra_gen/hal_data.c index a7cdaf62af..fcebd82e70 100644 --- a/bsp/renesas/ra6m4-cpk/ra_gen/hal_data.c +++ b/bsp/renesas/ra6m4-cpk/ra_gen/hal_data.c @@ -59,7 +59,7 @@ sci_uart_instance_ctrl_t g_uart7_ctrl; .data_bits = UART_DATA_BITS_8, .parity = UART_PARITY_OFF, .stop_bits = UART_STOP_BITS_1, - .p_callback = uart7_isr_cb, + .p_callback = user_uart7_callback, .p_context = NULL, .p_extend = &g_uart7_cfg_extend, #define RA_NOT_DEFINED (1) diff --git a/bsp/renesas/ra6m4-cpk/ra_gen/hal_data.h b/bsp/renesas/ra6m4-cpk/ra_gen/hal_data.h index eedf16b98d..b7b1776e61 100644 --- a/bsp/renesas/ra6m4-cpk/ra_gen/hal_data.h +++ b/bsp/renesas/ra6m4-cpk/ra_gen/hal_data.h @@ -27,8 +27,8 @@ void irq0_callback(external_irq_callback_args_t * p_args); extern const uart_cfg_t g_uart7_cfg; extern const sci_uart_extended_cfg_t g_uart7_cfg_extend; - #ifndef uart7_isr_cb - void uart7_isr_cb(uart_callback_args_t * p_args); + #ifndef user_uart7_callback + void user_uart7_callback(uart_callback_args_t * p_args); #endif void hal_entry(void); void g_hal_init(void); diff --git a/bsp/renesas/ra6m4-cpk/ra_gen/vector_data.c b/bsp/renesas/ra6m4-cpk/ra_gen/vector_data.c index bbb826b011..5bbc494618 100644 --- a/bsp/renesas/ra6m4-cpk/ra_gen/vector_data.c +++ b/bsp/renesas/ra6m4-cpk/ra_gen/vector_data.c @@ -18,4 +18,4 @@ [3] = BSP_PRV_IELS_ENUM(EVENT_SCI7_ERI), /* SCI7 ERI (Receive error) */ [4] = BSP_PRV_IELS_ENUM(EVENT_ICU_IRQ0), /* ICU IRQ0 (External pin interrupt 0) */ }; - #endif + #endif \ No newline at end of file diff --git a/bsp/renesas/ra6m4-cpk/rtconfig.h b/bsp/renesas/ra6m4-cpk/rtconfig.h index 98dc8cb6cf..72514cdbca 100644 --- a/bsp/renesas/ra6m4-cpk/rtconfig.h +++ b/bsp/renesas/ra6m4-cpk/rtconfig.h @@ -106,17 +106,6 @@ /* Network */ -/* Socket abstraction layer */ - - -/* Network interface device */ - - -/* light weight TCP/IP stack */ - - -/* AT commands */ - /* VBUS(Virtual Software BUS) */ @@ -193,10 +182,12 @@ /* entertainment: terminal games and other interesting software packages */ +#define SOC_FAMILY_RENESAS +#define SOC_SERIES_R7FA6M4 /* Hardware Drivers Config */ -#define SOC_SERIES_R7FA6M4AF +#define SOC_R7FA6M4AF /* Onboard Peripheral Drivers */ @@ -210,6 +201,5 @@ /* Board extended module Drivers */ -#define SOC_FAMILY_RENESAS #endif diff --git a/bsp/renesas/ra6m4-cpk/rtconfig.py b/bsp/renesas/ra6m4-cpk/rtconfig.py index ad55ddedbd..c47800d8b0 100644 --- a/bsp/renesas/ra6m4-cpk/rtconfig.py +++ b/bsp/renesas/ra6m4-cpk/rtconfig.py @@ -26,8 +26,8 @@ elif CROSS_TOOL == 'iar': if os.getenv('RTT_EXEC_PATH'): EXEC_PATH = os.getenv('RTT_EXEC_PATH') -# BUILD = 'debug' -BUILD = 'release' +BUILD = 'debug' +# BUILD = 'release' if PLATFORM == 'gcc': # toolchains @@ -60,21 +60,31 @@ if PLATFORM == 'gcc': POST_ACTION = OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n' # POST_ACTION += OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' -elif PLATFORM == 'armcc': +elif PLATFORM == 'armclang': # toolchains - CC = 'armcc' + CC = 'armclang' + CXX = 'armclang' AS = 'armasm' AR = 'armar' LINK = 'armlink' TARGET_EXT = 'axf' - DEVICE = ' --cpu=cortex-m4' - CFLAGS = DEVICE + ' --apcs=interwork --c99 --gnu' + DEVICE = ' --cpu Cortex-M33' + + CFLAGS = ' -mcpu=Cortex-M33 -xc -std=c99 --target=arm-arm-none-eabi -mfpu=fpv5-sp-d16 -mfloat-abi=hard -c' + CFLAGS += ' -fno-rtti -funsigned-char -ffunction-sections' + CFLAGS += ' -Wno-license-management -Wuninitialized -Wall -Wmissing-declarations -Wpointer-arith -Waggregate-return -Wfloat-equal' + AFLAGS = DEVICE + ' --apcs=interwork ' - LFLAGS = DEVICE + ' --scatter ' + 'script/fsp.scat' + ' --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict' - LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' - EXEC_PATH += '/ARM/ARMCC/bin/' + LFLAGS = DEVICE + ' --scatter ' + 'script/fsp.scat' + LFLAGS +=' --info sizes --info totals --info unused --info veneers ' + LFLAGS += ' --list rt-thread.map --strict' + LFLAGS += ' --diag_suppress 6319,6314 --summary_stderr --info summarysizes' + LFLAGS += ' --map --load_addr_map_info --xref --callgraph --symbols' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCLANG/lib' + + EXEC_PATH += '/ARM/ARMCLANG/bin/' if BUILD == 'debug': CFLAGS += ' -g -O0' @@ -83,4 +93,10 @@ elif PLATFORM == 'armcc': CFLAGS += ' -Os' POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET \n' - POST_ACTION += 'python ./makeimg.py' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/renesas/ra6m4-cpk/template.uvprojx b/bsp/renesas/ra6m4-cpk/template.uvprojx index ea623c0b2a..18fd1fb763 100644 --- a/bsp/renesas/ra6m4-cpk/template.uvprojx +++ b/bsp/renesas/ra6m4-cpk/template.uvprojx @@ -49,7 +49,7 @@ 1 .\Objects\ - ra6m4_cpk + rtthread 1 0 1 diff --git a/bsp/renesas/ra6m4-iot/.config b/bsp/renesas/ra6m4-iot/.config index b60e90db2c..9581568e00 100644 --- a/bsp/renesas/ra6m4-iot/.config +++ b/bsp/renesas/ra6m4-iot/.config @@ -194,25 +194,9 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # # Network # - -# -# Socket abstraction layer -# # CONFIG_RT_USING_SAL is not set - -# -# Network interface device -# # CONFIG_RT_USING_NETDEV is not set - -# -# light weight TCP/IP stack -# # CONFIG_RT_USING_LWIP is not set - -# -# AT commands -# # CONFIG_RT_USING_AT is not set # @@ -295,7 +279,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_JIOT-C-SDK is not set # CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set # CONFIG_PKG_USING_JOYLINK is not set -# CONFIG_PKG_USING_EZ_IOT_OS is not set # CONFIG_PKG_USING_NIMBLE is not set # CONFIG_PKG_USING_OTA_DOWNLOADER is not set # CONFIG_PKG_USING_IPMSG is not set @@ -330,7 +313,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set # CONFIG_PKG_USING_HM is not set # CONFIG_PKG_USING_SMALL_MODBUS is not set -# CONFIG_PKG_USING_NET_SERVER is not set # # security packages @@ -344,7 +326,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # # language packages # -# CONFIG_PKG_USING_LUATOS_SOC is not set # CONFIG_PKG_USING_LUA is not set # CONFIG_PKG_USING_JERRYSCRIPT is not set # CONFIG_PKG_USING_MICROPYTHON is not set @@ -388,7 +369,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_MCURSES is not set # CONFIG_PKG_USING_TERMBOX is not set # CONFIG_PKG_USING_VT100 is not set -# CONFIG_PKG_USING_QRCODE is not set # # tools packages @@ -399,6 +379,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_SYSTEMVIEW is not set # CONFIG_PKG_USING_SEGGER_RTT is not set # CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set # CONFIG_PKG_USING_ULOG_FILE is not set # CONFIG_PKG_USING_LOGMGR is not set @@ -448,8 +429,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # # CONFIG_PKG_USING_POSIX_GETLINE is not set # CONFIG_PKG_USING_POSIX_WCWIDTH is not set -# CONFIG_PKG_USING_POSIX_ITOA is not set -# CONFIG_PKG_USING_POSIX_STRINGS is not set # # acceleration: Assembly language or algorithmic acceleration packages @@ -506,6 +485,7 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_MCUBOOT is not set # CONFIG_PKG_USING_TINYUSB is not set # CONFIG_PKG_USING_USB_STACK is not set +# CONFIG_PKG_USING_LUATOS_SOC is not set # # peripheral libraries and drivers @@ -562,7 +542,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_SSD1306 is not set # CONFIG_PKG_USING_QKEY is not set # CONFIG_PKG_USING_RS485 is not set -# CONFIG_PKG_USING_RS232 is not set # CONFIG_PKG_USING_NES is not set # CONFIG_PKG_USING_VIRTUAL_SENSOR is not set # CONFIG_PKG_USING_VDEVICE is not set @@ -584,7 +563,6 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_BL_MCU_SDK is not set # CONFIG_PKG_USING_SOFT_SERIAL is not set # CONFIG_PKG_USING_MB85RS16 is not set -# CONFIG_PKG_USING_CW2015 is not set # # AI packages @@ -650,13 +628,14 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set # CONFIG_PKG_USING_DESIGN_PATTERN is not set -# CONFIG_PKG_USING_CONTROLLER is not set -# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set +CONFIG_SOC_FAMILY_RENESAS=y +CONFIG_SOC_SERIES_R7FA6M4=y +# CONFIG_SOC_SERIES_R7FA2L1 is not set # # Hardware Drivers Config # -CONFIG_SOC_SERIES_R7FA6M4AF=y +CONFIG_SOC_R7FA6M4AF=y # # Onboard Peripheral Drivers @@ -668,15 +647,23 @@ CONFIG_SOC_SERIES_R7FA6M4AF=y CONFIG_BSP_USING_GPIO=y # CONFIG_BSP_USING_ONCHIP_FLASH is not set # CONFIG_BSP_USING_WDT is not set +# CONFIG_BSP_USING_ONCHIP_RTC is not set CONFIG_BSP_USING_UART=y +# CONFIG_BSP_USING_UART0 is not set +# CONFIG_BSP_USING_UART1 is not set +# CONFIG_BSP_USING_UART2 is not set +# CONFIG_BSP_USING_UART3 is not set +# CONFIG_BSP_USING_UART4 is not set +# CONFIG_BSP_USING_UART5 is not set CONFIG_BSP_USING_UART6=y # CONFIG_BSP_UART6_RX_USING_DMA is not set # CONFIG_BSP_UART6_TX_USING_DMA is not set CONFIG_BSP_UART6_RX_BUFSIZE=256 CONFIG_BSP_UART6_TX_BUFSIZE=0 # CONFIG_BSP_USING_UART7 is not set +# CONFIG_BSP_USING_UART8 is not set +# CONFIG_BSP_USING_UART9 is not set # CONFIG_BSP_USING_I2C is not set -# CONFIG_BSP_USING_ONCHIP_RTC is not set # CONFIG_BSP_USING_SPI is not set # CONFIG_BSP_USING_ADC is not set # CONFIG_BSP_USING_DAC is not set @@ -688,4 +675,4 @@ CONFIG_BSP_UART6_TX_BUFSIZE=0 # Board extended module Drivers # # CONFIG_BSP_USING_RW007 is not set -CONFIG_SOC_FAMILY_RENESAS=y +# CONFIG_BSP_USING_LWIP_PPP is not set diff --git a/bsp/renesas/ra6m4-iot/.ignore_format.yml b/bsp/renesas/ra6m4-iot/.ignore_format.yml index 7880684094..af51bf92aa 100644 --- a/bsp/renesas/ra6m4-iot/.ignore_format.yml +++ b/bsp/renesas/ra6m4-iot/.ignore_format.yml @@ -6,3 +6,4 @@ dir_path: - ra - ra_gen - ra_cfg +- RTE diff --git a/bsp/renesas/ra6m4-iot/.settings/standalone.prefs b/bsp/renesas/ra6m4-iot/.settings/standalone.prefs index 4073070613..0a155b99f4 100644 --- a/bsp/renesas/ra6m4-iot/.settings/standalone.prefs +++ b/bsp/renesas/ra6m4-iot/.settings/standalone.prefs @@ -1,4 +1,4 @@ -#Tue Jan 18 10:26:41 CST 2022 +#Wed Feb 23 14:57:42 CST 2022 com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/libraries= com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat com.renesas.cdt.ddsc.packs.componentfiles/RECH\#\#BSP\#\#Board\#\#RA6M4_IoT\#\#\#\#3.5.0/all=431480014,ra/board/ra6m4_iot/board_leds.h|310556077,ra/board/ra6m4_iot/board_init.c|2021830415,ra/board/ra6m4_iot/board_ethernet_phy.h|311023834,ra/board/ra6m4_iot/board.h|1596843605,ra/board/ra6m4_iot/board_keys.h|1504341481,ra/board/ra6m4_iot/SEGGER_RTT_Conf.h|443795680,ra/board/ra6m4_iot/board_leds.c|736642717,ra/board/ra6m4_iot/SEGGER_RTT.h|3595564841,ra/board/ra6m4_iot/board_keys.c|2513852369,ra/board/ra6m4_iot/board_init.h @@ -10,7 +10,6 @@ com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_p com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/all=1044777225,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h|2701379970,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|1441545198,ra/arm/CMSIS_5/LICENSE.txt|1494441116,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|3911746910,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|3552689244,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h|3358993753,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h|1577199483,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h|364344841,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h|304461792,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h|1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|3127123217,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|965562395,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|1564341101,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|2718020009,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|1168186370,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|3163610011,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|302860276,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h|2333906976,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h|3898569239,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|2381390623,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#device\#\#R7FA6M4AF3CFP\#\#3.5.0/libraries= com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#fsp\#\#\#\#3.5.0/libraries= -com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.295001668=false com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m4\#\#fsp\#\#\#\#3.5.0/all=3301568719,ra/fsp/src/bsp/mcu/ra6m4/bsp_feature.h|1009023542,ra/fsp/src/bsp/mcu/ra6m4/bsp_elc.h|2347061782,ra/fsp/src/bsp/mcu/ra6m4/bsp_mcu_info.h com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/all=1939984091,ra/fsp/inc/api/r_ioport_api.h|2208590403,ra/fsp/inc/instances/r_ioport.h|3254285722,ra/fsp/src/r_ioport/r_ioport.c com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.2044193823=false diff --git a/bsp/renesas/ra6m4-iot/Kconfig b/bsp/renesas/ra6m4-iot/Kconfig index 72b823f886..061dbecbd3 100644 --- a/bsp/renesas/ra6m4-iot/Kconfig +++ b/bsp/renesas/ra6m4-iot/Kconfig @@ -25,14 +25,5 @@ config ENV_DIR source "$RTT_DIR/Kconfig" source "$PKGS_DIR/Kconfig" -source "$BSP_DIR/drivers/Kconfig" - -config SOC_FAMILY_RENESAS - bool - default y - -config SOC_SERIES_R7FA6M4AF - bool - select ARCH_ARM_CORTEX_M4 - select SOC_FAMILY_RENESAS - default y \ No newline at end of file +source "../libraries/Kconfig" +source "$BSP_DIR/board/Kconfig" diff --git a/bsp/renesas/ra6m4-iot/README.md b/bsp/renesas/ra6m4-iot/README.md index 25c5ae7ff4..5dbc72639b 100644 --- a/bsp/renesas/ra6m4-iot/README.md +++ b/bsp/renesas/ra6m4-iot/README.md @@ -36,11 +36,13 @@ | FLASH | 支持 | | | PWM | 支持 | | | CAN | 支持 | | +| SDIO | 支持 | | | 持续更新中... | | | | **外接外设** | **支持情况** | **备注** | | WiFi 模块 | 支持 | [RW007 WiFi 网络模块](https://github.com/RT-Thread-packages/rw007) | | 温湿度传感器 | 支持 | [HS300x 温湿度模块](https://github.com/Guozhanxin/hs300x) | | 室内空气质量传感器 | 支持 | [zmod4410 室内空气质量模块](https://github.com/ShermanShao/zmod4410) | +| 移远 Cat 1模块 | 支持 | [使用PPP方式上网](docs/使用PPP方式上网.md) | ## 使用说明 @@ -70,13 +72,13 @@ - 下载：打开 J-Flash lite 工具，选择芯片型号 R7FA6M4AF，点击 OK 进入工具。选择 BSP 目录下 MDK 编译出的 /object/ra6m4.hex 文件，点击 Program Device 按钮开始烧录。具体操作过程可参考下图步骤： -![image-20211011181555421](docs/picture/jflash1.png) +![image-20211011181555421](docs/picture/jflash1.png) -![image-20211011182047981](docs/picture/jflash2.png) +![image-20211011182047981](docs/picture/jflash2.png) -![image-20211011182434519](docs/picture/jflash.png) +![image-20211011182434519](docs/picture/jflash.png) -![image-20211011182949604](docs/picture/jflash3.png) +![image-20211011182949604](docs/picture/jflash3.png) **查看运行结果** @@ -151,7 +153,7 @@ void hal_entry(void) 2. 下载安装完成后，需要添加 IOT-RA6M4 开发板的官方板级支持包 > 在 docs 目录下找到 **IOT-RA6M4 板级支持包:** Xiaoxiongpai_BSP_FSP3.5.0.rar 3. 如何将 **”IOT-RA6M4 板级支持包“**添加到 FSP 中，请参考文档[如何导入板级支持包](https://www2.renesas.cn/document/ppt/1527171?language=zh&r=1527191) -4. 请查看文档：[使用瑞萨 FSP 配置工具](./docs/使用瑞萨FSP配置工具.md)。在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置。 +4. 请查看文档：[使用瑞萨 FSP 配置工具](../docs/RA系列使用FSP配置外设驱动.md)。在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置。 **ENV 配置** @@ -172,7 +174,7 @@ void hal_entry(void) 可按照下图操作，修改 Utilities 中的选项： -![image-20211214102231248](docs/picture/readme_faq1.png) +![image-20211214102231248](docs/picture/readme_faq1.png) ## 联系人信息 diff --git a/bsp/renesas/ra6m4-iot/RTE/_Target_1/RTE_Components.h b/bsp/renesas/ra6m4-iot/RTE/_Target_1/RTE_Components.h index 4b13b539de..d5d79fdd80 100644 --- a/bsp/renesas/ra6m4-iot/RTE/_Target_1/RTE_Components.h +++ b/bsp/renesas/ra6m4-iot/RTE/_Target_1/RTE_Components.h @@ -3,8 +3,8 @@ * Auto generated Run-Time-Environment Configuration File * *** Do not modify ! *** * - * Project: 'project' - * Target: 'Target 1' + * Project: 'project' + * Target: 'Target 1' */ #ifndef RTE_COMPONENTS_H diff --git a/bsp/renesas/ra6m4-iot/SConscript b/bsp/renesas/ra6m4-iot/SConscript index 6c129cbc40..56916d12c6 100644 --- a/bsp/renesas/ra6m4-iot/SConscript +++ b/bsp/renesas/ra6m4-iot/SConscript @@ -9,12 +9,16 @@ src = [] CPPPATH = [] list = os.listdir(cwd) -if rtconfig.CROSS_TOOL == 'iar': +if rtconfig.PLATFORM == 'iar': print("\nThe current project does not support iar build\n") Return('group') -elif rtconfig.CROSS_TOOL == 'gcc': +elif rtconfig.PLATFORM == 'gcc' : CPPPATH = [cwd] src = Glob('./src/*.c') +elif rtconfig.PLATFORM == 'armclang': + if GetOption('target') != 'mdk5': + CPPPATH = [cwd] + src = Glob('./src/*.c') group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) diff --git a/bsp/renesas/ra6m4-iot/SConstruct b/bsp/renesas/ra6m4-iot/SConstruct index e75d75371b..4a16be573d 100644 --- a/bsp/renesas/ra6m4-iot/SConstruct +++ b/bsp/renesas/ra6m4-iot/SConstruct @@ -20,21 +20,35 @@ TARGET = 'rtthread.' + rtconfig.TARGET_EXT DefaultEnvironment(tools=[]) env = Environment(tools = ['mingw'], AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, - CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS, AR = rtconfig.AR, ARFLAGS = '-rc', LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) env.PrependENVPath('PATH', rtconfig.EXEC_PATH) if rtconfig.PLATFORM == 'iar': - env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) env.Replace(ARFLAGS = ['']) env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map') Export('RTT_ROOT') Export('rtconfig') +SDK_ROOT = os.path.abspath('./') +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +rtconfig.BSP_LIBRARY_TYPE = None + # prepare building environment objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript'))) + # make a building DoBuilding(TARGET, objs) diff --git a/bsp/renesas/ra6m4-iot/board/Kconfig b/bsp/renesas/ra6m4-iot/board/Kconfig new file mode 100644 index 0000000000..d0c138aa1e --- /dev/null +++ b/bsp/renesas/ra6m4-iot/board/Kconfig @@ -0,0 +1,481 @@ +menu "Hardware Drivers Config" + + config SOC_R7FA6M4AF + bool + select SOC_SERIES_R7FA6M4 + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + + menu "Onboard Peripheral Drivers" + + endmenu + + menu "On-chip Peripheral Drivers" + + source "../libraries/HAL_Drivers/Kconfig" + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + select RT_USING_SERIAL_V2 + if BSP_USING_UART + + menuconfig BSP_USING_UART0 + bool "Enable UART0" + default n + if BSP_USING_UART0 + config BSP_UART0_RX_USING_DMA + bool "Enable UART0 RX DMA" + depends on BSP_USING_UART0 && RT_SERIAL_USING_DMA + default n + + config BSP_UART0_TX_USING_DMA + bool "Enable UART0 TX DMA" + depends on BSP_USING_UART0 && RT_SERIAL_USING_DMA + default n + + config BSP_UART0_RX_BUFSIZE + int "Set UART0 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART0_TX_BUFSIZE + int "Set UART0 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART1 + bool "Enable UART1" + default n + if BSP_USING_UART1 + config BSP_UART1_RX_USING_DMA + bool "Enable UART1 RX DMA" + depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA + default n + + config BSP_UART1_TX_USING_DMA + bool "Enable UART1 TX DMA" + depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA + default n + + config BSP_UART1_RX_BUFSIZE + int "Set UART1 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART1_TX_BUFSIZE + int "Set UART1 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART2 + bool "Enable UART2" + default n + if BSP_USING_UART2 + config BSP_UART2_RX_USING_DMA + bool "Enable UART2 RX DMA" + depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA + default n + + config BSP_UART2_TX_USING_DMA + bool "Enable UART2 TX DMA" + depends on BSP_USING_UART2 && RT_SERIAL_USING_DMA + default n + + config BSP_UART2_RX_BUFSIZE + int "Set UART2 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART2_TX_BUFSIZE + int "Set UART2 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART3 + bool "Enable UART3" + default n + if BSP_USING_UART3 + config BSP_UART3_RX_USING_DMA + bool "Enable UART3 RX DMA" + depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA + default n + + config BSP_UART3_TX_USING_DMA + bool "Enable UART3 TX DMA" + depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA + default n + + config BSP_UART3_RX_BUFSIZE + int "Set UART3 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART3_TX_BUFSIZE + int "Set UART3 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART4 + bool "Enable UART4" + default n + if BSP_USING_UART4 + config BSP_UART4_RX_USING_DMA + bool "Enable UART4 RX DMA" + depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA + default n + + config BSP_UART4_TX_USING_DMA + bool "Enable UART4 TX DMA" + depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA + default n + + config BSP_UART4_RX_BUFSIZE + int "Set UART4 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART4_TX_BUFSIZE + int "Set UART4 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART5 + bool "Enable UART5" + default n + if BSP_USING_UART5 + config BSP_UART5_RX_USING_DMA + bool "Enable UART5 RX DMA" + depends on BSP_USING_UART5 && RT_SERIAL_USING_DMA + default n + + config BSP_UART5_TX_USING_DMA + bool "Enable UART5 TX DMA" + depends on BSP_USING_UART5 && RT_SERIAL_USING_DMA + default n + + config BSP_UART5_RX_BUFSIZE + int "Set UART5 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART5_TX_BUFSIZE + int "Set UART5 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART6 + bool "Enable UART6" + default n + if BSP_USING_UART6 + config BSP_UART6_RX_USING_DMA + bool "Enable UART6 RX DMA" + depends on BSP_USING_UART6 && RT_SERIAL_USING_DMA + default n + + config BSP_UART6_TX_USING_DMA + bool "Enable UART6 TX DMA" + depends on BSP_USING_UART6 && RT_SERIAL_USING_DMA + default n + + config BSP_UART6_RX_BUFSIZE + int "Set UART6 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART6_TX_BUFSIZE + int "Set UART6 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART7 + bool "Enable UART7" + default n + if BSP_USING_UART7 + config BSP_UART7_RX_USING_DMA + bool "Enable UART7 RX DMA" + depends on BSP_USING_UART7 && RT_SERIAL_USING_DMA + default n + + config BSP_UART7_TX_USING_DMA + bool "Enable UART7 TX DMA" + depends on BSP_USING_UART7 && RT_SERIAL_USING_DMA + default n + + config BSP_UART7_RX_BUFSIZE + int "Set UART7 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART7_TX_BUFSIZE + int "Set UART7 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART8 + bool "Enable UART8" + default n + if BSP_USING_UART8 + config BSP_UART8_RX_USING_DMA + bool "Enable UART8 RX DMA" + depends on BSP_USING_UART8 && RT_SERIAL_USING_DMA + default n + + config BSP_UART8_TX_USING_DMA + bool "Enable UART8 TX DMA" + depends on BSP_USING_UART8 && RT_SERIAL_USING_DMA + default n + + config BSP_UART8_RX_BUFSIZE + int "Set UART8 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART8_TX_BUFSIZE + int "Set UART8 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + + menuconfig BSP_USING_UART9 + bool "Enable UART9" + default n + if BSP_USING_UART9 + config BSP_UART9_RX_USING_DMA + bool "Enable UART9 RX DMA" + depends on BSP_USING_UART9 && RT_SERIAL_USING_DMA + default n + + config BSP_UART9_TX_USING_DMA + bool "Enable UART9 TX DMA" + depends on BSP_USING_UART9 && RT_SERIAL_USING_DMA + default n + + config BSP_UART9_RX_BUFSIZE + int "Set UART9 RX buffer size" + range 64 65535 + depends on RT_USING_SERIAL_V2 + default 256 + + config BSP_UART9_TX_BUFSIZE + int "Set UART9 TX buffer size" + range 0 65535 + depends on RT_USING_SERIAL_V2 + default 0 + endif + endif + + menuconfig BSP_USING_I2C + bool "Enable I2C BUS" + default n + select RT_USING_I2C + select RT_USING_I2C_BITOPS + select RT_USING_PIN + if BSP_USING_I2C + menuconfig BSP_USING_I2C1 + bool "Enable I2C1 BUS (software simulation)" + default y + if BSP_USING_I2C1 + config BSP_I2C1_SCL_PIN + hex "i2c1 scl pin number" + range 0x0000 0x0B0F + default 0x0512 + config BSP_I2C1_SDA_PIN + hex "I2C1 sda pin number" + range 0x0000 0x0B0F + default 0x0511 + endif + endif + + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + default n + select RT_USING_SPI + if BSP_USING_SPI + config BSP_SPI_USING_DTC_DMA + bool "Enable SPI DTC transfers data without using the CPU." + default n + + config BSP_USING_SPI0 + bool "Enable SPI0 BUS" + default n + + config BSP_USING_SPI1 + bool "Enable SPI1 BUS" + default n + endif + + menuconfig BSP_USING_ADC + bool "Enable ADC" + default n + select RT_USING_ADC + if BSP_USING_ADC + config BSP_USING_ADC0 + bool "Enable ADC0" + default n + + config BSP_USING_ADC1 + bool "Enable ADC1" + default n + endif + + menuconfig BSP_USING_DAC + bool "Enable DAC" + default n + select RT_USING_DAC + if BSP_USING_DAC + config BSP_USING_DAC0 + bool "Enable DAC0" + default n + + config BSP_USING_DAC1 + bool "Enable DAC1" + default n + endif + + menuconfig BSP_USING_PWM + bool "Enable PWM" + default n + select RT_USING_PWM + if BSP_USING_PWM + config BSP_USING_PWM0 + bool "Enable GPT0 (32-Bits) output PWM" + default n + + config BSP_USING_PWM1 + bool "Enable GPT1 (32-Bits) output PWM" + default n + + config BSP_USING_PWM2 + bool "Enable GPT2 (32-Bits) output PWM" + default n + + config BSP_USING_PWM3 + bool "Enable GPT3 (32-Bits) output PWM" + default n + + config BSP_USING_PWM4 + bool "Enable GPT4 (16-Bits) output PWM" + default n + + config BSP_USING_PWM5 + bool "Enable GPT5 (16-Bits) output PWM" + default n + + config BSP_USING_PWM6 + bool "Enable GPT6 (16-Bits) output PWM" + default n + + config BSP_USING_PWM7 + bool "Enable GPT7 (16-Bits) output PWM" + default n + + config BSP_USING_PWM8 + bool "Enable GPT8 (16-Bits) output PWM" + default n + + config BSP_USING_PWM9 + bool "Enable GPT9 (16-Bits) output PWM" + default n + endif + + menuconfig BSP_USING_SDHI + bool "Enable SDHI" + default n + select RT_USING_SDIO + select RT_USING_DFS + select RT_LIBC_USING_FILEIO + select RT_USING_POSIX + if BSP_USING_SDHI + config SDHI_USING_1_BIT + bool "Use 1-bit Mode(4-bit when disable)" + default y + endif + + menuconfig BSP_USING_CAN + bool "Enable CAN" + default n + select RT_USING_CAN + if BSP_USING_CAN + config BSP_USING_CAN0 + bool "Enable CAN0" + default n + + config BSP_USING_CAN1 + bool "Enable CAN1" + default n + endif + + endmenu + + menu "Board extended module Drivers" + + menuconfig BSP_USING_RW007 + bool "Enable RW007" + default n + select PKG_USING_RW007 + select BSP_USING_SPI + + if BSP_USING_RW007 + config RA_RW007_SPI_BUS_NAME + string "RW007 BUS NAME" + default "spi1" + + config RA_RW007_CS_PIN + hex "(HEX)CS pin index" + default 0x040D + + config RA_RW007_BOOT0_PIN + hex "(HEX)BOOT0 pin index (same as spi clk pin)" + default 0x040C + + config RA_RW007_BOOT1_PIN + hex "(HEX)BOOT1 pin index (same as spi cs pin)" + default 0x040D + + config RA_RW007_INT_BUSY_PIN + hex "(HEX)INT/BUSY pin index" + default 0x0506 + + config RA_RW007_RST_PIN + hex "(HEX)RESET pin index" + default 0x040F + endif + + config BSP_USING_LWIP_PPP + bool "Enable ppp function" + default n + select BSP_USING_UART + select BSP_USING_UART2 + select PKG_USING_PPP_DEVICE + + endmenu +endmenu diff --git a/bsp/renesas/ra6m4-iot/board/SConscript b/bsp/renesas/ra6m4-iot/board/SConscript new file mode 100644 index 0000000000..a27ea8e470 --- /dev/null +++ b/bsp/renesas/ra6m4-iot/board/SConscript @@ -0,0 +1,16 @@ +import os +from building import * + +objs = [] +cwd = GetCurrentDir() +list = os.listdir(cwd) +CPPPATH = [cwd] +src = Glob('*.c') + +objs = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH) + +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + objs = objs + SConscript(os.path.join(item, 'SConscript')) + +Return('objs') diff --git a/bsp/renesas/ra6m4-iot/board/board.h b/bsp/renesas/ra6m4-iot/board/board.h new file mode 100644 index 0000000000..999e4749fe --- /dev/null +++ b/bsp/renesas/ra6m4-iot/board/board.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-10 Sherman first version + */ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#define RA_SRAM_SIZE 256 +#define RA_SRAM_END (0x20000000 + RA_SRAM_SIZE * 1024) + +#ifdef __ARMCC_VERSION +extern int Image$$RAM_END$$ZI$$Base; +#define HEAP_BEGIN ((void *)&Image$$RAM_END$$ZI$$Base) +#elif __ICCARM__ +#pragma section="CSTACK" +#define HEAP_BEGIN (__segment_end("CSTACK")) +#else +extern int __RAM_segment_used_end__; +#define HEAP_BEGIN (&__RAM_segment_used_end__) +#endif + +#define HEAP_END RA_SRAM_END + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/bsp/renesas/ra6m4-iot/board/ports/SConscript b/bsp/renesas/ra6m4-iot/board/ports/SConscript new file mode 100644 index 0000000000..3477ad3180 --- /dev/null +++ b/bsp/renesas/ra6m4-iot/board/ports/SConscript @@ -0,0 +1,24 @@ + +from building import * +import rtconfig + +cwd = GetCurrentDir() + +src = [] + +if GetDepend(['BSP_USING_RW007']): + src += Glob('drv_rw007.c') + +CPPPATH = [cwd] +LOCAL_CCFLAGS = '' + +if rtconfig.PLATFORM == 'gcc' or 'armclang': + LOCAL_CCFLAGS += ' -std=c99' +elif rtconfig.PLATFORM == 'armcc': + LOCAL_CCFLAGS += ' --c99' +elif rtconfig.PLATFORM == 'armclang': + LOCAL_CCFLAGS += ' -std=c99' + +group = DefineGroup('Drivers', src, depend = [], CPPPATH = CPPPATH, LOCAL_CCFLAGS = LOCAL_CCFLAGS) + +Return('group') diff --git a/bsp/renesas/ra6m4-iot/board/ports/drv_rw007.c b/bsp/renesas/ra6m4-iot/board/ports/drv_rw007.c new file mode 100644 index 0000000000..14e4155b59 --- /dev/null +++ b/bsp/renesas/ra6m4-iot/board/ports/drv_rw007.c @@ -0,0 +1,67 @@ +#include +#include +#ifdef BSP_USING_RW007 +#include +#include +#include +#include + +extern void spi_wifi_isr(int vector); + +static void rw007_gpio_init(void) +{ + /* Configure IO */ + rt_pin_mode(RA_RW007_RST_PIN, PIN_MODE_OUTPUT); + rt_pin_mode(RA_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLDOWN); + + /* Reset rw007 and config mode */ + rt_pin_write(RA_RW007_RST_PIN, PIN_LOW); + rt_thread_delay(rt_tick_from_millisecond(100)); + rt_pin_write(RA_RW007_RST_PIN, PIN_HIGH); + + /* Wait rw007 ready(exit busy stat) */ + while (!rt_pin_read(RA_RW007_INT_BUSY_PIN)) + { + rt_thread_delay(5); + } + + rt_thread_delay(rt_tick_from_millisecond(200)); + rt_pin_mode(RA_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLUP); +} + +static struct rt_spi_device rw007_dev; + +int wifi_spi_device_init(void) +{ + char sn_version[32]; + uint32_t cs_pin = RA_RW007_CS_PIN; + + rw007_gpio_init(); + rt_hw_spi_device_attach(&rw007_dev, "wspi", RA_RW007_SPI_BUS_NAME, (void *)cs_pin); + rt_hw_wifi_init("wspi"); + + rt_wlan_set_mode(RT_WLAN_DEVICE_STA_NAME, RT_WLAN_STATION); + rt_wlan_set_mode(RT_WLAN_DEVICE_AP_NAME, RT_WLAN_AP); + + rw007_sn_get(sn_version); + rt_kprintf("\nrw007 sn: [%s]\n", sn_version); + rw007_version_get(sn_version); + rt_kprintf("rw007 ver: [%s]\n\n", sn_version); + + return 0; +} +INIT_APP_EXPORT(wifi_spi_device_init); + +static void int_wifi_irq(void *p) +{ + ((void)p); + spi_wifi_isr(0); +} + +void spi_wifi_hw_init(void) +{ + rt_pin_attach_irq(RA_RW007_INT_BUSY_PIN, PIN_IRQ_MODE_FALLING, int_wifi_irq, 0); + rt_pin_irq_enable(RA_RW007_INT_BUSY_PIN, RT_TRUE); +} + +#endif /* BSP_USING_RW007 */ diff --git a/bsp/renesas/ra6m4-iot/board/ports/fal_cfg.h b/bsp/renesas/ra6m4-iot/board/ports/fal_cfg.h new file mode 100644 index 0000000000..37d4e87e0a --- /dev/null +++ b/bsp/renesas/ra6m4-iot/board/ports/fal_cfg.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-08-21 MurphyZhao the first version + */ +#ifndef _FAL_CFG_H_ +#define _FAL_CFG_H_ + +#include +#include + +/* enable stm32l4 onchip flash driver sample */ +#define FAL_FLASH_PORT_DRIVER_STM32L4 +/* enable SFUD flash driver sample */ +#define FAL_FLASH_PORT_DRIVER_SFUD + +extern const struct fal_flash_dev _onchip_flash_8k; +extern const struct fal_flash_dev _onchip_flash_32k; + +/* flash device table */ +#define FAL_FLASH_DEV_TABLE \ +{ \ + &_onchip_flash_8k, \ + &_onchip_flash_32k, \ +} +/* ====================== Partition Configuration ========================== */ +#ifdef FAL_PART_HAS_TABLE_CFG +/** partition table, The chip flash partition is defined in "\ra\fsp\src\bsp\mcu\ra6m4\bsp_feature.h". + * More details can be found in the RA6M4 Group User Manual: Hardware section 47 Flash memory.*/ +#define FAL_PART_TABLE \ +{ \ + {FAL_PART_MAGIC_WROD, "app", "onchip_flash_8k", 0, 64 * 1024, 0}, \ + {FAL_PART_MAGIC_WROD, "param", "onchip_flash_32k", 0, 32 * 30 * 1024, 0}, \ +} +#endif /* FAL_PART_HAS_TABLE_CFG */ +#endif /* _FAL_CFG_H_ */ + diff --git a/bsp/renesas/ra6m4-iot/board/ports/gpio_cfg.h b/bsp/renesas/ra6m4-iot/board/ports/gpio_cfg.h new file mode 100644 index 0000000000..28bef08298 --- /dev/null +++ b/bsp/renesas/ra6m4-iot/board/ports/gpio_cfg.h @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022-01-19 Sherman first version + */ + +/* PIN to IRQx table */ +#define PIN2IRQX_TABLE(pin) \ +{ \ + switch (pin) \ + { \ + case BSP_IO_PORT_04_PIN_00: \ + case BSP_IO_PORT_02_PIN_06: \ + case BSP_IO_PORT_01_PIN_05: \ + return 0; \ + case BSP_IO_PORT_02_PIN_05: \ + case BSP_IO_PORT_01_PIN_01: \ + case BSP_IO_PORT_01_PIN_04: \ + return 1; \ + case BSP_IO_PORT_01_PIN_00: \ + case BSP_IO_PORT_02_PIN_13: \ + return 2; \ + case BSP_IO_PORT_01_PIN_10: \ + case BSP_IO_PORT_02_PIN_12: \ + return 3; \ + case BSP_IO_PORT_04_PIN_02: \ + case BSP_IO_PORT_01_PIN_11: \ + case BSP_IO_PORT_04_PIN_11: \ + return 4; \ + case BSP_IO_PORT_04_PIN_01: \ + case BSP_IO_PORT_03_PIN_02: \ + case BSP_IO_PORT_04_PIN_10: \ + return 5; \ + case BSP_IO_PORT_03_PIN_01: \ + case BSP_IO_PORT_00_PIN_00: \ + case BSP_IO_PORT_04_PIN_09: \ + return 6; \ + case BSP_IO_PORT_00_PIN_01: \ + case BSP_IO_PORT_04_PIN_08: \ + return 7; \ + case BSP_IO_PORT_00_PIN_02: \ + case BSP_IO_PORT_03_PIN_05: \ + case BSP_IO_PORT_04_PIN_15: \ + return 8; \ + case BSP_IO_PORT_00_PIN_04: \ + case BSP_IO_PORT_03_PIN_04: \ + case BSP_IO_PORT_04_PIN_14: \ + return 9; \ + case BSP_IO_PORT_00_PIN_05: \ + return 10; \ + case BSP_IO_PORT_05_PIN_01: \ + case BSP_IO_PORT_00_PIN_06: \ + case BSP_IO_PORT_07_PIN_08: \ + return 11; \ + case BSP_IO_PORT_05_PIN_02: \ + case BSP_IO_PORT_00_PIN_08: \ + return 12; \ + case BSP_IO_PORT_00_PIN_15: \ + return 13; \ + case BSP_IO_PORT_04_PIN_03: \ + case BSP_IO_PORT_05_PIN_05: \ + return 14; \ + case BSP_IO_PORT_04_PIN_04: \ + return 15; \ + default : \ + return -1; \ + } \ +} diff --git a/bsp/renesas/ra6m4-iot/buildinfo.gpdsc b/bsp/renesas/ra6m4-iot/buildinfo.gpdsc index c8a8b70322..2c522c39cd 100644 --- a/bsp/renesas/ra6m4-iot/buildinfo.gpdsc +++ b/bsp/renesas/ra6m4-iot/buildinfo.gpdsc @@ -73,37 +73,55 @@ + + + + + + + + + + + + + + + + + + @@ -118,6 +136,7 @@ + @@ -130,6 +149,7 @@ + diff --git a/bsp/renesas/ra6m4-iot/configuration.xml b/bsp/renesas/ra6m4-iot/configuration.xml index 057f1faac4..60ae2c20b1 100644 --- a/bsp/renesas/ra6m4-iot/configuration.xml +++ b/bsp/renesas/ra6m4-iot/configuration.xml @@ -198,7 +198,7 @@ - + diff --git a/bsp/renesas/ra6m4-iot/docs/picture/1635909864954.png b/bsp/renesas/ra6m4-iot/docs/picture/1635909864954.png deleted file mode 100644 index f8a1333083..0000000000 Binary files a/bsp/renesas/ra6m4-iot/docs/picture/1635909864954.png and /dev/null differ diff --git a/bsp/renesas/ra6m4-iot/docs/picture/1635929089445.png b/bsp/renesas/ra6m4-iot/docs/picture/1635929089445.png deleted file mode 100644 index 3574c5c491..0000000000 Binary files a/bsp/renesas/ra6m4-iot/docs/picture/1635929089445.png and /dev/null differ diff --git a/bsp/renesas/ra6m4-iot/docs/picture/adc_config.png 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"b/bsp/renesas/ra6m4-iot/docs/\344\275\277\347\224\250PPP\346\226\271\345\274\217\344\270\212\347\275\221.md" new file mode 100644 index 0000000000..f4f2a06015 --- /dev/null +++ "b/bsp/renesas/ra6m4-iot/docs/\344\275\277\347\224\250PPP\346\226\271\345\274\217\344\270\212\347\275\221.md" @@ -0,0 +1,36 @@ +# 如何使用 PPP 功能 + + PPP 入网是 4G CAT-1 模块一种除了 AT 命令联网的另一种入网方式。首先要把 PCI-E 接口的 CAT-1 板子插入板上的接口，并且同时连接天线，天线的有无与连接质量优劣一定程度上关系到连接到基站的稳定程度。 + + PPP 作为一个独立的报文，需要网络协议栈来解析，从而获取数据。对于 RT-Thread 而言，lwIP 协议栈就能轻松得胜任这个工作。因此我们需要打开 lwIP 协议栈，并开启 PPP 支持。在 RT-Thread 中，我们需要使用到 PPP_Device 软件包来完成这项工作。使用 Cat -1 模块联网时，一定要插卡，手机卡，物联网卡均可；如果卡被禁用联网，则 ppp 入网会失败。 + +1. 在 ENV 中打开 ppp 支持。 + + ![](./picture/board.png) + +2. 在 ENV 中配置 IOT 软件包，选中 PPP_Device 并进入配置。 + + ![](./picture/select_ppp_device.png) + +3. 配置 PPP_Device ，按照你的手机卡的运行商选取 APN 接入点，以及使用的模块，配置 ```ppp device uart name``` 为 ```uart2```。 + + ![](./picture/configure_apn_modem.png) + +4. 在 ENV 中配置 lwIP 协议栈，TCPIP<> 的协议栈大小增加到 2048 以上。 + + ![](./picture/configure_lwip.png) + +5. 修改 ppp_device_ec20.c 的代码，因为通信模块一般由个人用户自行选配，所以引脚并不完全相符合。比如在瑞萨的板子中，EC20 的复位引脚没有单独引出而与系统复位引脚公用，因此修改为 -1。 + + ![](./picture/config_ppp_device_code.png) + +6. 打开 FSP 中添加 UART2 端口，保存并退出 +7. 插入 SIM 卡，要注意插卡方向 + ![image-20220223162348320](picture/ppp_sim.png) + +8. 编译，debug 下载，测试验证。 + + 下载完成后，需要手动按下开发板的 RESRT 按钮复位，确保芯片和模块都进行了重启。重启后需要等待一会，会自动连接。 + ![image-20220223163648879](picture/ppp_test.png) + 提示连接成功后，可以使用 `ifconfig` 命令查看网络状态信息，使用 `ping baidu.com` 命令测试网络连接状态。 + ![image-20220223164520966](picture/ppp_test1.png) \ No newline at end of file diff --git "a/bsp/renesas/ra6m4-iot/docs/\344\275\277\347\224\250\347\221\236\350\220\250FSP\351\205\215\347\275\256\345\267\245\345\205\267.md" "b/bsp/renesas/ra6m4-iot/docs/\344\275\277\347\224\250\347\221\236\350\220\250FSP\351\205\215\347\275\256\345\267\245\345\205\267.md" deleted file mode 100644 index a6a22660b9..0000000000 --- "a/bsp/renesas/ra6m4-iot/docs/\344\275\277\347\224\250\347\221\236\350\220\250FSP\351\205\215\347\275\256\345\267\245\345\205\267.md" +++ /dev/null @@ -1,329 +0,0 @@ -## 在 MDK 中使用 FSP - -### 添加RA Smart Config - -1. 打开 MDK，选择 “Tools -> Customize Tools Menu…” -2. 点击 “new” 图标，添加一条自定义命令: RA Smart Configurator -3. Command 输入工具的安装路径， 点击“**…**”找到安装路径下的“rasc.exe”文件并选中 (rasc 安装目录下) -4. Initial Folder 输入参数: $P -5. Arguments 输入参数: --device $D --compiler ARMv6 configuration.xml -6. 点击 OK 保存命令 - -![img](picture/customize.png) - -7. 点击添加的命令 “Tools -> RA smart Configurator”，**打开配置工具**：RA Smart Config - -![image.png](picture/openrasc.png) - -### 添加 Device Partition Manager，添加步骤同上。 - -1. 输入命令名称:`Device Partition Manager` -2. Command: 在安装路径选中`rasc.exe` -3. Initial Folder :`$P` -4. Arguments:`-application com.renesas.cdt.ddsc.dpm.ui.dpmapplication configuration.xml "SL%L"` - -> PS：以上相关操作也可以在 FSP 的说明文档中找到。 -> -> 文档路径（本地）：在 FSP 的安装目录下 .\fsp_documentation\v3.5.0\fsp_user_manual_v3.5.0\index.html -> -> 文档路径（官网）：https://www2.renesas.cn/jp/zh/software-tool/flexible-software-package-fsp#document - -### FSP 版本选择 - -此 BSP 已更新 **FSP 3.5.0** 版本的支持，请使用 **FSP 3.5.0** 版本进行配置修改。下文中部分操作截图使用的是 FSP 3.1.0 版本，仅供参考。 - -**使用 RASC 前请务必检查 FSP version 、Board、Device 配置项是否正确。** - -![fsp_version](picture/fsp_version.png) - -## 更新工程配置 - -使用 FSP 配置完成后如果有新的文件添加进工程中，不会马上添加进去。需要先编译一次，如果弹出如下提醒，选择 “是” 然后再次编译即可。 - -![img](picture/import_changes.png) - -## 如何使用 RASC 添加外设 - -**注意：文档中的外设添加步骤均为单独配置的说明，排版顺序不代表外设添加顺序，如遇到引脚冲突请查阅开发板及芯片手册的相关章节。** - -### UART - -如何添加一个 UART 端口外设配置？ - -1. 选择 Stacks 配置页，点击 New Stack 找到 UART。 - -![image.png](picture/rascuart.png) - -2. 配置 UART 参数，因为需要适配 RT-Thread 驱动中使用的命名，所以需要修改命名，设置**name** 、**channel** 、**callback** 是一致的标号。![image.png](picture/rascuart1.png) - -### GPIO 中断 - -如何添加一个 IO 中断？ - -1. 选择引脚编号，进入配置，比如选择 P105 做为中断引脚。可先找到引脚查看可配置成的 IRQx 通道号。 - -![image-20211103200949759](picture/p105.png) - -2. 打开 ICU 中断通道 IRQ00 - -![image-20211103200813467](picture/irq0.png) - -3. 创建 stack 并进入配置。因为需要适配 RT-Thread 驱动中使用的命名，所以需要修改命名，设置**name** 、**channel** 、**callback** 是一致的标号。选择你希望的触发方式，最后保存配置，生成配置代码。 - -![](picture/1635929089445.png) - -![image-20211103201047103](picture/irq1.png) - -4. 测试中断是否成功开启 - - ```c - #define IRQ_TEST_PIN "p105" - void irq_callback_test(void *args) - { - rt_kprintf("\n IRQ00 triggered \n"); - } - - void icu_sample(void) - { - /* init */ - rt_uint32_t pin = rt_pin_get(IRQ_TEST_PIN); - rt_kprintf("\n pin number : 0x%04X \n", pin); - rt_err_t err = rt_pin_attach_irq(pin, PIN_IRQ_MODE_RISING, irq_callback_test, RT_NULL); - if(RT_EOK != err) - { - rt_kprintf("\n attach irq failed. \n"); - } - err = rt_pin_irq_enable(pin, PIN_IRQ_ENABLE); - if(RT_EOK != err) - { - rt_kprintf("\n enable irq failed. \n"); - } - } - MSH_CMD_EXPORT(icu_sample, icu sample); - ``` - -### WDT - -1. 创建 WDT - -![image-20211019152302939](picture/wdt.png) - -2. 配置 WDT，需要注意在 RT-Thread 中只使用了一个 WDT 设备，所以没有对其进行编号，如果是新创建的 WDT 设备需要注意 name 字段，在驱动中默认使用的是`g_wdt` 。 - -![image-20211019152407572](picture/wdt_config.png) - -3. 如何在 ENV 中打开 WDT 以及[WDT 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/watchdog/watchdog) - -![image-20211027183406251](picture/wdt_env.png) - -### RTC - -1. 添加 RTC 设备 - -![image-20211019152536749](picture/rtc.png) - -2. 配置 RTC，需要注意在 RT-Thread 中只是用了一个 RTC 设备，所以没有对其进行编号，如果是新创建的 RTC 设备需要注意 name 字段，在驱动中默认使用的是`g_rtc` 。修改 Callback 为 rtc_callback - -![image-20211019152627412](picture/rtc_config.png) - -3. 如何在 ENV 中打开 RTC 以及[ RTC 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/rtc/rtc) - -![image-20211027181550233](picture/rtc_env.png) - -### Flash - -1. 创建 Flash - -![image-20211026105031200](picture/add_flash.png) - -2. 配置 Flash，需要注意在 RT-Thread 中只使用了一个 flash 设备，所以没有对其进行编号，如果是新创建的 flash 设备需要注意 name 字段，在驱动中默认使用的是`g_flash` 。 - -![image-20211026105628706](picture/config_flash.png) - -3. 如何在 ENV 中打开 Flash - -![image-20211026123252310](picture/flash_menuconfig.png) - -### SPI - -1. 添加一个 SPI 外设端口 - -![image-20211027180820968](picture/spi_add.png) - -2. 配置 channel、name、Clock Phase、Clock Polarity、Callback、 SPI Mode 等参数，波特率在代码中可通过 API 修改，这里可以设置一个默认值。 - -![img](picture/spi.png) - -3. 在 Pins 中打开 SPI0 ，配置端口引脚。**注意：请勿在此处配置 SSLx 片选引脚，片选引脚的控制在驱动程序中由软件控制。** - -![image-20211209162334093](picture/spi_pin.png) - - -4. 如何在 ENV 中打开 SPI 以及 [SPI 接口使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/spi/spi) - - ![image-20211027181444023](picture/spi_env.png) - -### ADC/DAC - -创建 ADC/DAC - -![img](picture/adc_dac.png) - -- **ADC** - -1. 配置 name、unit、mode，选择扫描的通道编号 - -![img](picture/adc_config.png) - -2. 配置扫描通道对应的引脚 - -![img](picture/adc_config1.png) - -3. 在 menuconfig 中打开对应的通道 - -- **DAC** - -1. 需要先关闭 P014 的默认 mode - -![img](picture/dac_config0.png) - -2. 开启 DAC0 通道 - -![img](picture/dac_config1.png) - -3. 修改通道号为 0，与 DAC0 对应 - -![img](picture/dac_config2.png) - -4. 在 menuconfig 中打开对应的通道 - -### 通用 PWM 定时器（GPT） - -GPT 定时器在该芯片中可作为通用定时器，也可以用于产生 PWM 信号。在将其用于产生 PWM 信号时，GPT 定时器提供了 gpt0 - gpt9 总共 10 个通道，每个通道可以设定两个输出端口。当前版本的 PWM 驱动将每个通道都看做一个单独的 PWM 设备，每个设备都只有一个通道。用户可以选择开启一个通道的任意一个输出端口，或将两个端口均开启，但在同时开启两个端口的情况下，它们输出的波形将完全一致。 - -1. 添加 GPT 设备 - - ![img](./picture/add_gpt1.png) -2. 配置通道 - - ![img](./picture/add_gpt2.png) - - 对 GPT 较为关键的配置如图所示，具体解释如下： - - 1. 将``Common`` ->``Pin Output Support`` 设置为 Enable ，以开启 PWM 波形的输出。 - 2. 指定 GPT 通道，并根据通道数指定 GPT 的名称，例如此处指定 GPT 通道 3 ，所以 GPT 的名称必须为``g_timer3``。并且将定时器模式设置为 PWM ，并指定每个 PWM 周期的计数值。 - 3. 设定 PWM 通道默认输出的占空比，这里为 50% 。 - 4. 设定 GPT 通道下两个输出端口的使能状态。 - 5. 此处设置 GPT 通道下两个输出端口各自对应的引脚。 -3. 配置输出引脚 - - ![img](./picture/add_gpt3.png) - - 在完成上一步对 GPT 定时器的设置后，根据图示找到对应 GPT 通道输出引脚设置的界面（这里是 GPT3），将图中标号 **1** 处设置为 ``GTIOCA or GTIOCB`` ，并根据需要在图中标号 **2** 处设置 GPT 通道下两个输出端口各自对应的输出引脚。 - - 4. 在 menuconfig 中打开对应的通道，[RT-Thread 的 pwm 框架介绍](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/pwm/pwm) - - ![image-20211103202216381](picture/pwm_env.png) - -### SDHI - -1. 添加sdhi驱动 - -![添加sdhi驱动](picture/sdhi_config.png) - -2. 添加DMAC - - ![添加DMAC](picture/dmac_config.png) - -3. 设置DMAC中断 - - ![设置DMAC中断](picture/dmac_int.png) - -4. 设置SDHI中断和引脚 - - ![设置SDHI](picture/sdhi_config1.png) - -5. 在ENV中打开SDHI - - ![打开SDHI](picture/sdhi_env.png) - -6. 在ENV中配置DFS，添加文件系统，如FatFS - - ![配置DFS](picture/sdhi_dfs.png) - -7. 在命令行中，使用 `mkfs sd0 -t elm` 格式化sd卡 - -8. 在命令行中，使用 `mount sd0 / elm` 将sd0挂载到 `/` - -9. 参考RT-Thread DFS使用手册[虚拟文件系统 (rt-thread.org)](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/filesystem/filesystem) - -### CAN - -1. 添加CAN - -![image-20211102145023112](picture/can.png) - -2. 配置Callback为 `can0_callback` 或 `can1_callback` - -![image-20211102145227603](picture/can_callback.png) - -3. 配置其他选项，并生成代码。 - -4. 使用ENV使能CAN。[CAN设备使用说明](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/can/can) - -![image-20211102145613309](picture/can_menuconfig.png) - - -### 使用 WiFi 模块 [RW007 ](https://github.com/RT-Thread-packages/rw007) - -1. 软件包配置中找到 RW007，并修改为下图配置 - -![image-20211108142805319](picture/rw007_pkg.png) - -2. menuconfig 中打开驱动的 RW007 配置，默认使用了 SPI1 端口。所以需要打开 SPI1 总线。 - -![image-20211108142453678](picture/rw007_spi.png) - -![image-20211213212034701](picture/drv_rw007.png) - -3. 在设备驱动框架中打开 [WLAN 框架](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/wlan/wlan)， - -![image-20211108143027485](picture/rw007_wlan.png) - -在网络配置中打开 NETDEV 组件： - -![image-20211108143712513](picture/rw007_netdev.png) - -在 kernel 中打开 mempool 配置： - -![image-20211209161902884](picture/rw007_mempool.png) - -4. FSP 中打开添加 SPI 外设端口，[如何添加SPI](#SPI)。下图以 SPI1 端口为例的配置如下： - -![image-20211108183631379](picture/rw007_spicfg.png) - -5. RW007 有一个从机控制的 INT 引脚，需要占用一个 IRQ 通道，下图以 P506 为例的配置如下： - -![image-20211108183724282](picture/rw007_int.png) - -6. RW007 的 RESET 控制引脚修改默认配置，这里在 RASC 中 mode 设为关闭，交由 RW007 中进行控制。 - -![image-20211213144108558](picture/rw007_reset.png) - -7. 配置完成，检查 MDK 工程中是否加入了必要的文件 - -![image-20211109102232233](picture/rw007_mdk.png) - -8. 编译下载，验证结果。 - -系统启动会自动获取 RW007 的信息，输入`wifi scan` 命令扫描环境中的 WiFi 信号。[更多 WiFi 命令](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/wlan/wlan?id=finsh-%e5%91%bd%e4%bb%a4) - -![image-20211109103856130](picture/rw007_test.png) - -使用 `WiFi join` 命令连接 WiFi 热点 ： - -![image-20211109104735733](picture/rw007_wifijoin.png) - -使用 `ping rt-thread.com` 测试网络连接： - -![image-20211109104700939](picture/rw007_ping.png) \ No newline at end of file diff --git a/bsp/renesas/ra6m4-iot/drivers/Kconfig b/bsp/renesas/ra6m4-iot/drivers/Kconfig deleted file mode 100644 index 9909f61168..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/Kconfig +++ /dev/null @@ -1,274 +0,0 @@ -menu "Hardware Drivers Config" - - config SOC_SERIES_R7FA6M4AF - bool - select RT_USING_COMPONENTS_INIT - select RT_USING_USER_MAIN - default y - - menu "Onboard Peripheral Drivers" - - endmenu - - menu "On-chip Peripheral Drivers" - - config BSP_USING_GPIO - bool "Enable GPIO" - select RT_USING_PIN - default y - - config BSP_USING_ONCHIP_FLASH - bool "Enable Onchip FLASH" - default n - - config BSP_USING_WDT - bool "Enable Watchdog Timer" - select RT_USING_WDT - default n - - menuconfig BSP_USING_UART - bool "Enable UART" - default y - select RT_USING_SERIAL - select RT_USING_SERIAL_V2 - if BSP_USING_UART - menuconfig BSP_USING_UART6 - bool "Enable UART6 (Console)" - default y - if BSP_USING_UART6 - config BSP_UART6_RX_USING_DMA - bool "Enable UART6 RX DMA" - depends on BSP_USING_UART6 && RT_SERIAL_USING_DMA - default n - - config BSP_UART6_TX_USING_DMA - bool "Enable UART6 TX DMA" - depends on BSP_USING_UART6 && RT_SERIAL_USING_DMA - default n - - config BSP_UART6_RX_BUFSIZE - int "Set UART6 RX buffer size" - range 64 65535 - depends on RT_USING_SERIAL_V2 - default 256 - - config BSP_UART6_TX_BUFSIZE - int "Set UART6 TX buffer size" - range 0 65535 - depends on RT_USING_SERIAL_V2 - default 0 - endif - menuconfig BSP_USING_UART7 - bool "Enable UART7 (Console)" - default n - if BSP_USING_UART7 - config BSP_UART7_RX_USING_DMA - bool "Enable UART7 RX DMA" - depends on BSP_USING_UART7 && RT_SERIAL_USING_DMA - default n - - config BSP_UART7_TX_USING_DMA - bool "Enable UART7 TX DMA" - depends on BSP_USING_UART7 && RT_SERIAL_USING_DMA - default n - - config BSP_UART7_RX_BUFSIZE - int "Set UART7 RX buffer size" - range 64 65535 - depends on RT_USING_SERIAL_V2 - default 256 - - config BSP_UART7_TX_BUFSIZE - int "Set UART7 TX buffer size" - range 0 65535 - depends on RT_USING_SERIAL_V2 - default 0 - endif - endif - - menuconfig BSP_USING_I2C - bool "Enable I2C BUS" - default n - select RT_USING_I2C - select RT_USING_I2C_BITOPS - select RT_USING_PIN - if BSP_USING_I2C - menuconfig BSP_USING_I2C1 - bool "Enable I2C1 BUS (software simulation)" - default y - if BSP_USING_I2C1 - config BSP_I2C1_SCL_PIN - hex "i2c1 scl pin number" - range 0x0000 0x0B0F - default 0x0512 - config BSP_I2C1_SDA_PIN - hex "I2C1 sda pin number" - range 0x0000 0x0B0F - default 0x0511 - endif - endif - - menuconfig BSP_USING_ONCHIP_RTC - bool "Enable RTC" - select RT_USING_RTC - default n - if BSP_USING_ONCHIP_RTC - endif - - menuconfig BSP_USING_SPI - bool "Enable SPI BUS" - default n - select RT_USING_SPI - if BSP_USING_SPI - config BSP_SPI_USING_DTC_DMA - bool "Enable SPI DTC transfers data without using the CPU." - default n - - config BSP_USING_SPI0 - bool "Enable SPI0 BUS" - default n - - config BSP_USING_SPI1 - bool "Enable SPI1 BUS" - default n - endif - - menuconfig BSP_USING_ADC - bool "Enable ADC" - default n - select RT_USING_ADC - if BSP_USING_ADC - config BSP_USING_ADC0 - bool "Enable ADC0" - default n - - config BSP_USING_ADC1 - bool "Enable ADC1" - default n - endif - - menuconfig BSP_USING_DAC - bool "Enable DAC" - default n - select RT_USING_DAC - if BSP_USING_DAC - config BSP_USING_DAC0 - bool "Enable DAC0" - default n - - config BSP_USING_DAC1 - bool "Enable DAC1" - default n - endif - - menuconfig BSP_USING_PWM - bool "Enable PWM" - default n - select RT_USING_PWM - if BSP_USING_PWM - config BSP_USING_PWM0 - bool "Enable GPT0 (32-Bits) output PWM" - default n - - config BSP_USING_PWM1 - bool "Enable GPT1 (32-Bits) output PWM" - default n - - config BSP_USING_PWM2 - bool "Enable GPT2 (32-Bits) output PWM" - default n - - config BSP_USING_PWM3 - bool "Enable GPT3 (32-Bits) output PWM" - default n - - config BSP_USING_PWM4 - bool "Enable GPT4 (16-Bits) output PWM" - default n - - config BSP_USING_PWM5 - bool "Enable GPT5 (16-Bits) output PWM" - default n - - config BSP_USING_PWM6 - bool "Enable GPT6 (16-Bits) output PWM" - default n - - config BSP_USING_PWM7 - bool "Enable GPT7 (16-Bits) output PWM" - default n - - config BSP_USING_PWM8 - bool "Enable GPT8 (16-Bits) output PWM" - default n - - config BSP_USING_PWM9 - bool "Enable GPT9 (16-Bits) output PWM" - default n - endif - - menuconfig BSP_USING_SDHI - bool "Enable SDHI" - default n - select RT_USING_SDIO - select RT_USING_DFS - select RT_LIBC_USING_FILEIO - select RT_USING_POSIX - if BSP_USING_SDHI - config SDHI_USING_1_BIT - bool "Use 1-bit Mode(4-bit when disable)" - default y - endif - - menuconfig BSP_USING_CAN - bool "Enable CAN" - default n - select RT_USING_CAN - if BSP_USING_CAN - config BSP_USING_CAN0 - bool "Enable CAN0" - default n - - config BSP_USING_CAN1 - bool "Enable CAN1" - default n - endif - - endmenu - - menu "Board extended module Drivers" - - menuconfig BSP_USING_RW007 - bool "Enable RW007" - default n - select PKG_USING_RW007 - select BSP_USING_SPI - - if BSP_USING_RW007 - config RA_RW007_SPI_BUS_NAME - string "RW007 BUS NAME" - default "spi1" - - config RA_RW007_CS_PIN - hex "(HEX)CS pin index" - default 0x040D - - config RA_RW007_BOOT0_PIN - hex "(HEX)BOOT0 pin index (same as spi clk pin)" - default 0x040C - - config RA_RW007_BOOT1_PIN - hex "(HEX)BOOT1 pin index (same as spi cs pin)" - default 0x040D - - config RA_RW007_INT_BUSY_PIN - hex "(HEX)INT/BUSY pin index" - default 0x0506 - - config RA_RW007_RST_PIN - hex "(HEX)RESET pin index" - default 0x040F - endif - - endmenu -endmenu diff --git a/bsp/renesas/ra6m4-iot/drivers/SConscript b/bsp/renesas/ra6m4-iot/drivers/SConscript deleted file mode 100644 index ee97c6f0d3..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/SConscript +++ /dev/null @@ -1,58 +0,0 @@ -Import('RTT_ROOT') -Import('rtconfig') -from building import * - -cwd = GetCurrentDir() - -# add the general drivers. -src = Split(""" - drv_common.c -""") - -if GetDepend(['BSP_USING_UART']): - if GetDepend(['RT_USING_SERIAL_V2']): - src += ['drv_usart_v2.c'] - else: - print("\nThe current project does not support serial-v1\n") - Return('group') - -if GetDepend(['BSP_USING_GPIO']): - src += ['drv_gpio.c'] - -if GetDepend(['BSP_USING_WDT']): - src += ['drv_wdt.c'] - -if GetDepend(['BSP_USING_ONCHIP_RTC']): - src += ['drv_rtc.c'] - -if GetDepend(['BSP_USING_I2C', 'RT_USING_I2C_BITOPS']): - if GetDepend('BSP_USING_I2C0') or GetDepend('BSP_USING_I2C1'): - src += ['drv_soft_i2c.c'] - -if GetDepend(['BSP_USING_SPI']): - src += ['drv_spi.c'] - -if GetDepend(['BSP_USING_ADC']): - src += ['drv_adc.c'] - -if GetDepend(['BSP_USING_DAC']): - src += ['drv_dac.c'] - -if GetDepend(['BSP_USING_ONCHIP_FLASH']): - src += ['drv_flash.c'] - -if GetDepend(['BSP_USING_PWM']): - src += ['drv_pwm.c'] - -if GetDepend(['BSP_USING_CAN']): - src += ['drv_can.c'] - -if GetDepend(['BSP_USING_SDHI']): - src += ['drv_sdhi.c'] - -path = [cwd] -path += [cwd + '/config'] - -group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path) - -Return('group') diff --git a/bsp/renesas/ra6m4-iot/drivers/board.h b/bsp/renesas/ra6m4-iot/drivers/board.h deleted file mode 100644 index 999e4749fe..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/board.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-10 Sherman first version - */ - -#ifndef __BOARD_H__ -#define __BOARD_H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#define RA_SRAM_SIZE 256 -#define RA_SRAM_END (0x20000000 + RA_SRAM_SIZE * 1024) - -#ifdef __ARMCC_VERSION -extern int Image$$RAM_END$$ZI$$Base; -#define HEAP_BEGIN ((void *)&Image$$RAM_END$$ZI$$Base) -#elif __ICCARM__ -#pragma section="CSTACK" -#define HEAP_BEGIN (__segment_end("CSTACK")) -#else -extern int __RAM_segment_used_end__; -#define HEAP_BEGIN (&__RAM_segment_used_end__) -#endif - -#define HEAP_END RA_SRAM_END - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/bsp/renesas/ra6m4-iot/drivers/config/drv_config.h b/bsp/renesas/ra6m4-iot/drivers/config/drv_config.h deleted file mode 100644 index bb57d8079c..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/config/drv_config.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#ifndef __DRV_CONFIG_H__ -#define __DRV_CONFIG_H__ - -#include "board.h" -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef SOC_SERIES_R7FA6M4AF -#include "ra6m4/uart_config.h" - -#ifdef BSP_USING_ADC -#include "ra6m4/adc_config.h" -#endif - -#ifdef BSP_USING_DAC -#include "ra6m4/dac_config.h" -#endif - -#ifdef BSP_USING_PWM -#include "ra6m4/pwm_config.h" -#endif - -#ifdef BSP_USING_CAN -#include "ra6m4/can_config.h" -#endif - -#endif/* SOC_SERIES_R7FA6M4AF */ - -#ifdef __cplusplus -} -#endif - -#endif/* __DRV_CONFIG_H__ */ diff --git a/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/adc_config.h b/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/adc_config.h deleted file mode 100644 index 4575d4dff1..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/adc_config.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-19 Mr.Tiger first version - */ - -#ifndef __ADC_CONFIG_H__ -#define __ADC_CONFIG_H__ - -#include -#include -#include "hal_data.h" -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1) -struct ra_adc_map -{ - char name; - const adc_cfg_t *g_cfg; - const adc_instance_ctrl_t *g_ctrl; - const adc_channel_cfg_t *g_channel_cfg; -}; - -struct ra_dev -{ - rt_adc_device_t ra_adc_device_t; - struct ra_adc_map *ra_adc_dev; -}; -#endif -#endif - -#ifdef __cplusplus -} -#endif - diff --git a/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/can_config.h b/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/can_config.h deleted file mode 100644 index 8bd3dd5600..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/can_config.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-29 mazhiyuan first version - */ - -#ifndef __CAN_CONFIG_H__ -#define __CAN_CONFIG_H__ - -#include -#include "hal_data.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(BSP_USING_CAN0) -#ifndef CAN0_CONFIG -#define CAN0_CONFIG \ - { \ - .name = "can0", \ - .num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can0, \ - .p_api_ctrl = &g_can0_ctrl, \ - .p_cfg = &g_can0_cfg, \ - } -#endif /* CAN0_CONFIG */ -#endif /* BSP_USING_CAN0 */ - -#if defined(BSP_USING_CAN1) -#ifndef CAN1_CONFIG -#define CAN1_CONFIG \ - { \ - .name = "can1", \ - .num_of_mailboxs = CAN_NO_OF_MAILBOXES_g_can1, \ - .p_api_ctrl = &g_can1_ctrl, \ - .p_cfg = &g_can1_cfg, \ - } -#endif /* CAN1_CONFIG */ -#endif /* BSP_USING_CAN1 */ - -#ifdef __cplusplus -} -#endif -#endif diff --git a/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/dac_config.h b/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/dac_config.h deleted file mode 100644 index 0765a8c228..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/dac_config.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-19 Mr.Tiger first version - */ - -#ifndef __DAC_CONFIG_H__ -#define __DAC_CONFIG_H__ - -#include -#include -#include "hal_data.h" -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef BSP_USING_DAC -struct ra_dac_map -{ - char name; - const struct st_dac_cfg *g_cfg; - const struct st_dac_instance_ctrl *g_ctrl; -}; - -struct ra_dac_dev -{ - rt_dac_device_t ra_dac_device_t; - struct ra_dac_map *ra_dac_map_dev; -}; -#endif - -#endif - -#ifdef __cplusplus -} -#endif - diff --git a/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/pwm_config.h b/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/pwm_config.h deleted file mode 100644 index 9dd5f01e54..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/pwm_config.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-26 KevinXu first version - */ -#ifndef __PWM_CONFIG_H__ -#define __PWM_CONFIG_H__ - -#include -#include -#include "hal_data.h" - -#ifdef __cplusplus -extern "C" { -#endif - -enum -{ -#ifdef BSP_USING_PWM0 - BSP_PWM0_INDEX, -#endif -#ifdef BSP_USING_PWM1 - BSP_PWM1_INDEX, -#endif -#ifdef BSP_USING_PWM2 - BSP_PWM2_INDEX, -#endif -#ifdef BSP_USING_PWM3 - BSP_PWM3_INDEX, -#endif -#ifdef BSP_USING_PWM4 - BSP_PWM4_INDEX, -#endif -#ifdef BSP_USING_PWM5 - BSP_PWM5_INDEX, -#endif -#ifdef BSP_USING_PWM6 - BSP_PWM6_INDEX, -#endif -#ifdef BSP_USING_PWM7 - BSP_PWM7_INDEX, -#endif -#ifdef BSP_USING_PWM8 - BSP_PWM8_INDEX, -#endif -#ifdef BSP_USING_PWM9 - BSP_PWM9_INDEX, -#endif - BSP_PWMS_NUM -}; - -#define PWM_DRV_INITIALIZER(num) \ - { \ - .name = "pwm"#num , \ - .g_cfg = &g_timer##num##_cfg, \ - .g_ctrl = &g_timer##num##_ctrl, \ - .g_timer = &g_timer##num, \ - } - -#ifdef __cplusplus -} -#endif - -#endif /* __PWM_CONFIG_H__ */ diff --git a/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/uart_config.h b/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/uart_config.h deleted file mode 100644 index 2dd3ba6510..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/config/ra6m4/uart_config.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#ifndef __UART_CONFIG_H__ -#define __UART_CONFIG_H__ - -#include -#include "hal_data.h" - -#ifdef __cplusplus -extern "C" { -#endif - -#if defined(BSP_USING_UART6) -#ifndef UART6_CONFIG -#define UART6_CONFIG \ - { \ - .name = "uart6", \ - .p_api_ctrl = &g_uart6_ctrl, \ - .p_cfg = &g_uart6_cfg, \ - } -#endif /* UART6_CONFIG */ -#endif /* BSP_USING_UART6 */ - -#if defined(BSP_USING_UART7) -#ifndef UART7_CONFIG -#define UART7_CONFIG \ - { \ - .name = "uart7", \ - .p_api_ctrl = &g_uart7_ctrl, \ - .p_cfg = &g_uart7_cfg, \ - } -#endif /* UART7_CONFIG */ -#endif /* BSP_USING_UART7 */ - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_adc.c b/bsp/renesas/ra6m4-iot/drivers/drv_adc.c deleted file mode 100644 index 9fd734d922..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_adc.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-19 Mr.Tiger first version - */ - -#include "drv_config.h" -#ifdef RT_USING_ADC - -// #define DRV_DEBUG -#define DBG_TAG "drv.adc" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ -#include - -struct ra_adc_map ra_adc[] = -{ -#if defined(BSP_USING_ADC0) - {'0', &g_adc0_cfg, &g_adc0_ctrl, &g_adc0_channel_cfg}, -#endif - -#if defined(BSP_USING_ADC1) - {'1', &g_adc1_cfg, &g_adc1_ctrl, &g_adc1_channel_cfg}, -#endif -}; - -#if defined(BSP_USING_ADC0) -struct rt_adc_device adc0_device; -struct ra_dev _ra_adc0_device = {.ra_adc_device_t = &adc0_device, .ra_adc_dev = &ra_adc[0]}; -#endif - -#if defined(BSP_USING_ADC1) -struct rt_adc_device adc1_device; -struct ra_dev _ra_adc1_device = {.ra_adc_device_t = &adc1_device, .ra_adc_dev = &ra_adc[1]}; -#endif - -static rt_err_t ra_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled) -{ - RT_ASSERT(device != RT_NULL); - struct ra_adc_map *adc = (struct ra_adc_map *)device->parent.user_data; - /**< start adc*/ - if (enabled) - { - if (FSP_SUCCESS != R_ADC_ScanStart((adc_ctrl_t *)adc->g_ctrl)) - { - LOG_E("start adc%c failed.", adc->name); - return -RT_ERROR; - } - } - else - { - /**< stop adc*/ - if (FSP_SUCCESS != R_ADC_ScanStop((adc_ctrl_t *)adc->g_ctrl)) - { - LOG_E("stop adc%c failed.", adc->name); - return -RT_ERROR; - } - } - return RT_EOK; -} - -rt_err_t ra_adc_close(struct rt_adc_device *device) -{ - RT_ASSERT(device != RT_NULL); - struct ra_adc_map *adc = (struct ra_adc_map *)(struct ra_adc_map *)device->parent.user_data; - if (FSP_SUCCESS != R_ADC_Close((adc_ctrl_t *)adc->g_ctrl)) - { - LOG_E("close adc%c failed.", adc->name); - return -RT_ERROR; - } - return RT_EOK; -} - -static rt_err_t ra_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value) -{ - RT_ASSERT(device != RT_NULL); - struct ra_adc_map *adc = (struct ra_adc_map *)device->parent.user_data; - if (RT_EOK != R_ADC_Read32((adc_ctrl_t *)adc->g_ctrl, channel, value)) - { - LOG_E("get adc value failed.\n"); - return -RT_ERROR; - } - return RT_EOK; -} - -static const struct rt_adc_ops ra_adc_ops = -{ - .enabled = ra_adc_enabled, - .convert = ra_get_adc_value, -}; - -static int ra_adc_init(void) -{ -#if defined(BSP_USING_ADC0) - R_ADC_Open((adc_ctrl_t *)_ra_adc0_device.ra_adc_dev->g_ctrl, - (adc_cfg_t const * const)_ra_adc0_device.ra_adc_dev->g_cfg); - - R_ADC_ScanCfg((adc_ctrl_t *)_ra_adc0_device.ra_adc_dev->g_ctrl, - (adc_cfg_t const * const)_ra_adc0_device.ra_adc_dev->g_channel_cfg); - - if (RT_EOK != rt_hw_adc_register(_ra_adc0_device.ra_adc_device_t, "adc0", &ra_adc_ops, (void *)_ra_adc0_device.ra_adc_dev)) - { - LOG_E("adc0 register failed"); - return -RT_ERROR; - } -#endif - -#if defined(BSP_USING_ADC1) - R_ADC_Open((adc_ctrl_t *)_ra_adc1_device.ra_adc_dev->g_ctrl, - (adc_cfg_t const * const)_ra_adc1_device.ra_adc_dev->g_cfg); - - R_ADC_ScanCfg((adc_ctrl_t *)_ra_adc1_device.ra_adc_dev->g_ctrl, - (adc_cfg_t const * const)_ra_adc1_device.ra_adc_dev->g_channel_cfg); - - if (RT_EOK != rt_hw_adc_register(_ra_adc1_device.ra_adc_device_t, "adc1", &ra_adc_ops, (void *)_ra_adc1_device.ra_adc_dev)) - { - LOG_E("adc1 register failed"); - return -RT_ERROR; - } -#endif - - return RT_EOK; -} -INIT_BOARD_EXPORT(ra_adc_init); -#endif diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_can.c b/bsp/renesas/ra6m4-iot/drivers/drv_can.c deleted file mode 100644 index f87e0d9155..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_can.c +++ /dev/null @@ -1,310 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-29 mazhiyuan first version - */ - -#include "drv_can.h" - -static struct ra_can_config can_config[] = -{ -#ifdef BSP_USING_CAN0 - CAN0_CONFIG, -#endif - -#ifdef BSP_USING_CAN1 - CAN1_CONFIG -#endif -}; - -enum -{ -#ifdef BSP_USING_CAN0 - CAN0_INDEX, -#endif - -#ifdef BSP_USING_CAN1 - CAN1_INDEX, -#endif -}; - -static struct ra_can can_obj[sizeof(can_config) / sizeof(can_config[0])] = {0}; - -static const struct ra_baud_rate_tab can_baud_rate_tab[] = -{ - {CAN1MBaud, 3, 6, 3, 1 + 4}, - {CAN800kBaud, 4, 15, 5, 1 + 2}, - {CAN500kBaud, 4, 14, 5, 1 + 4}, - {CAN250kBaud, 4, 14, 5, 1 + 9}, - {CAN125kBaud, 4, 14, 5, 1 + 19}, - {CAN100kBaud, 4, 14, 5, 1 + 24}, - {CAN50kBaud, 4, 14, 5, 1 + 49}, - {CAN20kBaud, 4, 14, 5, 1 + 124}, - {CAN10kBaud, 4, 14, 5, 1 + 249} -}; - -static rt_uint32_t get_can_baud_index(rt_uint32_t baud) -{ - rt_uint32_t len, index; - - len = sizeof(can_baud_rate_tab) / sizeof(can_baud_rate_tab[0]); - for (index = 0; index < len; index++) - { - if (can_baud_rate_tab[index].baud_rate == baud) - return index; - } - - return 0; /* default baud is CAN1MBaud */ -} - -static void ra_can_get_config(void) -{ - struct can_configure config = CANDEFAULTCONFIG; -#ifdef BSP_USING_CAN0 - can_obj[CAN0_INDEX].can_dev.config = config; - can_obj[CAN0_INDEX].can_dev.config.msgboxsz = CAN_NO_OF_MAILBOXES_g_can0; - can_obj[CAN0_INDEX].can_dev.config.sndboxnumber = 1; - can_obj[CAN0_INDEX].can_dev.config.ticks = 50; -#endif -#ifdef BSP_USING_CAN1 - can_obj[CAN1_INDEX].can_dev.config = config; - can_obj[CAN1_INDEX].can_dev.config.msgboxsz = CAN_NO_OF_MAILBOXES_g_can1; - can_obj[CAN1_INDEX].can_dev.config.sndboxnumber = 1; - can_obj[CAN1_INDEX].can_dev.config.ticks = 50; -#endif -} -rt_err_t ra_can_configure(struct rt_can_device *can_dev, struct can_configure *cfg) -{ - struct ra_can *can; - RT_ASSERT(can_dev != RT_NULL); - RT_ASSERT(cfg != RT_NULL); - - fsp_err_t err = FSP_SUCCESS; - - can = rt_container_of(can_dev, struct ra_can, can_dev); - RT_ASSERT(can != RT_NULL); - err = R_CAN_Open(can->config->p_api_ctrl, can->config->p_cfg); - if (FSP_SUCCESS != err) - { - return RT_ERROR; - } - return RT_EOK; -} -rt_err_t ra_can_control(struct rt_can_device *can_dev, int cmd, void *arg) -{ - struct ra_can *can; - can_info_t can_info; - rt_uint32_t argval; - RT_ASSERT(can_dev != RT_NULL); - can = rt_container_of(can_dev, struct ra_can, can_dev); - switch (cmd) - { - case RT_DEVICE_CTRL_CLR_INT: - R_BSP_IrqStatusClear((IRQn_Type)arg); - break; - case RT_CAN_CMD_SET_BAUD: - argval = (rt_uint32_t) arg; - if (argval != CAN1MBaud && - argval != CAN800kBaud && - argval != CAN500kBaud && - argval != CAN250kBaud && - argval != CAN125kBaud && - argval != CAN100kBaud && - argval != CAN50kBaud && - argval != CAN20kBaud && - argval != CAN10kBaud) - { - return -RT_ERROR; - } - if (argval != can->can_dev.config.baud_rate) - { - can->can_dev.config.baud_rate = argval; - uint32_t index = get_can_baud_index(argval); - can->config->p_cfg->p_bit_timing->baud_rate_prescaler = can_baud_rate_tab[index].prescaler; - can->config->p_cfg->p_bit_timing->synchronization_jump_width = can_baud_rate_tab[index].sjw; - can->config->p_cfg->p_bit_timing->time_segment_1 = can_baud_rate_tab[index].ts1; - can->config->p_cfg->p_bit_timing->time_segment_2 = can_baud_rate_tab[index].ts2; - return ra_can_configure(&can->can_dev, &can->can_dev.config); - } - break; - case RT_CAN_CMD_SET_MODE: - argval = (rt_uint32_t) arg; - if (argval != RT_CAN_MODE_NORMAL && - argval != RT_CAN_MODE_LISEN && - argval != RT_CAN_MODE_LOOPBACK) - { - return -RT_ERROR; - } - if (argval != can->can_dev.config.mode) - { - can_test_mode_t mode_to_set; - can->can_dev.config.mode = argval; - switch (argval) - { - case RT_CAN_MODE_NORMAL: - mode_to_set = CAN_TEST_MODE_DISABLED; - case RT_CAN_MODE_LISEN: - mode_to_set = CAN_TEST_MODE_LISTEN; - case RT_CAN_MODE_LOOPBACK: - mode_to_set = CAN_TEST_MODE_LOOPBACK_INTERNAL; - } - R_CAN_ModeTransition(can->config->p_api_ctrl, ((can_instance_ctrl_t *)(can->config->p_api_ctrl))->operation_mode, mode_to_set); - } - break; - case RT_CAN_CMD_GET_STATUS: - R_CAN_InfoGet(can->config->p_api_ctrl, &can_info); - can->can_dev.status.rcverrcnt = can_info.error_count_receive; - can->can_dev.status.snderrcnt = can_info.error_count_transmit; - can->can_dev.status.errcode = can_info.error_code; - rt_memcpy(arg, &can->can_dev.status, sizeof(can->can_dev.status)); - break; - default: - return -RT_ERROR; - } - return RT_EOK; -} -int ra_can_sendmsg(struct rt_can_device *can_dev, const void *buf, rt_uint32_t boxno) -{ - struct ra_can *can; - can_frame_t g_can_tx_frame; - struct rt_can_msg *msg_rt = (struct rt_can_msg *)buf; - RT_ASSERT(can_dev != RT_NULL); - RT_ASSERT(buf != RT_NULL); - - g_can_tx_frame.id = msg_rt->id; - g_can_tx_frame.id_mode = msg_rt->ide; - g_can_tx_frame.type = msg_rt->rtr; - g_can_tx_frame.data_length_code = msg_rt->len; - g_can_tx_frame.options = 0; - memcpy(g_can_tx_frame.data, msg_rt->data, 8); - can = rt_container_of(can_dev, struct ra_can, can_dev); - RT_ASSERT(boxno < can->config->num_of_mailboxs); - - if (R_CAN_Write(can->config->p_api_ctrl, boxno, &g_can_tx_frame) != FSP_SUCCESS) - { - rt_exit_critical(); - return RT_ERROR; - } - return RT_EOK; -} - -int ra_can_recvmsg(struct rt_can_device *can_dev, void *buf, rt_uint32_t boxno) -{ - struct rt_can_msg *msg_rt = (struct rt_can_msg *)buf; - can_frame_t *msg_ra; - struct ra_can *can; - - RT_ASSERT(can_dev != RT_NULL); - RT_ASSERT(buf != RT_NULL); - can = rt_container_of(can_dev, struct ra_can, can_dev); - RT_ASSERT(boxno < can->config->num_of_mailboxs); - if (can->callback_args->mailbox != boxno) - return 0; - msg_ra = can->callback_args->p_frame; - - msg_rt->id = msg_ra->id; - msg_rt->ide = msg_ra->id_mode; - msg_rt->rtr = msg_ra->type; - msg_rt->rsv = RT_NULL; - msg_rt->len = msg_ra->data_length_code; - msg_rt->priv = boxno; - msg_rt->hdr = RT_NULL; - memcpy(msg_rt->data, msg_ra->data, msg_ra->data_length_code); - return sizeof(struct rt_can_msg); -} -const struct rt_can_ops ra_can_ops = -{ - .configure = ra_can_configure, - .control = ra_can_control, - .sendmsg = ra_can_sendmsg, - .recvmsg = ra_can_recvmsg -}; - -#ifdef BSP_USING_CAN0 -void can0_callback(can_callback_args_t *p_args) -{ - rt_interrupt_enter(); - switch (p_args->event) - { - case CAN_EVENT_TX_COMPLETE: - rt_hw_can_isr(&can_obj[CAN0_INDEX].can_dev, RT_CAN_EVENT_TX_DONE | p_args->mailbox << 8); - break; - case CAN_EVENT_RX_COMPLETE: - can_obj[CAN0_INDEX].callback_args = p_args; - if (p_args->event == CAN_EVENT_RX_COMPLETE) - rt_hw_can_isr(&can_obj[CAN0_INDEX].can_dev, RT_CAN_EVENT_RX_IND | p_args->mailbox << 8); - break; - case CAN_EVENT_TX_ABORTED: - rt_hw_can_isr(&can_obj[CAN0_INDEX].can_dev, RT_CAN_EVENT_TX_FAIL | p_args->mailbox << 8); - break; - case CAN_EVENT_MAILBOX_MESSAGE_LOST: //overwrite/overrun error event - case CAN_EVENT_BUS_RECOVERY: //Bus recovery error event - case CAN_EVENT_ERR_BUS_OFF: //error Bus Off event - case CAN_EVENT_ERR_PASSIVE: //error passive event - case CAN_EVENT_ERR_WARNING: //error warning event - case CAN_EVENT_ERR_BUS_LOCK: //error bus lock - case CAN_EVENT_ERR_CHANNEL: //error channel - case CAN_EVENT_ERR_GLOBAL: //error global - { - break; - } - } - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_CAN1 -void can1_callback(can_callback_args_t *p_args) -{ - rt_interrupt_enter(); - switch (p_args->event) - { - case CAN_EVENT_TX_COMPLETE: - rt_hw_can_isr(&can_obj[CAN1_INDEX].can_dev, RT_CAN_EVENT_TX_DONE | p_args->mailbox << 8); - break; - case CAN_EVENT_RX_COMPLETE: - can_obj[CAN1_INDEX].callback_args = p_args; - if (p_args->event == CAN_EVENT_RX_COMPLETE) - rt_hw_can_isr(&can_obj[CAN1_INDEX].can_dev, RT_CAN_EVENT_RX_IND | p_args->mailbox << 8); - break; - case CAN_EVENT_TX_ABORTED: - rt_hw_can_isr(&can_obj[CAN1_INDEX].can_dev, RT_CAN_EVENT_TX_FAIL | p_args->mailbox << 8); - break; - case CAN_EVENT_MAILBOX_MESSAGE_LOST: //overwrite/overrun error event - case CAN_EVENT_BUS_RECOVERY: //Bus recovery error event - case CAN_EVENT_ERR_BUS_OFF: //error Bus Off event - case CAN_EVENT_ERR_PASSIVE: //error passive event - case CAN_EVENT_ERR_WARNING: //error warning event - case CAN_EVENT_ERR_BUS_LOCK: //error bus lock - case CAN_EVENT_ERR_CHANNEL: //error channel - case CAN_EVENT_ERR_GLOBAL: //error global - { - break; - } - } - rt_interrupt_leave(); -} -#endif - -int rt_hw_can_init(void) -{ - rt_err_t result = 0; - rt_size_t obj_num = sizeof(can_obj) / sizeof(struct ra_can); - ra_can_get_config(); - for (int i = 0; i < obj_num; i++) - { - /* init CAN object */ - can_obj[i].config = &can_config[i]; - can_obj[i].can_dev.ops = &ra_can_ops; - /* register CAN device */ - result = rt_hw_can_register(&can_obj[i].can_dev, can_obj[i].config->name, can_obj[i].can_dev.ops, RT_NULL); - RT_ASSERT(result == RT_EOK); - } - - return result; -} -INIT_BOARD_EXPORT(rt_hw_can_init); diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_can.h b/bsp/renesas/ra6m4-iot/drivers/drv_can.h deleted file mode 100644 index 9e17c612fd..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_can.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-29 mazhiyuan first version - */ - -#ifndef __DRV_CAN_H__ -#define __DRV_CAN_H__ - -#include -#include -#include -#include -#include -#include - -/* renesas config class */ -struct ra_can_config -{ - const char *name; - int num_of_mailboxs; - can_ctrl_t *const p_api_ctrl; - can_cfg_t const *const p_cfg; -}; - -struct ra_can -{ - struct rt_can_device can_dev; - struct ra_can_config *config; - can_callback_args_t *callback_args; -}; - -struct ra_baud_rate_tab -{ - rt_uint32_t baud_rate; - rt_uint32_t sjw; - rt_uint32_t ts1; - rt_uint32_t ts2; - rt_uint32_t prescaler; -}; - -int rt_hw_can_init(void); - -#endif diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_common.c b/bsp/renesas/ra6m4-iot/drivers/drv_common.c deleted file mode 100644 index 4dadc8d4cb..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_common.c +++ /dev/null @@ -1,185 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2018-11-7 SummerGift first version - */ - -#include -#include -#include "board.h" - -#ifdef RT_USING_PIN - #include -#endif - -#ifdef RT_USING_SERIAL - #ifdef RT_USING_SERIAL_V2 - #include - #else - #include - #endif -#endif - -#ifdef RT_USING_FINSH -#include -static void reboot(uint8_t argc, char **argv) -{ - rt_hw_cpu_reset(); -} -MSH_CMD_EXPORT(reboot, Reboot System); -#endif /* RT_USING_FINSH */ - -/* SysTick configuration */ -void rt_hw_systick_init(void) -{ - SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); - NVIC_SetPriority(SysTick_IRQn, 0xFF); -} - -/** - * This is the timer interrupt service routine. - * - */ -void SysTick_Handler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - rt_tick_increase(); - - /* leave interrupt */ - rt_interrupt_leave(); -} - - -/** - * @brief This function is executed in case of error occurrence. - * @param None - * @retval None - */ -void _Error_Handler(char *s, int num) -{ - /* USER CODE BEGIN Error_Handler */ - /* User can add his own implementation to report the HAL error return state */ - while (1) - { - } - /* USER CODE END Error_Handler */ -} - -/** - * This function will delay for some us. - * - * @param us the delay time of us - */ -void rt_hw_us_delay(rt_uint32_t us) -{ - rt_uint32_t ticks; - rt_uint32_t told, tnow, tcnt = 0; - rt_uint32_t reload = SysTick->LOAD; - - ticks = us * reload / (1000000 / RT_TICK_PER_SECOND); - told = SysTick->VAL; - while (1) - { - tnow = SysTick->VAL; - if (tnow != told) - { - if (tnow < told) - { - tcnt += told - tnow; - } - else - { - tcnt += reload - tnow + told; - } - told = tnow; - if (tcnt >= ticks) - { - break; - } - } - } -} - -/** - * This function will initial STM32 board. - */ -RT_WEAK void rt_hw_board_init() -{ - - rt_hw_systick_init(); - - /* Heap initialization */ -#if defined(RT_USING_HEAP) - rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); -#endif - - /* Pin driver initialization is open by default */ -#ifdef RT_USING_PIN - rt_hw_pin_init(); -#endif - - /* USART driver initialization is open by default */ -#ifdef RT_USING_SERIAL - rt_hw_usart_init(); -#endif - - /* Set the shell console output device */ -#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE) - rt_console_set_device(RT_CONSOLE_DEVICE_NAME); -#endif - - /* Board underlying hardware initialization */ -#ifdef RT_USING_COMPONENTS_INIT - rt_components_board_init(); -#endif -} - -FSP_CPP_HEADER -void R_BSP_WarmStart(bsp_warm_start_event_t event); -FSP_CPP_FOOTER - -/*******************************************************************************************************************//** - * This function is called at various points during the startup process. This implementation uses the event that is - * called right before main() to set up the pins. - * - * @param[in] event Where at in the start up process the code is currently at - **********************************************************************************************************************/ -void R_BSP_WarmStart (bsp_warm_start_event_t event) -{ - if (BSP_WARM_START_RESET == event) - { -#if BSP_FEATURE_FLASH_LP_VERSION != 0 - - /* Enable reading from data flash. */ - R_FACI_LP->DFLCTL = 1U; - - /* Would normally have to wait tDSTOP(6us) for data flash recovery. Placing the enable here, before clock and - * C runtime initialization, should negate the need for a delay since the initialization will typically take more than 6us. */ -#endif - } - - if (BSP_WARM_START_POST_C == event) - { - /* C runtime environment and system clocks are setup. */ - - /* Configure pins. */ - R_IOPORT_Open(&g_ioport_ctrl, g_ioport.p_cfg); - } -} - -#if BSP_TZ_SECURE_BUILD - -BSP_CMSE_NONSECURE_ENTRY void template_nonsecure_callable (); - -/* Trustzone Secure Projects require at least one nonsecure callable function in order to build (Remove this if it is not required to build). */ -BSP_CMSE_NONSECURE_ENTRY void template_nonsecure_callable () -{ - -} -#endif \ No newline at end of file diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_common.h b/bsp/renesas/ra6m4-iot/drivers/drv_common.h deleted file mode 100644 index 2c2a76334f..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_common.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2018-11-7 SummerGift first version - */ - -#ifndef __DRV_COMMON_H__ -#define __DRV_COMMON_H__ - -#include -#include -#ifdef RT_USING_DEVICE - #include -#endif - -#ifdef __cplusplus -extern "C" { -#endif - -void _Error_Handler(char *s, int num); - -#ifndef Error_Handler -#define Error_Handler() _Error_Handler(__FILE__, __LINE__) -#endif - -#define DMA_NOT_AVAILABLE ((DMA_INSTANCE_TYPE *)0xFFFFFFFFU) - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_dac.c b/bsp/renesas/ra6m4-iot/drivers/drv_dac.c deleted file mode 100644 index 805b8121da..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_dac.c +++ /dev/null @@ -1,113 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-19 Mr.Tiger first version - */ - -#include -#include "drv_config.h" -#ifdef RT_USING_DAC - -//#define DRV_DEBUG -#define DBG_TAG "drv.dac" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ -#include - -struct ra_dac_map ra_dac[] = -{ -#ifdef BSP_USING_DAC0 - {'0', &g_dac0_cfg, &g_dac0_ctrl}, -#endif -#ifdef BSP_USING_DAC1 - {'1', &g_dac1_cfg, &g_dac1_ctrl}, -#endif -}; - -#ifdef BSP_USING_DAC0 -struct rt_dac_device dac0_device; -struct ra_dac_dev _ra_dac0_device = {.ra_dac_device_t = &dac0_device, .ra_dac_map_dev = &ra_dac[0]}; -#endif - -#ifdef BSP_USING_DAC1 -struct rt_dac_device dac1_device; -struct ra_dac_dev _ra_dac1_device = {.ra_dac_device_t = &dac1_device, .ra_dac_map_dev = &ra_dac[1]}; -#endif - -rt_err_t ra_dac_disabled(struct rt_dac_device *device, rt_uint32_t channel) -{ - RT_ASSERT(device != RT_NULL); - struct ra_dac_map *dac = (struct ra_dac_map *)device->parent.user_data; - if (FSP_SUCCESS != R_DAC_Stop((dac_ctrl_t *)dac->g_ctrl)) - { - LOG_E("dac%c stop failed.", dac->name); - return -RT_ERROR; - } - return RT_EOK; -} - -rt_err_t ra_dac_enabled(struct rt_dac_device *device, rt_uint32_t channel) -{ - RT_ASSERT(device != RT_NULL); - struct ra_dac_map *dac = (struct ra_dac_map *)device->parent.user_data; - if (FSP_SUCCESS != R_DAC_Start((dac_ctrl_t *)dac->g_ctrl)) - { - LOG_E("dac%c start failed.", dac->name); - return -RT_ERROR; - } - return RT_EOK; -} - -rt_err_t ra_dac_write(struct rt_dac_device *device, rt_uint32_t channel, rt_uint32_t *value) -{ - RT_ASSERT(device != RT_NULL); - struct ra_dac_map *dac = (struct ra_dac_map *)device->parent.user_data; - if (FSP_SUCCESS != R_DAC_Write((dac_ctrl_t *)dac->g_ctrl, *value)) - { - LOG_E("dac%c set value failed.", dac->name); - return -RT_ERROR; - } - return RT_EOK; -} - -struct rt_dac_ops ra_dac_ops = -{ - .disabled = ra_dac_disabled, - .enabled = ra_dac_enabled, - .convert = ra_dac_write, -}; - -static int ra_dac_init(void) -{ -#ifdef BSP_USING_DAC0 - _ra_dac0_device.ra_dac_device_t->ops = &ra_dac_ops; - R_DAC_Open((dac_ctrl_t *)_ra_dac0_device.ra_dac_map_dev->g_ctrl, (dac_cfg_t const *)_ra_dac0_device.ra_dac_map_dev->g_cfg); - if (FSP_SUCCESS != rt_hw_dac_register(_ra_dac0_device.ra_dac_device_t, "dac0", &ra_dac_ops, (void *)_ra_dac0_device.ra_dac_map_dev)) - { - LOG_E("dac0 register failed"); - return -RT_ERROR; - } -#endif - -#ifdef BSP_USING_DAC1 - _ra_dac1_device.ra_dac_device_t->ops = &ra_dac_ops; - R_DAC_Open((dac_ctrl_t *)_ra_dac1_device.ra_dac_map_dev->g_ctrl, (dac_cfg_t const *) _ra_dac1_device.ra_dac_map_dev->g_cfg); - if (FSP_SUCCESS != rt_hw_dac_register(_ra_dac1_device.ra_dac_device_t, "dac1", &ra_dac_ops, (void *)_ra_dac1_device.ra_dac_map_dev)) - { - LOG_E("dac1 register failed"); - return -RT_ERROR; - } -#endif - - return RT_EOK; -} -INIT_DEVICE_EXPORT(ra_dac_init); - -#endif diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_flash.c b/bsp/renesas/ra6m4-iot/drivers/drv_flash.c deleted file mode 100644 index 4a4fc0fc6b..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_flash.c +++ /dev/null @@ -1,283 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-11-30 flybreak first version - */ - -#include -#include -#include - -#include "board.h" -#include "hal_data.h" -#include "drv_flash.h" - -#include - -#if defined(PKG_USING_FAL) - #include "fal.h" -#endif - -//#define DRV_DEBUG -#define LOG_TAG "drv.flash" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ -#include - -int _flash_init(void) -{ - fsp_err_t err = FSP_SUCCESS; - /* Open Flash_HP */ - err = R_FLASH_HP_Open(&g_flash_ctrl, &g_flash_cfg); - /* Handle Error */ - if (FSP_SUCCESS != err) - { - LOG_E("\r\n Flah_HP_Open API failed"); - } - /* Setup Default Block 0 as Startup Setup Block */ - err = R_FLASH_HP_StartUpAreaSelect(&g_flash_ctrl, FLASH_STARTUP_AREA_BLOCK0, true); - if (err != FSP_SUCCESS) - { - LOG_E("\r\n Flah_HP_StartUpAreaSelect API failed"); - } - return 0; -} - -/** - * Read data from flash. - * @note This operation's units is word. - * - * @param addr flash address - * @param buf buffer to store read data - * @param size read bytes size - * - * @return result - */ -int _flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size) -{ - size_t i; - - for (i = 0; i < size; i++, buf++, addr++) - { - *buf = *(rt_uint8_t *) addr; - } - - return size; -} - -/** - * Write data to flash. - * @note This operation's units is word. - * @note This operation must after erase. @see flash_erase. - * - * @param addr flash address - * @param buf the write data buffer - * @param size write bytes size - * - * @return result - */ -int _flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size) -{ - rt_err_t result = RT_EOK; - rt_base_t level; - fsp_err_t err = FSP_SUCCESS; - size_t written_size = 0; - - if (size % BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE) - { - LOG_E("Flash Write size must be an integer multiple of %d", BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE); - return -RT_EINVAL; - } - - while (written_size < size) - { - level = rt_hw_interrupt_disable(); - R_FLASH_HP_Reset(&g_flash_ctrl); - /* Write code flash data*/ - err = R_FLASH_HP_Write(&g_flash_ctrl, (uint32_t)(buf + written_size), addr + written_size, BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE); - rt_hw_interrupt_enable(level); - - /* Error Handle */ - if (FSP_SUCCESS != err) - { - LOG_E("Write API failed"); - return -RT_EIO; - } - - written_size += BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE; - } - - if (result != RT_EOK) - { - return result; - } - - return size; -} - -/** - * Erase data on flash. - * @note This operation is irreversible. - * @note This operation's units is different which on many chips. - * - * @param addr flash address - * @param size erase bytes size - * - * @return result - */ -int _flash_erase_8k(rt_uint32_t addr, size_t size) -{ - fsp_err_t err = FSP_SUCCESS; - rt_base_t level; - - if ((addr + size) > BSP_FEATURE_FLASH_HP_CF_REGION0_SIZE) - { - LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size)); - return -RT_EINVAL; - } - - if (size < 1) - { - return -RT_EINVAL; - } - - level = rt_hw_interrupt_disable(); - R_FLASH_HP_Reset(&g_flash_ctrl); - /* Erase Block */ - err = R_FLASH_HP_Erase(&g_flash_ctrl, RT_ALIGN_DOWN(addr, FLASH_HP_CF_BLOCK_SIZE_8KB), (size - 1) / BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE + 1); - rt_hw_interrupt_enable(level); - - if (err != FSP_SUCCESS) - { - LOG_E("Erase API failed"); - return -RT_EIO; - } - - LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size); - return size; -} - -int _flash_erase_32k(rt_uint32_t addr, size_t size) -{ - fsp_err_t err = FSP_SUCCESS; - rt_base_t level; - - if (size < 1) - { - return -RT_EINVAL; - } - - level = rt_hw_interrupt_disable(); - R_FLASH_HP_Reset(&g_flash_ctrl); - /* Erase Block */ - err = R_FLASH_HP_Erase(&g_flash_ctrl, RT_ALIGN_DOWN(addr, FLASH_HP_CF_BLOCK_SIZE_32KB), (size - 1) / BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE + 1); - rt_hw_interrupt_enable(level); - - if (err != FSP_SUCCESS) - { - LOG_E("Erase API failed"); - return -RT_EIO; - } - - LOG_D("erase done: addr (0x%p), size %d", (void *)addr, size); - return size; -} - -#if defined(PKG_USING_FAL) - -static int fal_flash_read_8k(long offset, rt_uint8_t *buf, size_t size); -static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size); - -static int fal_flash_write_8k(long offset, const rt_uint8_t *buf, size_t size); -static int fal_flash_write_32k(long offset, const rt_uint8_t *buf, size_t size); - -static int fal_flash_erase_8k(long offset, size_t size); -static int fal_flash_erase_32k(long offset, size_t size); - -const struct fal_flash_dev _onchip_flash_8k = { "onchip_flash_8k", FLASH_HP_CF_BLCOK_0, FLASH_HP_CF_BLOCK_8, (8 * 1024), {_flash_init, fal_flash_read_8k, fal_flash_write_8k, fal_flash_erase_8k} }; -const struct fal_flash_dev _onchip_flash_32k = { "onchip_flash_32k", FLASH_HP_CF_BLOCK_8, 32 * 30 * 1024, (32 * 1024), {_flash_init, fal_flash_read_32k, fal_flash_write_32k, fal_flash_erase_32k} }; - -static int fal_flash_read_8k(long offset, rt_uint8_t *buf, size_t size) -{ - return _flash_read(_onchip_flash_8k.addr + offset, buf, size); -} - -static int fal_flash_read_32k(long offset, rt_uint8_t *buf, size_t size) -{ - return _flash_read(_onchip_flash_32k.addr + offset, buf, size); -} - -static int fal_flash_write_8k(long offset, const rt_uint8_t *buf, size_t size) -{ - return _flash_write(_onchip_flash_8k.addr + offset, buf, size); -} - -static int fal_flash_write_32k(long offset, const rt_uint8_t *buf, size_t size) -{ - return _flash_write(_onchip_flash_32k.addr + offset, buf, size); -} - -static int fal_flash_erase_8k(long offset, size_t size) -{ - return _flash_erase_8k(_onchip_flash_8k.addr + offset, size); -} - -static int fal_flash_erase_32k(long offset, size_t size) -{ - return _flash_erase_32k(_onchip_flash_32k.addr + offset, size); -} - -int flash_test(void) -{ -#define TEST_OFF (_onchip_flash_32k.len - BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE) - const struct fal_partition *param; - uint8_t write_buffer[BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE] = {0}; - uint8_t read_buffer[BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE] = {0}; - - /* Set write buffer, clear read buffer */ - for (uint8_t index = 0; index < BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE; index++) - { - write_buffer[index] = index; - read_buffer[index] = 0; - } - - fal_init(); - - param = fal_partition_find("param"); - if (param == RT_NULL) - { - LOG_E("not find partition param!"); - return -1; - } - LOG_I("Erase Start..."); - fal_partition_erase(param, TEST_OFF, BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE); - LOG_I("Erase succeeded!"); - LOG_I("Write Start..."); - fal_partition_write(param, TEST_OFF, write_buffer, sizeof(write_buffer)); - LOG_I("Write succeeded!"); - LOG_I("Read Start..."); - fal_partition_read(param, TEST_OFF, read_buffer, BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE); - LOG_I("Read succeeded!"); - - for (int i = 0; i < BSP_FEATURE_FLASH_HP_CF_WRITE_SIZE; i++) - { - if (read_buffer[i] != write_buffer[i]) - { - LOG_E("Data verification failed!"); - return -1; - } - } - - LOG_I("Data verification succeeded!"); - return 0; -} -MSH_CMD_EXPORT(flash_test, "drv flash test."); - -#endif diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_flash.h b/bsp/renesas/ra6m4-iot/drivers/drv_flash.h deleted file mode 100644 index 0940884834..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_flash.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-11-30 flybreak first version - */ - -#ifndef __DRV_FLASH_H__ -#define __DRV_FLASH_H__ - -#include -#include "rtdevice.h" -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/* Code Flash */ -#define FLASH_HP_CF_BLOCK_SIZE_32KB (32*1024) /* Block Size 32 KB */ -#define FLASH_HP_CF_BLOCK_SIZE_8KB (8*1024) /* Block Size 8KB */ - -#define FLASH_HP_CF_BLCOK_0 0x00000000U /* 8 KB: 0x00000000 - 0x00001FFF */ -#define FLASH_HP_CF_BLOCK_1 0x00002000U /* 8 KB: 0x00002000 - 0x00003FFF */ -#define FLASH_HP_CF_BLOCK_2 0x00004000U /* 8 KB: 0x00004000 - 0x00005FFF */ -#define FLASH_HP_CF_BLOCK_3 0x00006000U /* 8 KB: 0x00006000 - 0x00007FFF */ -#define FLASH_HP_CF_BLOCK_4 0x00008000U /* 8 KB: 0x00008000 - 0x00009FFF */ -#define FLASH_HP_CF_BLOCK_5 0x0000A000U /* 8 KB: 0x0000A000 - 0x0000BFFF */ -#define FLASH_HP_CF_BLOCK_6 0x0000C000U /* 8 KB: 0x0000C000 - 0x0000DFFF */ -#define FLASH_HP_CF_BLOCK_7 0x0000E000U /* 8 KB: 0x0000E000 - 0x0000FFFF */ -#define FLASH_HP_CF_BLOCK_8 0x00010000U /* 32 KB: 0x00010000 - 0x00017FFF */ -#define FLASH_HP_CF_BLOCK_9 0x00018000U /* 32 KB: 0x00018000 - 0x0001FFFF */ -#define FLASH_HP_CF_BLCOK_10 0x00020000U /* 32 KB: 0x00020000 - 0x0004FFFF */ - -#define FLASH_HP_DF_BLOCK_SIZE (64) -/* Data Flash */ -#if (defined (BOARD_RA6M4_EK) || defined (BOARD_RA6M5_EK) || defined (BOARD_RA4M3_EK)||defined(BOARD_RA4M2_EK)) - -#define FLASH_HP_DF_BLOCK_0 0x08000000U /* 64 B: 0x40100000 - 0x4010003F */ -#define FLASH_HP_DF_BLOCK_1 0x08000040U /* 64 B: 0x40100040 - 0x4010007F */ -#define FLASH_HP_DF_BLOCK_2 0x08000080U /* 64 B: 0x40100080 - 0x401000BF */ -#define FLASH_HP_DF_BLOCK_3 0x080000C0U /* 64 B: 0x401000C0 - 0x401000FF */ - -#else - -#define FLASH_HP_DF_BLOCK_0 0x40100000U /* 64 B: 0x40100000 - 0x4010003F */ -#define FLASH_HP_DF_BLOCK_1 0x40100040U /* 64 B: 0x40100040 - 0x4010007F */ -#define FLASH_HP_DF_BLOCK_2 0x40100080U /* 64 B: 0x40100080 - 0x401000BF */ -#define FLASH_HP_DF_BLOCK_3 0x401000C0U /* 64 B: 0x401000C0 - 0x401000FF */ - -#endif - -#define BLOCK_SIZE (128) -#define BLOCK_NUM (2) - -#ifdef __cplusplus -} -#endif - -#endif /* __DRV_FLASH_H__ */ diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_gpio.c b/bsp/renesas/ra6m4-iot/drivers/drv_gpio.c deleted file mode 100644 index 228b76585a..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_gpio.c +++ /dev/null @@ -1,589 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#include - -#ifdef RT_USING_PIN - -#define DBG_TAG "drv.gpio" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ - -#ifdef R_ICU_H -static rt_base_t ra_pin_get_irqx(rt_uint32_t pin) -{ - switch (pin) - { - case BSP_IO_PORT_04_PIN_00: - case BSP_IO_PORT_02_PIN_06: - case BSP_IO_PORT_01_PIN_05: - return 0; - - case BSP_IO_PORT_02_PIN_05: - case BSP_IO_PORT_01_PIN_01: - case BSP_IO_PORT_01_PIN_04: - return 1; - - case BSP_IO_PORT_02_PIN_03: - case BSP_IO_PORT_01_PIN_00: - case BSP_IO_PORT_02_PIN_13: - return 2; - - case BSP_IO_PORT_02_PIN_02: - case BSP_IO_PORT_01_PIN_10: - case BSP_IO_PORT_02_PIN_12: - return 3; - - case BSP_IO_PORT_04_PIN_02: - case BSP_IO_PORT_01_PIN_11: - case BSP_IO_PORT_04_PIN_11: - return 4; - - case BSP_IO_PORT_04_PIN_01: - case BSP_IO_PORT_03_PIN_02: - case BSP_IO_PORT_04_PIN_10: - return 5; - - case BSP_IO_PORT_03_PIN_01: - case BSP_IO_PORT_00_PIN_00: - case BSP_IO_PORT_04_PIN_09: - return 6; - - case BSP_IO_PORT_00_PIN_01: - case BSP_IO_PORT_04_PIN_08: - return 7; - - case BSP_IO_PORT_00_PIN_02: - case BSP_IO_PORT_03_PIN_05: - case BSP_IO_PORT_04_PIN_15: - return 8; - - case BSP_IO_PORT_00_PIN_04: - case BSP_IO_PORT_03_PIN_04: - case BSP_IO_PORT_04_PIN_14: - return 9; - - case BSP_IO_PORT_00_PIN_05: - case BSP_IO_PORT_07_PIN_09: - return 10; - - case BSP_IO_PORT_05_PIN_01: - case BSP_IO_PORT_00_PIN_06: - case BSP_IO_PORT_07_PIN_08: - return 11; - - case BSP_IO_PORT_05_PIN_02: - case BSP_IO_PORT_00_PIN_08: - return 12; - - case BSP_IO_PORT_00_PIN_15: - case BSP_IO_PORT_00_PIN_09: - return 13; - - case BSP_IO_PORT_04_PIN_03: - case BSP_IO_PORT_05_PIN_12: - case BSP_IO_PORT_05_PIN_05: - return 14; - - case BSP_IO_PORT_04_PIN_04: - case BSP_IO_PORT_05_PIN_11: - case BSP_IO_PORT_05_PIN_06: - return 15; - - default : - return -1; - } -} - -static struct rt_pin_irq_hdr pin_irq_hdr_tab[] = -{ - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, -}; - -#define RA_IRQ_MAX 16 -struct ra_pin_irq_map pin_irq_map[RA_IRQ_MAX] = {0}; - -static void ra_pin_map_init(void) -{ -#ifdef VECTOR_NUMBER_ICU_IRQ0 - pin_irq_map[0].irq_ctrl = &g_external_irq0_ctrl; - pin_irq_map[0].irq_cfg = &g_external_irq0_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ1 - pin_irq_map[1].irq_ctrl = &g_external_irq1_ctrl; - pin_irq_map[1].irq_cfg = &g_external_irq1_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ2 - pin_irq_map[2].irq_ctrl = &g_external_irq2_ctrl; - pin_irq_map[2].irq_cfg = &g_external_irq2_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ3 - pin_irq_map[3].irq_ctrl = &g_external_irq3_ctrl; - pin_irq_map[3].irq_cfg = &g_external_irq3_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ4 - pin_irq_map[4].irq_ctrl = &g_external_irq4_ctrl; - pin_irq_map[4].irq_cfg = &g_external_irq4_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ5 - pin_irq_map[5].irq_ctrl = &g_external_irq5_ctrl; - pin_irq_map[5].irq_cfg = &g_external_irq5_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ6 - pin_irq_map[6].irq_ctrl = &g_external_irq6_ctrl; - pin_irq_map[6].irq_cfg = &g_external_irq6_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ7 - pin_irq_map[7].irq_ctrl = &g_external_irq7_ctrl; - pin_irq_map[7].irq_cfg = &g_external_irq7_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ8 - pin_irq_map[8].irq_ctrl = &g_external_irq8_ctrl; - pin_irq_map[8].irq_cfg = &g_external_irq8_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ9 - pin_irq_map[9].irq_ctrl = &g_external_irq9_ctrl; - pin_irq_map[9].irq_cfg = &g_external_irq9_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ10 - pin_irq_map[10].irq_ctrl = &g_external_irq10_ctrl; - pin_irq_map[10].irq_cfg = &g_external_irq10_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ11 - pin_irq_map[11].irq_ctrl = &g_external_irq11_ctrl; - pin_irq_map[11].irq_cfg = &g_external_irq11_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ12 - pin_irq_map[12].irq_ctrl = &g_external_irq12_ctrl; - pin_irq_map[12].irq_cfg = &g_external_irq12_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ13 - pin_irq_map[13].irq_ctrl = &g_external_irq13_ctrl; - pin_irq_map[13].irq_cfg = &g_external_irq13_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ14 - pin_irq_map[14].irq_ctrl = &g_external_irq14_ctrl; - pin_irq_map[14].irq_cfg = &g_external_irq14_cfg; -#endif -#ifdef VECTOR_NUMBER_ICU_IRQ15 - pin_irq_map[15].irq_ctrl = &g_external_irq15_ctrl; - pin_irq_map[15].irq_cfg = &g_external_irq15_cfg; -#endif -} -#endif /* R_ICU_H */ - -static void ra_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) -{ - fsp_err_t err; - /* Initialize the IOPORT module and configure the pins */ - err = R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg); - - if (err != FSP_SUCCESS) - { - LOG_E("GPIO open failed"); - return; - } - - switch (mode) - { - case PIN_MODE_OUTPUT: - err = R_IOPORT_PinCfg(&g_ioport_ctrl, pin, BSP_IO_DIRECTION_OUTPUT); - if (err != FSP_SUCCESS) - { - LOG_E("PIN_MODE_OUTPUT configuration failed"); - return; - } - break; - - case PIN_MODE_INPUT: - err = R_IOPORT_PinCfg(&g_ioport_ctrl, pin, BSP_IO_DIRECTION_INPUT); - if (err != FSP_SUCCESS) - { - LOG_E("PIN_MODE_INPUT configuration failed"); - return; - } - break; - - case PIN_MODE_OUTPUT_OD: - err = R_IOPORT_PinCfg(&g_ioport_ctrl, pin, IOPORT_CFG_NMOS_ENABLE); - if (err != FSP_SUCCESS) - { - LOG_E("PIN_MODE_OUTPUT_OD configuration failed"); - return; - } - break; - } -} - -static void ra_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) -{ - bsp_io_level_t level = BSP_IO_LEVEL_HIGH; - - if (value != level) - { - level = BSP_IO_LEVEL_LOW; - } - - R_BSP_PinAccessEnable(); - R_BSP_PinWrite(pin, level); - R_BSP_PinAccessDisable(); -} - -static int ra_pin_read(rt_device_t dev, rt_base_t pin) -{ - if ((pin > RA_MAX_PIN_VALUE) || (pin < RA_MIN_PIN_VALUE)) - { - LOG_E("GPIO pin value is illegal"); - return -RT_ERROR; - } - return R_BSP_PinRead(pin); -} - -static rt_err_t ra_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled) -{ -#ifdef R_ICU_H - rt_err_t err; - rt_int32_t irqx = ra_pin_get_irqx(pin); - if (PIN_IRQ_ENABLE == enabled) - { - if (0 <= irqx && irqx < sizeof(pin_irq_map) / sizeof(pin_irq_map[0])) - { - err = R_ICU_ExternalIrqOpen((external_irq_ctrl_t *const)pin_irq_map[irqx].irq_ctrl, - (external_irq_cfg_t const * const)pin_irq_map[irqx].irq_cfg); - /* Handle error */ - if (FSP_SUCCESS != err) - { - /* ICU Open failure message */ - LOG_E("\r\n**R_ICU_ExternalIrqOpen API FAILED**\r\n"); - return -RT_ERROR; - } - - err = R_ICU_ExternalIrqEnable((external_irq_ctrl_t *const)pin_irq_map[irqx].irq_ctrl); - /* Handle error */ - if (FSP_SUCCESS != err) - { - /* ICU Enable failure message */ - LOG_E("\r\n**R_ICU_ExternalIrqEnable API FAILED**\r\n"); - return -RT_ERROR; - } - } - } - else if (PIN_IRQ_DISABLE == enabled) - { - err = R_ICU_ExternalIrqDisable((external_irq_ctrl_t *const)pin_irq_map[irqx].irq_ctrl); - if (FSP_SUCCESS != err) - { - /* ICU Disable failure message */ - LOG_E("\r\n**R_ICU_ExternalIrqDisable API FAILED**\r\n"); - return -RT_ERROR; - } - err = R_ICU_ExternalIrqClose((external_irq_ctrl_t *const)pin_irq_map[irqx].irq_ctrl); - if (FSP_SUCCESS != err) - { - /* ICU Close failure message */ - LOG_E("\r\n**R_ICU_ExternalIrqClose API FAILED**\r\n"); - return -RT_ERROR; - } - } - return RT_EOK; -#else - return -RT_ERROR; -#endif -} - -static rt_err_t ra_pin_attach_irq(struct rt_device *device, rt_int32_t pin, - rt_uint32_t mode, void (*hdr)(void *args), void *args) -{ -#ifdef R_ICU_H - rt_int32_t irqx = ra_pin_get_irqx(pin); - if (0 <= irqx && irqx < (sizeof(pin_irq_map) / sizeof(pin_irq_map[0]))) - { - int level = rt_hw_interrupt_disable(); - if (pin_irq_hdr_tab[irqx].pin == irqx && - pin_irq_hdr_tab[irqx].hdr == hdr && - pin_irq_hdr_tab[irqx].mode == mode && - pin_irq_hdr_tab[irqx].args == args) - { - rt_hw_interrupt_enable(level); - return RT_EOK; - } - if (pin_irq_hdr_tab[irqx].pin != -1) - { - rt_hw_interrupt_enable(level); - return RT_EBUSY; - } - pin_irq_hdr_tab[irqx].pin = irqx; - pin_irq_hdr_tab[irqx].hdr = hdr; - pin_irq_hdr_tab[irqx].mode = mode; - pin_irq_hdr_tab[irqx].args = args; - rt_hw_interrupt_enable(level); - } - else return -RT_ERROR; - return RT_EOK; -#else - return -RT_ERROR; -#endif -} - -static rt_err_t ra_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) -{ -#ifdef R_ICU_H - rt_int32_t irqx = ra_pin_get_irqx(pin); - if (0 <= irqx && irqx < sizeof(pin_irq_map) / sizeof(pin_irq_map[0])) - { - int level = rt_hw_interrupt_disable(); - if (pin_irq_hdr_tab[irqx].pin == -1) - { - rt_hw_interrupt_enable(level); - return RT_EOK; - } - pin_irq_hdr_tab[irqx].pin = -1; - pin_irq_hdr_tab[irqx].hdr = RT_NULL; - pin_irq_hdr_tab[irqx].mode = 0; - pin_irq_hdr_tab[irqx].args = RT_NULL; - rt_hw_interrupt_enable(level); - } - else - { - return -RT_ERROR; - } - return RT_EOK; -#else - return -RT_ERROR; -#endif -} - -static rt_base_t ra_pin_get(const char *name) -{ - int pin_number = -1, port = -1, pin = -1; - if (rt_strlen(name) != 4) - return -1; - if ((name[0] == 'P') || (name[0] == 'p')) - { - if ('0' <= (int)name[1] && (int)name[1] <= '9') - { - port = ((int)name[1] - 48) * 16 * 16; - if ('0' <= (int)name[2] && (int)name[2] <= '9') - { - if ('0' <= (int)name[3] && (int)name[3] <= '9') - { - pin = ((int)name[2] - 48) * 10; - pin += (int)name[3] - 48; - pin_number = port + pin; - } - else return -1; - } - else return -1; - } - else return -1; - } - return pin_number; -} - -const static struct rt_pin_ops _ra_pin_ops = -{ - .pin_mode = ra_pin_mode, - .pin_write = ra_pin_write, - .pin_read = ra_pin_read, - .pin_attach_irq = ra_pin_attach_irq, - .pin_detach_irq = ra_pin_dettach_irq, - .pin_irq_enable = ra_pin_irq_enable, - .pin_get = ra_pin_get, -}; - -int rt_hw_pin_init(void) -{ -#ifdef R_ICU_H - ra_pin_map_init(); -#endif - return rt_device_pin_register("pin", &_ra_pin_ops, RT_NULL); -} - -#ifdef R_ICU_H -void irq0_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (0 == pin_irq_hdr_tab[0].pin) - { - pin_irq_hdr_tab[0].hdr(pin_irq_hdr_tab[0].args); - } - rt_interrupt_leave(); -}; - -void irq1_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (1 == pin_irq_hdr_tab[1].pin) - { - pin_irq_hdr_tab[1].hdr(pin_irq_hdr_tab[1].args); - } - rt_interrupt_leave(); -}; - -void irq2_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (2 == pin_irq_hdr_tab[2].pin) - { - pin_irq_hdr_tab[2].hdr(pin_irq_hdr_tab[2].args); - } - rt_interrupt_leave(); -}; - -void irq3_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (3 == pin_irq_hdr_tab[3].pin) - { - pin_irq_hdr_tab[3].hdr(pin_irq_hdr_tab[3].args); - } - rt_interrupt_leave(); -}; - -void irq4_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (4 == pin_irq_hdr_tab[4].pin) - { - pin_irq_hdr_tab[4].hdr(pin_irq_hdr_tab[4].args); - } - rt_interrupt_leave(); -}; - -void irq5_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (5 == pin_irq_hdr_tab[5].pin) - { - pin_irq_hdr_tab[5].hdr(pin_irq_hdr_tab[5].args); - } - rt_interrupt_leave(); -}; - -void irq6_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (6 == pin_irq_hdr_tab[6].pin) - { - pin_irq_hdr_tab[6].hdr(pin_irq_hdr_tab[6].args); - } - rt_interrupt_leave(); -}; - -void irq7_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (7 == pin_irq_hdr_tab[7].pin) - { - pin_irq_hdr_tab[7].hdr(pin_irq_hdr_tab[7].args); - } - rt_interrupt_leave(); -}; - -void irq8_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (8 == pin_irq_hdr_tab[8].pin) - { - pin_irq_hdr_tab[8].hdr(pin_irq_hdr_tab[8].args); - } - rt_interrupt_leave(); -}; - -void irq9_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (9 == pin_irq_hdr_tab[9].pin) - { - pin_irq_hdr_tab[9].hdr(pin_irq_hdr_tab[9].args); - } - rt_interrupt_leave(); -}; - -void irq10_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (10 == pin_irq_hdr_tab[10].pin) - { - pin_irq_hdr_tab[10].hdr(pin_irq_hdr_tab[10].args); - } - rt_interrupt_leave(); -}; - -void irq11_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (11 == pin_irq_hdr_tab[11].pin) - { - pin_irq_hdr_tab[11].hdr(pin_irq_hdr_tab[11].args); - } - rt_interrupt_leave(); -}; - -void irq12_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (12 == pin_irq_hdr_tab[12].pin) - { - pin_irq_hdr_tab[12].hdr(pin_irq_hdr_tab[12].args); - } - rt_interrupt_leave(); -}; - -void irq13_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (13 == pin_irq_hdr_tab[13].pin) - { - pin_irq_hdr_tab[13].hdr(pin_irq_hdr_tab[13].args); - } - rt_interrupt_leave(); -}; - -void irq14_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (14 == pin_irq_hdr_tab[14].pin) - { - pin_irq_hdr_tab[14].hdr(pin_irq_hdr_tab[14].args); - } - rt_interrupt_leave(); -}; - -void irq15_callback(external_irq_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (15 == pin_irq_hdr_tab[15].pin) - { - pin_irq_hdr_tab[15].hdr(pin_irq_hdr_tab[15].args); - } - rt_interrupt_leave(); -}; -#endif /* R_ICU_H */ - -#endif /* RT_USING_PIN */ diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_gpio.h b/bsp/renesas/ra6m4-iot/drivers/drv_gpio.h deleted file mode 100644 index 4493bb02ee..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_gpio.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#ifndef __DRV_GPIO_H__ -#define __DRV_GPIO_H__ - -#include -#include -#include -#include -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define RA_MIN_PIN_VALUE BSP_IO_PORT_00_PIN_00 -#define RA_MAX_PIN_VALUE BSP_IO_PORT_11_PIN_15 - -#ifdef R_ICU_H -struct ra_pin_irq_map -{ - const icu_instance_ctrl_t *irq_ctrl; - const external_irq_cfg_t *irq_cfg; -}; -#endif - -int rt_hw_pin_init(void); -#ifdef __cplusplus -} -#endif - -#endif /* __DRV_GPIO_H__ */ \ No newline at end of file diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_pwm.c b/bsp/renesas/ra6m4-iot/drivers/drv_pwm.c deleted file mode 100644 index 9b6369d9b3..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_pwm.c +++ /dev/null @@ -1,220 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-25 KevinXu first version - */ - -#include "drv_pwm.h" - -#ifdef RT_USING_PWM - -/* Declare the control function first */ -static rt_err_t drv_pwm_control(struct rt_device_pwm *, int, void *); -static struct rt_pwm_ops drv_ops = -{ - drv_pwm_control -}; - -static struct ra_pwm ra6m4_pwm_obj[BSP_PWMS_NUM] = -{ -#ifdef BSP_USING_PWM0 - [BSP_PWM0_INDEX] = PWM_DRV_INITIALIZER(0), -#endif -#ifdef BSP_USING_PWM1 - [BSP_PWM1_INDEX] = PWM_DRV_INITIALIZER(1), -#endif -#ifdef BSP_USING_PWM2 - [BSP_PWM2_INDEX] = PWM_DRV_INITIALIZER(2), -#endif -#ifdef BSP_USING_PWM3 - [BSP_PWM3_INDEX] = PWM_DRV_INITIALIZER(3), -#endif -#ifdef BSP_USING_PWM4 - [BSP_PWM4_INDEX] = PWM_DRV_INITIALIZER(4), -#endif -#ifdef BSP_USING_PWM5 - [BSP_PWM5_INDEX] = PWM_DRV_INITIALIZER(5), -#endif -#ifdef BSP_USING_PWM6 - [BSP_PWM6_INDEX] = PWM_DRV_INITIALIZER(6), -#endif -#ifdef BSP_USING_PWM7 - [BSP_PWM7_INDEX] = PWM_DRV_INITIALIZER(7), -#endif -#ifdef BSP_USING_PWM8 - [BSP_PWM8_INDEX] = PWM_DRV_INITIALIZER(8), -#endif -#ifdef BSP_USING_PWM9 - [BSP_PWM9_INDEX] = PWM_DRV_INITIALIZER(9), -#endif -}; - - -/* Convert the raw PWM period counts into ns */ -static rt_uint32_t _convert_counts_ns(uint32_t source_div, uint32_t raw) -{ - uint32_t pclkd_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_PCLKD) >> source_div; - uint32_t ns = (uint32_t)(((uint64_t)raw * 1000000000ULL) / pclkd_freq_hz); - return ns; -} - -/* Convert ns into raw PWM period counts */ -static rt_uint32_t _convert_ns_counts(uint32_t source_div, uint32_t raw) -{ - uint32_t pclkd_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_PCLKD) >> source_div; - uint32_t counts = (uint32_t)(((uint64_t)raw * (uint64_t)pclkd_freq_hz) / 1000000000ULL); - return counts; -} - - -/* PWM_CMD_ENABLE or PWM_CMD_DISABLE */ -static rt_err_t drv_pwm_enable(struct ra_pwm *device, - struct rt_pwm_configuration *configuration, - rt_bool_t enable) -{ - fsp_err_t err = FSP_SUCCESS; - - if (enable) - { - err = R_GPT_Start(device->g_ctrl); - } - else - { - err = R_GPT_Stop(device->g_ctrl); - } - - return (err == FSP_SUCCESS) ? RT_EOK : -RT_ERROR; -} - -/* PWM_CMD_GET */ -static rt_err_t drv_pwm_get(struct ra_pwm *device, - struct rt_pwm_configuration *configuration) -{ - timer_info_t info; - if (R_GPT_InfoGet(device->g_ctrl, &info) != FSP_SUCCESS) - return -RT_ERROR; - - configuration->pulse = - _convert_counts_ns(device->g_cfg->source_div, device->g_cfg->duty_cycle_counts); - configuration->period = - _convert_counts_ns(device->g_cfg->source_div, info.period_counts); - configuration->channel = device->g_cfg->channel; - - return RT_EOK; -} - -/* PWM_CMD_SET */ -static rt_err_t drv_pwm_set(struct ra_pwm *device, - struct rt_pwm_configuration *conf) -{ - uint32_t counts; - fsp_err_t fsp_erra; - fsp_err_t fsp_errb; - rt_err_t rt_err; - uint32_t pulse; - uint32_t period; - struct rt_pwm_configuration orig_conf; - - rt_err = drv_pwm_get(device, &orig_conf); - if (rt_err != RT_EOK) - { - return rt_err; - } - - /* Pulse cannot last longer than period. */ - period = conf->period; - pulse = (period >= conf->pulse) ? conf->pulse : period; - - /* Not to set period again if it's not changed. */ - if (period != orig_conf.period) - { - counts = _convert_ns_counts(device->g_cfg->source_div, period); - fsp_erra = R_GPT_PeriodSet(device->g_ctrl, counts); - if (fsp_erra != FSP_SUCCESS) - { - return -RT_ERROR; - } - } - - /* Two pins of a channel will not be separated. */ - counts = _convert_ns_counts(device->g_cfg->source_div, pulse); - fsp_erra = R_GPT_DutyCycleSet(device->g_ctrl, counts, GPT_IO_PIN_GTIOCA); - fsp_errb = R_GPT_DutyCycleSet(device->g_ctrl, counts, GPT_IO_PIN_GTIOCB); - if (fsp_erra != FSP_SUCCESS || fsp_errb != FSP_SUCCESS) - { - return -RT_ERROR; - } - - return RT_EOK; -} - -/** - * Implement of control method in struct rt_pwm_ops. - */ -static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg) -{ - struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg; - struct ra_pwm *pwm_device = (struct ra_pwm *)device->parent.user_data; - - /** - * There's actually only one GPT timer with 10 channels. In this case, the - * timer is separated into 10 PWM devices, so each device has only one - * channel. - */ - if (configuration->channel != 0) - { - return -RT_EINVAL; - } - - switch (cmd) - { - case PWM_CMD_ENABLE: - return drv_pwm_enable(pwm_device, configuration, RT_TRUE); - case PWM_CMD_DISABLE: - return drv_pwm_enable(pwm_device, configuration, RT_FALSE); - case PWM_CMD_GET: - return drv_pwm_get(pwm_device, configuration); - case PWM_CMD_SET: - return drv_pwm_set(pwm_device, configuration); - default: - return -RT_EINVAL; - } - - return RT_EOK; -} - -/** - * This is to register the PWM device - * - * Note that the PWM driver only supports one fixed pin. - */ -int rt_hw_pwm_init(void) -{ - rt_err_t ret = RT_EOK; - rt_err_t rt_err = RT_EOK; - fsp_err_t fsp_err = FSP_SUCCESS; - - for (int i = 0; i < BSP_PWMS_NUM; i++) - { - fsp_err = R_GPT_Open(ra6m4_pwm_obj[i].g_ctrl, - ra6m4_pwm_obj[i].g_cfg); - - rt_err = rt_device_pwm_register(&ra6m4_pwm_obj[i].pwm_device, - ra6m4_pwm_obj[i].name, - &drv_ops, - &ra6m4_pwm_obj[i]); - - if (fsp_err != FSP_SUCCESS || rt_err != RT_EOK) - { - ret = -RT_ERROR; - } - } - - return ret; -} -INIT_BOARD_EXPORT(rt_hw_pwm_init); -#endif /* RT_USING_PWM */ diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_pwm.h b/bsp/renesas/ra6m4-iot/drivers/drv_pwm.h deleted file mode 100644 index 0bf39b8699..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_pwm.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-10-25 KevinXu first version - */ - -#ifndef __DRV_PWM_H__ -#define __DRV_PWM_H__ - -#include -#include -#include -#include -#include -#include - -/* PWM device object structure */ -struct ra_pwm -{ - struct rt_device_pwm pwm_device; - gpt_instance_ctrl_t *g_ctrl; - timer_instance_t const *const g_timer; - timer_cfg_t const *const g_cfg; - char *name; -}; - -/* Get ra6m4 pwm device object from the general pwm device object */ -#define _GET_RA6M4_PWM_OBJ(ptr) rt_container_of(ptr, struct ra_pwm, pwm_device) - -#endif /* __DRV_PWM_H__ */ diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_rtc.c b/bsp/renesas/ra6m4-iot/drivers/drv_rtc.c deleted file mode 100644 index 6c3908eebb..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_rtc.c +++ /dev/null @@ -1,226 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-14 Mr.Tiger first version - */ - -#include -#include -#include "board.h" -#include -#include "hal_data.h" - -#ifdef BSP_USING_ONCHIP_RTC - -#define DBG_TAG "drv.rtc" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ -#include - -static rt_err_t ra_rtc_init(void) -{ - rt_err_t result = RT_EOK; - - if (R_RTC_Open(&g_rtc_ctrl, &g_rtc_cfg) != RT_EOK) - { - LOG_E("rtc init failed."); - result = -RT_ERROR; - } - - return result; -} - -static time_t get_rtc_timestamp(void) -{ - struct tm tm_new = {0}; - rtc_time_t g_current_time = {0}; - - R_RTC_CalendarTimeGet(&g_rtc_ctrl, &g_current_time); - - tm_new.tm_year = g_current_time.tm_year; - tm_new.tm_mon = g_current_time.tm_mon; - tm_new.tm_mday = g_current_time.tm_mday; - - tm_new.tm_hour = g_current_time.tm_hour; - tm_new.tm_min = g_current_time.tm_min; - tm_new.tm_sec = g_current_time.tm_sec; - - tm_new.tm_wday = g_current_time.tm_wday; - tm_new.tm_yday = g_current_time.tm_yday; - tm_new.tm_isdst = g_current_time.tm_isdst; - - return timegm(&tm_new); -} - -static rt_err_t ra_get_secs(void *args) -{ - *(rt_uint32_t *)args = get_rtc_timestamp(); - LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args); - - return RT_EOK; -} - -static rt_err_t set_rtc_time_stamp(time_t time_stamp) -{ - struct tm *p_tm; - rtc_time_t g_current_time = {0}; - p_tm = gmtime(&time_stamp); - if (p_tm->tm_year < 100) - { - return -RT_ERROR; - } - - g_current_time.tm_sec = p_tm->tm_sec ; - g_current_time.tm_min = p_tm->tm_min ; - g_current_time.tm_hour = p_tm->tm_hour; - - g_current_time.tm_mday = p_tm->tm_mday; - g_current_time.tm_mon = p_tm->tm_mon; - g_current_time.tm_year = p_tm->tm_year; - - g_current_time.tm_wday = p_tm->tm_wday; - g_current_time.tm_yday = p_tm->tm_yday; - - if (R_RTC_CalendarTimeSet(&g_rtc_ctrl, &g_current_time) != FSP_SUCCESS) - { - LOG_E("set rtc time failed."); - return -RT_ERROR; - } - - return RT_EOK; -} - -static rt_err_t ra_set_secs(void *args) -{ - - rt_err_t result = RT_EOK; - - if (set_rtc_time_stamp(*(rt_uint32_t *)args)) - { - result = -RT_ERROR; - } - LOG_D("RTC: set rtc_time %x\n", *(rt_uint32_t *)args); - - return result; -} - -#ifdef RT_USING_ALARM -static rt_err_t ra_get_alarm(void *arg) -{ - rt_err_t result = RT_EOK; - struct rt_rtc_wkalarm *wkalarm = (struct rt_rtc_wkalarm *)arg; - rtc_alarm_time_t alarm_time_get = - { - .sec_match = RT_FALSE, - .min_match = RT_FALSE, - .hour_match = RT_FALSE, - .mday_match = RT_FALSE, - .mon_match = RT_FALSE, - .year_match = RT_FALSE, - .dayofweek_match = RT_FALSE, - }; - - if (RT_EOK == R_RTC_CalendarAlarmGet(&g_rtc_ctrl, &alarm_time_get)) - { - wkalarm->tm_hour = alarm_time_get.time.tm_hour; - wkalarm->tm_min = alarm_time_get.time.tm_min; - wkalarm->tm_sec = alarm_time_get.time.tm_sec; - } - else - { - LOG_E("Calendar alarm Get failed."); - } - - return result; -} - -static rt_err_t ra_set_alarm(void *arg) -{ - rt_err_t result = RT_EOK; - struct rt_rtc_wkalarm *wkalarm = (struct rt_rtc_wkalarm *)arg; - rtc_alarm_time_t alarm_time_set = - { - .sec_match = RT_TRUE, - .min_match = RT_TRUE, - .hour_match = RT_TRUE, - .mday_match = RT_FALSE, - .mon_match = RT_FALSE, - .year_match = RT_FALSE, - .dayofweek_match = RT_FALSE, - }; - - alarm_time_set.time.tm_hour = wkalarm->tm_hour; - alarm_time_set.time.tm_min = wkalarm->tm_min; - alarm_time_set.time.tm_sec = wkalarm->tm_sec; - if (1 == wkalarm->enable) - { - if (RT_EOK != R_RTC_CalendarAlarmSet(&g_rtc_ctrl, &alarm_time_set)) - { - LOG_E("Calendar alarm Set failed."); - result = -RT_ERROR; - } - } - else - { - alarm_time_set.sec_match = RT_FALSE; - alarm_time_set.min_match = RT_FALSE; - alarm_time_set.hour_match = RT_FALSE; - if (RT_EOK != R_RTC_CalendarAlarmSet(&g_rtc_ctrl, &alarm_time_set)) - { - LOG_E("Calendar alarm Stop failed."); - result = -RT_ERROR; - } - } - return result; -} -#endif /* RT_USING_ALARM */ - -void rtc_callback(rtc_callback_args_t *p_args) -{ -#ifdef RT_USING_ALARM - static rt_device_t ra_device; - if (RTC_EVENT_ALARM_IRQ == p_args->event) - { - rt_alarm_update(ra_device, 1); - } -#endif -} - -static const struct rt_rtc_ops ra_rtc_ops = -{ - .init = ra_rtc_init, - .get_secs = ra_get_secs, - .set_secs = ra_set_secs, -#ifdef RT_USING_ALARM - .set_alarm = ra_set_alarm, - .get_alarm = ra_get_alarm, -#endif -}; - -static rt_rtc_dev_t ra_rtc_dev; - -static int rt_hw_rtc_init(void) -{ - rt_err_t result; - - ra_rtc_dev.ops = &ra_rtc_ops; - - result = rt_hw_rtc_register(&ra_rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR, RT_NULL); - if (result != RT_EOK) - { - LOG_E("rtc register err code: %d", result); - return result; - } - LOG_D("rtc init success"); - - return RT_EOK; -} -INIT_DEVICE_EXPORT(rt_hw_rtc_init); -#endif \ No newline at end of file diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_sdhi.c b/bsp/renesas/ra6m4-iot/drivers/drv_sdhi.c deleted file mode 100644 index 50f3404f32..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_sdhi.c +++ /dev/null @@ -1,510 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-11-03 mazhiyuan first version - */ - -#include -struct ra_sdhi sdhi; - -#define RTHW_SDIO_LOCK(_sdio) rt_mutex_take(&_sdio->mutex, RT_WAITING_FOREVER) -#define RTHW_SDIO_UNLOCK(_sdio) rt_mutex_release(&_sdio->mutex); - -struct rthw_sdio -{ - struct rt_mmcsd_host *host; - struct ra_sdhi sdhi_des; - struct rt_event event; - struct rt_mutex mutex; -}; - -static struct rt_mmcsd_host *host; - -ALIGN(SDIO_ALIGN_LEN) -static rt_uint8_t cache_buf[SDIO_BUFF_SIZE]; - -rt_err_t command_send(sdhi_instance_ctrl_t *p_ctrl, struct rt_mmcsd_cmd *cmd) -{ - uint32_t wait_bit; - uint32_t timeout = BUSY_TIMEOUT_US; - volatile sdhi_event_t event; - struct rt_mmcsd_data *data = cmd->data; - while (SD_INFO2_CBSY_SDD0MON_IDLE_VAL != - (p_ctrl->p_reg->SD_INFO2 & SD_INFO2_CBSY_SDD0MON_IDLE_MASK)) - { - if (timeout == 0) - { - return RT_ETIMEOUT; - } - R_BSP_SoftwareDelay(1U, BSP_DELAY_UNITS_MICROSECONDS); - timeout--; - } - p_ctrl->p_reg->SD_INFO1 = 0U; - p_ctrl->p_reg->SD_INFO2 = 0U; - p_ctrl->sdhi_event.word = 0U; - - /* Enable response end interrupt. */ - /* Disable access end interrupt and enable response end interrupt. */ - uint32_t mask = p_ctrl->p_reg->SD_INFO1_MASK; - mask &= (~SDHI_INFO1_RESPONSE_END); - mask |= SDHI_INFO1_ACCESS_END; - p_ctrl->p_reg->SD_INFO1_MASK = mask; - p_ctrl->p_reg->SD_INFO2_MASK = SDHI_INFO2_MASK_CMD_SEND; - /* Write argument, then command to the SDHI peripheral. */ - p_ctrl->p_reg->SD_ARG = cmd->arg & UINT16_MAX; - p_ctrl->p_reg->SD_ARG1 = cmd->arg >> 16; - - if ((cmd->flags & CMD_MASK) == CMD_ADTC) - { - cmd->cmd_code |= SDHI_CMD_ADTC_EN; - switch (cmd->flags & RESP_MASK) - { - case RESP_R1: - case RESP_R5: - case RESP_R6: - case RESP_R7: - cmd->cmd_code |= SDHI_CMD_RESP_TYPE_EXT_R1_R5_R6_R7; - break; - case RESP_R1B: - cmd->cmd_code |= SDHI_CMD_RESP_TYPE_EXT_R1B; - break; - case RESP_R2: - cmd->cmd_code |= SDHI_CMD_RESP_TYPE_EXT_R2; - break; - case RESP_R3: - case RESP_R4: - cmd->cmd_code |= SDHI_CMD_RESP_TYPE_EXT_R3_R4; - break; - case RESP_NONE: - cmd->cmd_code |= SDHI_CMD_RESP_TYPE_EXT_NONE; - break; - } - if (data != RT_NULL) - { - if ((data->flags & 7) == DATA_DIR_WRITE) - { - cmd->cmd_code &= ~SDHI_CMD_DATA_DIR_READ; - } - else if ((data->flags & 7) == DATA_DIR_READ) - { - cmd->cmd_code |= SDHI_CMD_DATA_DIR_READ; - } - } - } - p_ctrl->p_reg->SD_CMD = cmd->cmd_code; - - timeout = 100000; - while (true) - { - /* Check for updates to the event status. */ - event.word = p_ctrl->sdhi_event.word; - - /* Return an error if a hardware error occurred. */ - if (event.bit.event_error) - { - cmd->err = -RT_ERROR; - if ((event.word & HW_SDHI_ERR_CRCE) && (resp_type(cmd) & (RESP_R3 | RESP_R4))) - { - if ((cmd->flags & RESP_MASK) == RESP_R2) - { - cmd->resp[0] = (p_ctrl->p_reg->SD_RSP76 << 8) | (p_ctrl->p_reg->SD_RSP54 >> 24); - cmd->resp[1] = (p_ctrl->p_reg->SD_RSP54 << 8) | (p_ctrl->p_reg->SD_RSP32 >> 24); - cmd->resp[2] = (p_ctrl->p_reg->SD_RSP32 << 8) | (p_ctrl->p_reg->SD_RSP10 >> 24); - cmd->resp[3] = (p_ctrl->p_reg->SD_RSP10 << 8); - } - else - { - cmd->resp[0] = p_ctrl->p_reg->SD_RSP10; - } - cmd->err = RT_EOK; - } - if (event.word & HW_SDHI_ERR_RTIMEOUT) - { - cmd->err = -RT_ETIMEOUT; - } - if (event.word & HW_SDHI_ERR_DTIMEOUT) - { - data->err = -RT_ETIMEOUT; - } - return -RT_ERROR; - } - if (data != RT_NULL) - { - wait_bit = SDHI_WAIT_ACCESS_BIT; - } - else - { - wait_bit = SDHI_WAIT_RESPONSE_BIT; - } - - /* If the requested bit is set, return success. */ - if (event.word & (1U << wait_bit)) - { - cmd->err = RT_EOK; - if ((cmd->flags & RESP_MASK) == RESP_R2) - { - cmd->resp[0] = (p_ctrl->p_reg->SD_RSP76 << 8) | (p_ctrl->p_reg->SD_RSP54 >> 24); - cmd->resp[1] = (p_ctrl->p_reg->SD_RSP54 << 8) | (p_ctrl->p_reg->SD_RSP32 >> 24); - cmd->resp[2] = (p_ctrl->p_reg->SD_RSP32 << 8) | (p_ctrl->p_reg->SD_RSP10 >> 24); - cmd->resp[3] = (p_ctrl->p_reg->SD_RSP10 << 8); - } - else - { - cmd->resp[0] = p_ctrl->p_reg->SD_RSP10; - } - - return RT_EOK; - } - - /* Check for timeout. */ - timeout--; - if (0U == timeout) - { - cmd->err = -RT_ETIMEOUT; - return RT_ERROR; - } - - /* Wait 1 us for consistent loop timing. */ - R_BSP_SoftwareDelay(1U, BSP_DELAY_UNITS_MICROSECONDS); - } -} - -rt_err_t transfer_write(sdhi_instance_ctrl_t *const p_ctrl, - uint32_t block_count, - uint32_t bytes, - const uint8_t *p_data) -{ - transfer_info_t *p_info = p_ctrl->p_cfg->p_lower_lvl_transfer->p_cfg->p_info; - - /* When the SD_DMAEN.DMAEN bit is 1, set the SD_INFO2_MASK.BWEM bit to 1 and the SD_INFO2_MASK.BREM bit to 1. */ - p_ctrl->p_reg->SD_INFO2_MASK |= 0x300U; - p_ctrl->p_reg->SD_DMAEN = 0x2U; - - uint32_t transfer_settings = (uint32_t)TRANSFER_MODE_BLOCK << TRANSFER_SETTINGS_MODE_BITS; - transfer_settings |= TRANSFER_ADDR_MODE_INCREMENTED << TRANSFER_SETTINGS_SRC_ADDR_BITS; - transfer_settings |= TRANSFER_SIZE_4_BYTE << TRANSFER_SETTINGS_SIZE_BITS; - -#if SDMMC_CFG_UNALIGNED_ACCESS_ENABLE - if ((0U != ((uint32_t)p_data & 0x3U)) || (0U != (bytes & 3U))) - { - transfer_settings |= TRANSFER_IRQ_EACH << TRANSFER_SETTINGS_IRQ_BITS; - transfer_settings |= TRANSFER_REPEAT_AREA_SOURCE << TRANSFER_SETTINGS_REPEAT_AREA_BITS; - - /* If the pointer is not 4-byte aligned or the number of bytes is not a multiple of 4, use a temporary buffer. - * Transfer the first block to the temporary buffer before enabling the transfer. Subsequent blocks will be - * transferred from the user buffer to the temporary buffer in an interrupt after each block transfer. */ - rt_memcpy((void *)&p_ctrl->aligned_buff[0], p_data, bytes); - p_info->p_src = &p_ctrl->aligned_buff[0]; - - p_ctrl->transfer_block_current = 1U; - p_ctrl->transfer_blocks_total = block_count; - p_ctrl->p_transfer_data = (uint8_t *)&p_data[bytes]; - p_ctrl->transfer_dir = SDHI_TRANSFER_DIR_WRITE; - p_ctrl->transfer_block_size = bytes; - } - else -#endif - { - p_info->p_src = p_data; - } - - p_info->transfer_settings_word = transfer_settings; - p_info->p_dest = (uint32_t *)(&p_ctrl->p_reg->SD_BUF0); - p_info->num_blocks = (uint16_t)block_count; - - /* Round up to the nearest multiple of 4 bytes for the transfer. */ - uint32_t words = (bytes + (sizeof(uint32_t) - 1U)) / sizeof(uint32_t); - p_info->length = (uint16_t)words; - /* Configure the transfer driver to write to the SD buffer. */ - fsp_err_t err = p_ctrl->p_cfg->p_lower_lvl_transfer->p_api->reconfigure(p_ctrl->p_cfg->p_lower_lvl_transfer->p_ctrl, - p_ctrl->p_cfg->p_lower_lvl_transfer->p_cfg->p_info); - if (FSP_SUCCESS != err) - return RT_ERROR; - return RT_EOK; -} - -rt_err_t transfer_read(sdhi_instance_ctrl_t *const p_ctrl, - uint32_t block_count, - uint32_t bytes, - void *p_data) -{ - transfer_info_t *p_info = p_ctrl->p_cfg->p_lower_lvl_transfer->p_cfg->p_info; - - /* When the SD_DMAEN.DMAEN bit is 1, set the SD_INFO2_MASK.BWEM bit to 1 and the SD_INFO2_MASK.BREM bit to 1. */ - p_ctrl->p_reg->SD_INFO2_MASK |= 0X300U; - p_ctrl->p_reg->SD_DMAEN = 0x2U; - - uint32_t transfer_settings = (uint32_t)TRANSFER_MODE_BLOCK << TRANSFER_SETTINGS_MODE_BITS; - transfer_settings |= TRANSFER_ADDR_MODE_INCREMENTED << TRANSFER_SETTINGS_DEST_ADDR_BITS; - transfer_settings |= TRANSFER_SIZE_4_BYTE << TRANSFER_SETTINGS_SIZE_BITS; - -#if SDMMC_CFG_UNALIGNED_ACCESS_ENABLE - - /* If the pointer is not 4-byte aligned or the number of bytes is not a multiple of 4, use a temporary buffer. - * Data will be transferred from the temporary buffer into the user buffer in an interrupt after each block transfer. */ - if ((0U != ((uint32_t)p_data & 0x3U)) || (0U != (bytes & 3U))) - { - transfer_settings |= TRANSFER_IRQ_EACH << TRANSFER_SETTINGS_IRQ_BITS; - p_info->p_dest = &p_ctrl->aligned_buff[0]; - - p_ctrl->transfer_block_current = 0U; - p_ctrl->transfer_blocks_total = block_count; - p_ctrl->p_transfer_data = (uint8_t *)p_data; - p_ctrl->transfer_dir = SDHI_TRANSFER_DIR_READ; - p_ctrl->transfer_block_size = bytes; - } - else -#endif - { - transfer_settings |= TRANSFER_REPEAT_AREA_SOURCE << TRANSFER_SETTINGS_REPEAT_AREA_BITS; - p_info->p_dest = p_data; - } - - p_info->transfer_settings_word = transfer_settings; - p_info->p_src = (uint32_t *)(&p_ctrl->p_reg->SD_BUF0); - p_info->num_blocks = (uint16_t)block_count; - - /* Round up to the nearest multiple of 4 bytes for the transfer. */ - uint32_t words = (bytes + (sizeof(uint32_t) - 1U)) / sizeof(uint32_t); - p_info->length = (uint16_t)words; - - /* Configure the transfer driver to read from the SD buffer. */ - fsp_err_t err = p_ctrl->p_cfg->p_lower_lvl_transfer->p_api->reconfigure(p_ctrl->p_cfg->p_lower_lvl_transfer->p_ctrl, - p_ctrl->p_cfg->p_lower_lvl_transfer->p_cfg->p_info); - if (err != FSP_SUCCESS) - return RT_ERROR; - - return RT_EOK; -} - -void ra_sdhi_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req) -{ - struct rthw_sdio *sdio = host->private_data; - struct rt_mmcsd_data *data; - static rt_uint8_t *buffer; - - RTHW_SDIO_LOCK(sdio); - - if (req->cmd != RT_NULL) - { - data = req->cmd->data; - if (data != RT_NULL) - { - rt_uint32_t size = data->blks * data->blksize; - - RT_ASSERT(size <= SDIO_BUFF_SIZE); - - buffer = (rt_uint8_t *)data->buf; - if ((rt_uint32_t)data->buf & (SDIO_ALIGN_LEN - 1)) - { - buffer = cache_buf; - if (data->flags & DATA_DIR_WRITE) - { - rt_memcpy(cache_buf, data->buf, size); - } - } - if (data->flags & DATA_DIR_WRITE) - { - transfer_write(sdio->sdhi_des.instance->p_ctrl, data->blks, data->blksize, buffer); - } - else if (data->flags & DATA_DIR_READ) - { - transfer_read(sdio->sdhi_des.instance->p_ctrl, data->blks, data->blksize, buffer); - } - /* Set the sector count. */ - if (data->blks > 1U) - { - ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_STOP = 0x100U; - ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_SECCNT = data->blks; - } - else - { - ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_STOP = 0U; - } - ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_SIZE = data->blksize; - } - rt_enter_critical(); - command_send(sdio->sdhi_des.instance->p_ctrl, req->cmd); - rt_exit_critical(); - if ((data != RT_NULL) && (data->flags & DATA_DIR_READ) && ((rt_uint32_t)data->buf & (SDIO_ALIGN_LEN - 1))) - { - rt_memcpy(data->buf, cache_buf, data->blksize * data->blks); - } - } - - if (req->stop != RT_NULL) - { - rt_enter_critical(); - command_send(sdio->sdhi_des.instance->p_ctrl, req->stop); - rt_exit_critical(); - } - RTHW_SDIO_UNLOCK(sdio); - mmcsd_req_complete(sdio->host); -} - -static rt_err_t clock_rate_set(sdhi_instance_ctrl_t *p_ctrl, uint32_t max_rate) -{ - uint32_t setting = 0xFFU; - - /* Get the runtime frequency of the source of the SD clock */ - uint32_t frequency = R_FSP_SystemClockHzGet(BSP_FEATURE_SDHI_CLOCK); - - /* Iterate over all possible divisors, starting with the smallest, until the resulting clock rate is less than - * or equal to the requested maximum rate. */ - for (uint32_t divisor_shift = BSP_FEATURE_SDHI_MIN_CLOCK_DIVISION_SHIFT; - divisor_shift <= 9U; - divisor_shift++) - { - if ((frequency >> divisor_shift) <= max_rate) - { - /* If the calculated frequency is less than or equal to the maximum supported by the device, - * select this frequency. The register setting is the divisor value divided by 4, or 0xFF for no divider. */ - setting = divisor_shift ? ((1U << divisor_shift) >> 2U) : UINT8_MAX; - - /* Set the clock setting. */ - - /* The clock register is accessible 8 SD clock counts after the last command completes. Each register access - * requires at least one PCLK count, so check the register up to 8 times the maximum PCLK divisor value (512). */ - uint32_t timeout = 8U * 512U; - - while (timeout > 0U) - { - /* Do not write to clock control register until this bit is set. */ - if (p_ctrl->p_reg->SD_INFO2_b.SD_CLK_CTRLEN) - { - /* Set the calculated divider and enable clock output to start the 74 clocks required before - * initialization. Do not change the automatic clock control setting. */ - uint32_t clkctrlen = p_ctrl->p_reg->SD_CLK_CTRL & (1U << 9); - p_ctrl->p_reg->SD_CLK_CTRL = setting | clkctrlen | (1U << 8); - p_ctrl->device.clock_rate = frequency >> divisor_shift; - - return RT_EOK; - } - - timeout--; - } - - /* Valid setting already found, stop looking. */ - break; - } - } - - return RT_ERROR; -} - -void ra_sdhi_set_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg) -{ - struct rthw_sdio *sdio = host->private_data; - RTHW_SDIO_LOCK(sdio); - if (io_cfg->bus_width == MMCSD_BUS_WIDTH_1) - { - ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_OPTION_b.WIDTH = 1; - } - else if (io_cfg->bus_width == MMCSD_BUS_WIDTH_4) - { - ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_OPTION_b.WIDTH = 0; - ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_OPTION_b.WIDTH8 = 0; - } - else if (io_cfg->bus_width == MMCSD_BUS_WIDTH_8) - { - ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_OPTION_b.WIDTH = 0; - ((sdhi_instance_ctrl_t *)sdio->sdhi_des.instance->p_ctrl)->p_reg->SD_OPTION_b.WIDTH8 = 1; - } - clock_rate_set(sdio->sdhi_des.instance->p_ctrl, io_cfg->clock); - RTHW_SDIO_UNLOCK(sdio); -} - -rt_int32_t ra_sdhi_get_card_status(struct rt_mmcsd_host *host) -{ - sdmmc_status_t status; - struct rthw_sdio *sdio = host->private_data; - sdio->sdhi_des.instance->p_api->statusGet(sdio->sdhi_des.instance->p_ctrl, &status); - return status.card_inserted; -} - -void ra_sdhi_enable_sdio_irq(struct rt_mmcsd_host *host, rt_int32_t en) -{ - struct rthw_sdio *sdio = host->private_data; - sdio->sdhi_des.instance->p_api->ioIntEnable(sdio->sdhi_des.instance->p_ctrl, en); -} - -struct rt_mmcsd_host_ops ra_sdhi_ops = -{ - .request = ra_sdhi_request, - .set_iocfg = ra_sdhi_set_iocfg, - .get_card_status = ra_sdhi_get_card_status, - .enable_sdio_irq = ra_sdhi_enable_sdio_irq -}; - -void sdhi_callback(sdmmc_callback_args_t *p_args) -{ -} - -struct rt_mmcsd_host *sdio_host_create(struct ra_sdhi *sdhi_des) -{ - struct rt_mmcsd_host *host; - struct rthw_sdio *sdio = RT_NULL; - - if (sdhi_des == RT_NULL) - return RT_NULL; - - sdio = rt_malloc(sizeof(struct rthw_sdio)); - if (sdio == RT_NULL) - return RT_NULL; - rt_memset(sdio, 0, sizeof(struct rthw_sdio)); - - host = mmcsd_alloc_host(); - if (host == RT_NULL) - { - rt_free(sdio); - return RT_NULL; - } - - rt_memcpy(&sdio->sdhi_des, sdhi_des, sizeof(struct ra_sdhi)); - - rt_event_init(&sdio->event, "sdio", RT_IPC_FLAG_FIFO); - rt_mutex_init(&sdio->mutex, "sdio", RT_IPC_FLAG_FIFO); - - /* set host defautl attributes */ - host->ops = &ra_sdhi_ops; - host->freq_min = 400 * 1000; - host->freq_max = SDIO_MAX_FREQ; - host->valid_ocr = 0X00FFFF80; /* The voltage range supported is 1.65v-3.6v */ -#ifndef SDHI_USING_1_BIT - host->flags = MMCSD_BUSWIDTH_4 | MMCSD_MUTBLKWRITE | MMCSD_SUP_SDIO_IRQ; -#else - host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_SDIO_IRQ; -#endif - host->max_seg_size = SDIO_BUFF_SIZE; - host->max_dma_segs = 1; - host->max_blk_size = 512; - host->max_blk_count = 512; - - /* link up host and sdio */ - sdio->host = host; - host->private_data = sdio; - - ra_sdhi_enable_sdio_irq(host, 1); - - /* ready to change */ - mmcsd_change(host); - - return host; -} - -int rt_hw_sdhi_init(void) -{ - sdhi.instance = &g_sdmmc0; - sdhi.instance->p_api->open(sdhi.instance->p_ctrl, sdhi.instance->p_cfg); - host = sdio_host_create(&sdhi); - if (host == RT_NULL) - { - return -1; - } - return 0; -} -INIT_DEVICE_EXPORT(rt_hw_sdhi_init); diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_sdhi.h b/bsp/renesas/ra6m4-iot/drivers/drv_sdhi.h deleted file mode 100644 index e65ea5c510..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_sdhi.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-11-03 mazhiyuan first version - */ - -#ifndef __DRV_SDHI_H__ -#define __DRV_SDHI_H__ - -#include -#include -#include -#include -#include -#include - -#ifndef SDIO_BUFF_SIZE - #define SDIO_BUFF_SIZE 4096 -#endif - -#ifndef SDIO_ALIGN_LEN - #define SDIO_ALIGN_LEN (32) -#endif - -#define SD_INFO2_CBSY_SDD0MON_IDLE_VAL 0x80 -#define SD_INFO2_CBSY_SDD0MON_IDLE_MASK 0x4080 -#define BUSY_TIMEOUT_US 5000000 - -#define SDHI_INFO1_RESPONSE_END 1 -#define SDHI_INFO1_ACCESS_END (1 << 2) -#define SDHI_INFO2_MASK_CMD_SEND 0x00007C80U -#define SDHI_INFO2_BRE (1 << 8) -#define SDHI_INFO2_BWE (1 << 9) - -#define SDHI_CMD_RESP_TYPE_EXT_NONE (0 << 8) -#define SDHI_CMD_RESP_TYPE_EXT_R1_R5_R6_R7 (4 << 8) -#define SDHI_CMD_RESP_TYPE_EXT_R1B (5 << 8) -#define SDHI_CMD_RESP_TYPE_EXT_R2 (6 << 8) -#define SDHI_CMD_RESP_TYPE_EXT_R3_R4 (7 << 8) -#define SDHI_CMD_ADTC_EN (1 << 11) -#define SDHI_CMD_DATA_DIR_READ (1 << 12) -#define SDHI_BLK_TRANSFER (1 << 13) - -#define SDIO_MAX_FREQ 25000000 - -#define HW_SDHI_ERR_CRCE (0x01U << 17) -#define HW_SDHI_ERR_RTIMEOUT (0x01U << 22) -#define HW_SDHI_ERR_DTIMEOUT (0x01U << 19) - -#define SDHI_WAIT_ACCESS_BIT 2 -#define SDHI_WAIT_RESPONSE_BIT 0 - -#define SDIO_TX_RX_COMPLETE_TIMEOUT_LOOPS (1000000U) - -struct ra_sdhi -{ - const sdmmc_instance_t *instance; - sdmmc_device_t *media_device; -}; - -#endif diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_soft_i2c.c b/bsp/renesas/ra6m4-iot/drivers/drv_soft_i2c.c deleted file mode 100644 index 2bd18241fa..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_soft_i2c.c +++ /dev/null @@ -1,218 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#include "board.h" -#include "drv_soft_i2c.h" -#include "drv_config.h" - -#ifdef RT_USING_I2C - -#define DBG_TAG "drv.i2c" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ - -#if !defined(BSP_USING_I2C0) && !defined(BSP_USING_I2C1) - #error "Please define at least one BSP_USING_I2Cx" - /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */ -#endif - -static const struct ra_soft_i2c_config soft_i2c_config[] = -{ -#ifdef BSP_USING_I2C0 - I2C0_BUS_CONFIG, -#endif -#ifdef BSP_USING_I2C1 - I2C1_BUS_CONFIG, -#endif -}; - -static struct ra_i2c i2c_obj[sizeof(soft_i2c_config) / sizeof(soft_i2c_config[0])]; - -/** - * This function initializes the i2c pin. - * - * @param ra i2c dirver class. - */ -static void ra_i2c_gpio_init(struct ra_i2c *i2c) -{ - struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)i2c->ops.data; - - rt_pin_mode(cfg->scl, PIN_MODE_OUTPUT_OD); - rt_pin_mode(cfg->sda, PIN_MODE_OUTPUT_OD); - - rt_pin_write(cfg->scl, PIN_HIGH); - rt_pin_write(cfg->sda, PIN_HIGH); -} - -/** - * This function sets the sda pin. - * - * @param ra config class. - * @param The sda pin state. - */ -static void ra_set_sda(void *data, rt_int32_t state) -{ - struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)data; - if (state) - { - rt_pin_write(cfg->sda, PIN_HIGH); - } - else - { - rt_pin_write(cfg->sda, PIN_LOW); - } -} - -/** - * This function sets the scl pin. - * - * @param ra config class. - * @param The scl pin state. - */ -static void ra_set_scl(void *data, rt_int32_t state) -{ - struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)data; - if (state) - { - rt_pin_write(cfg->scl, PIN_HIGH); - } - else - { - rt_pin_write(cfg->scl, PIN_LOW); - } -} - -/** - * This function gets the sda pin state. - * - * @param The sda pin state. - */ -static rt_int32_t ra_get_sda(void *data) -{ - struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)data; - return rt_pin_read(cfg->sda); -} - -/** - * This function gets the scl pin state. - * - * @param The scl pin state. - */ -static rt_int32_t ra_get_scl(void *data) -{ - struct ra_soft_i2c_config *cfg = (struct ra_soft_i2c_config *)data; - return rt_pin_read(cfg->scl); -} -/** - * The time delay function. - * - * @param microseconds. - */ -static void ra_udelay(rt_uint32_t us) -{ - rt_uint32_t ticks; - rt_uint32_t told, tnow, tcnt = 0; - rt_uint32_t reload = SysTick->LOAD; - - ticks = us * reload / (1000000 / RT_TICK_PER_SECOND); - told = SysTick->VAL; - while (1) - { - tnow = SysTick->VAL; - if (tnow != told) - { - if (tnow < told) - { - tcnt += told - tnow; - } - else - { - tcnt += reload - tnow + told; - } - told = tnow; - if (tcnt >= ticks) - { - break; - } - } - } -} - -static const struct rt_i2c_bit_ops ra_bit_ops_default = -{ - .data = RT_NULL, - .set_sda = ra_set_sda, - .set_scl = ra_set_scl, - .get_sda = ra_get_sda, - .get_scl = ra_get_scl, - .udelay = ra_udelay, - .delay_us = 1, - .timeout = 100 -}; - -/** - * if i2c is locked, this function will unlock it - * - * @param ra config class - * - * @return RT_EOK indicates successful unlock. - */ -static rt_err_t ra_i2c_bus_unlock(const struct ra_soft_i2c_config *cfg) -{ - rt_int32_t i = 0; - - if (PIN_LOW == rt_pin_read(cfg->sda)) - { - while (i++ < 9) - { - rt_pin_write(cfg->scl, PIN_HIGH); - ra_udelay(100); - rt_pin_write(cfg->scl, PIN_LOW); - ra_udelay(100); - } - } - if (PIN_LOW == rt_pin_read(cfg->sda)) - { - return -RT_ERROR; - } - - return RT_EOK; -} - -/* I2C initialization function */ -int rt_hw_i2c_init(void) -{ - rt_size_t obj_num = sizeof(i2c_obj) / sizeof(struct ra_i2c); - rt_err_t result; - - for (int i = 0; i < obj_num; i++) - { - i2c_obj[i].ops = ra_bit_ops_default; - i2c_obj[i].ops.data = (void *)&soft_i2c_config[i]; - i2c_obj[i].i2c2_bus.priv = &i2c_obj[i].ops; - ra_i2c_gpio_init(&i2c_obj[i]); - result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); - RT_ASSERT(result == RT_EOK); - ra_i2c_bus_unlock(&soft_i2c_config[i]); - - LOG_D("software simulation %s init done, pin scl: %d, pin sda %d", - soft_i2c_config[i].bus_name, - soft_i2c_config[i].scl, - soft_i2c_config[i].sda); - } - - return RT_EOK; -} -INIT_BOARD_EXPORT(rt_hw_i2c_init); - -#endif /* RT_USING_I2C */ diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_soft_i2c.h b/bsp/renesas/ra6m4-iot/drivers/drv_soft_i2c.h deleted file mode 100644 index 098810b433..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_soft_i2c.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#ifndef __DRV_I2C__ -#define __DRV_I2C__ - -#include -#include -#include -#include - -/* ra config class */ -struct ra_soft_i2c_config -{ - rt_uint32_t scl; - rt_uint32_t sda; - const char *bus_name; -}; -/* ra i2c dirver class */ -struct ra_i2c -{ - struct rt_i2c_bit_ops ops; - struct rt_i2c_bus_device i2c2_bus; -}; - -#ifdef BSP_USING_I2C1 -#define I2C1_BUS_CONFIG \ - { \ - .scl = BSP_I2C1_SCL_PIN, \ - .sda = BSP_I2C1_SDA_PIN, \ - .bus_name = "i2c1", \ - } -#endif - -#ifdef BSP_USING_I2C2 -#define I2C2_BUS_CONFIG \ - { \ - .scl = BSP_I2C2_SCL_PIN, \ - .sda = BSP_I2C2_SDA_PIN, \ - .bus_name = "i2c2", \ - } -#endif - -int rt_hw_i2c_init(void); - -#endif diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_spi.c b/bsp/renesas/ra6m4-iot/drivers/drv_spi.c deleted file mode 100644 index e26ae6db09..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_spi.c +++ /dev/null @@ -1,290 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-23 Mr.Tiger first version - * 2021-11-04 Sherman ADD complete_event - */ -/**< Note : Turn on any DMA mode and all SPIs will turn on DMA */ - -#include "drv_spi.h" - -#ifdef RT_USING_SPI - -//#define DRV_DEBUG -#define DBG_TAG "drv.spi" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ -#include - -#define RA_SPI0_EVENT 0x00 -#define RA_SPI1_EVENT 0x01 -static struct rt_event complete_event = {0}; - -static struct ra_spi_handle spi_handle[] = -{ -#ifdef BSP_USING_SPI0 - {.bus_name = "spi0", .spi_ctrl_t = &g_spi0_ctrl, .spi_cfg_t = &g_spi0_cfg,}, -#endif - -#ifdef BSP_USING_SPI1 - {.bus_name = "spi1", .spi_ctrl_t = &g_spi1_ctrl, .spi_cfg_t = &g_spi1_cfg,}, -#endif -}; - -static struct ra_spi spi_config[sizeof(spi_handle) / sizeof(spi_handle[0])] = {0}; - -void g_spi0_callback(spi_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (SPI_EVENT_TRANSFER_COMPLETE == p_args->event) - { - rt_event_send(&complete_event, RA_SPI0_EVENT); - } - rt_interrupt_leave(); -} - -void g_spi1_callback(spi_callback_args_t *p_args) -{ - rt_interrupt_enter(); - if (SPI_EVENT_TRANSFER_COMPLETE == p_args->event) - { - rt_event_send(&complete_event, RA_SPI1_EVENT); - } - rt_interrupt_leave(); -} - -static rt_err_t ra_wait_complete(rt_event_t event, const char bus_name[RT_NAME_MAX]) -{ - rt_uint32_t recved = 0x00; - - if (bus_name[3] == '0') - { - return rt_event_recv(event, - RA_SPI0_EVENT, - RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, - RT_WAITING_FOREVER, - &recved); - } - else if (bus_name[3] == '1') - { - return rt_event_recv(event, - RA_SPI1_EVENT, - RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, - RT_WAITING_FOREVER, - &recved); - } - return -RT_EINVAL; -} - -static spi_bit_width_t ra_width_shift(rt_uint8_t data_width) -{ - spi_bit_width_t bit_width; - if(data_width == 1) - bit_width = SPI_BIT_WIDTH_8_BITS; - else if(data_width == 2) - bit_width = SPI_BIT_WIDTH_16_BITS; - else if(data_width == 4) - bit_width = SPI_BIT_WIDTH_32_BITS; - - return bit_width; -} - -static rt_err_t ra_write_message(struct rt_spi_device *device, const void *send_buf, const rt_size_t len) -{ - RT_ASSERT(device != NULL); - RT_ASSERT(device->parent.user_data != NULL); - RT_ASSERT(send_buf != NULL); - RT_ASSERT(len > 0); - rt_err_t err = RT_EOK; - struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); - - spi_bit_width_t bit_width = ra_width_shift(spi_dev->rt_spi_cfg_t->data_width); - /**< send msessage */ - err = R_SPI_Write((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, send_buf, len, bit_width); - if (RT_EOK != err) - { - LOG_E("%s write failed.", spi_dev->ra_spi_handle_t->bus_name); - return -RT_ERROR; - } - /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */ - ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name); - return len; -} - -static rt_err_t ra_read_message(struct rt_spi_device *device, void *recv_buf, const rt_size_t len) -{ - RT_ASSERT(device != NULL); - RT_ASSERT(device->parent.user_data != NULL); - RT_ASSERT(recv_buf != NULL); - RT_ASSERT(len > 0); - rt_err_t err = RT_EOK; - struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); - - spi_bit_width_t bit_width = ra_width_shift(spi_dev->rt_spi_cfg_t->data_width); - /**< receive message */ - err = R_SPI_Read((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, recv_buf, len, bit_width); - if (RT_EOK != err) - { - LOG_E("\n%s write failed.\n", spi_dev->ra_spi_handle_t->bus_name); - return -RT_ERROR; - } - /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */ - ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name); - return len; -} - -static rt_err_t ra_write_read_message(struct rt_spi_device *device, struct rt_spi_message *message) -{ - RT_ASSERT(device != NULL); - RT_ASSERT(message != NULL); - RT_ASSERT(message->length > 0); - rt_err_t err = RT_EOK; - struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); - - spi_bit_width_t bit_width = ra_width_shift(spi_dev->rt_spi_cfg_t->data_width); - /**< write and receive message */ - err = R_SPI_WriteRead((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, message->send_buf, message->recv_buf, message->length, bit_width); - if (RT_EOK != err) - { - LOG_E("%s write and read failed.", spi_dev->ra_spi_handle_t->bus_name); - return -RT_ERROR; - } - /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */ - ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name); - return message->length; -} - -/**< init spi TODO : MSB does not support modification */ -static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device, - struct rt_spi_configuration *configuration) -{ - RT_ASSERT(device != NULL); - RT_ASSERT(configuration != NULL); - rt_err_t err = RT_EOK; - - struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); - spi_dev->cs_pin = (rt_uint32_t)device->parent.user_data; - - /**< data_width : 1 -> 8 bits , 2 -> 16 bits, 4 -> 32 bits, default 32 bits*/ - rt_uint8_t data_width = configuration->data_width / 8; - RT_ASSERT(data_width == 1 || data_width == 2 || data_width == 4); - configuration->data_width = configuration->data_width / 8; - spi_dev->rt_spi_cfg_t = configuration; - - spi_extended_cfg_t *spi_cfg = (spi_extended_cfg_t *)spi_dev->ra_spi_handle_t->spi_cfg_t->p_extend; - - /**< Configure Select Line */ - rt_pin_write(spi_dev->cs_pin, PIN_HIGH); - - /**< config bitrate */ - R_SPI_CalculateBitrate(spi_dev->rt_spi_cfg_t->max_hz, &spi_cfg->spck_div); - - /**< init */ - err = R_SPI_Open((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, (spi_cfg_t const * const)spi_dev->ra_spi_handle_t->spi_cfg_t); - /* handle error */ - if (RT_EOK != err) - { - LOG_E("%s init failed.", spi_dev->ra_spi_handle_t->bus_name); - return -RT_ERROR; - } - return RT_EOK; -} - -static rt_uint32_t ra_spixfer(struct rt_spi_device *device, struct rt_spi_message *message) -{ - RT_ASSERT(device != RT_NULL); - RT_ASSERT(device->bus != RT_NULL); - RT_ASSERT(message != RT_NULL); - - rt_err_t err = RT_EOK; - struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus); - spi_dev->cs_pin = (rt_uint32_t)device->parent.user_data; - - if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS)) - { - if (device->config.mode & RT_SPI_CS_HIGH) - rt_pin_write(spi_dev->cs_pin, PIN_HIGH); - else - rt_pin_write(spi_dev->cs_pin, PIN_LOW); - } - - if (message->length > 0) - { - if (message->send_buf == RT_NULL && message->recv_buf != RT_NULL) - { - /**< receive message */ - err = ra_read_message(device, (void *)message->recv_buf, (const rt_size_t)message->length); - } - else if (message->send_buf != RT_NULL && message->recv_buf == RT_NULL) - { - /**< send message */ - err = ra_write_message(device, (const void *)message->send_buf, (const rt_size_t)message->length); - } - else if (message->send_buf != RT_NULL && message->recv_buf != RT_NULL) - { - /**< send and receive message */ - err = ra_write_read_message(device, message); - } - } - - if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS)) - { - if (device->config.mode & RT_SPI_CS_HIGH) - rt_pin_write(spi_dev->cs_pin, PIN_LOW); - else - rt_pin_write(spi_dev->cs_pin, PIN_HIGH); - } - return err; -} - -static const struct rt_spi_ops ra_spi_ops = -{ - .configure = ra_hw_spi_configure, - .xfer = ra_spixfer, -}; - -void rt_hw_spi_device_attach(struct rt_spi_device *device, const char *device_name, const char *bus_name, void *user_data) -{ - RT_ASSERT(device != NULL); - RT_ASSERT(device_name != NULL); - RT_ASSERT(bus_name != NULL); - RT_ASSERT(user_data != NULL); - - rt_err_t err = rt_spi_bus_attach_device(device, device_name, bus_name, user_data); - if (RT_EOK != err) - { - LOG_E("%s attach failed.", bus_name); - } -} - -int ra_hw_spi_init(void) -{ - for (rt_uint8_t spi_index = 0; spi_index < sizeof(spi_handle) / sizeof(spi_handle[0]); spi_index++) - { - spi_config[spi_index].ra_spi_handle_t = &spi_handle[spi_index]; - - /**< register spi bus */ - rt_err_t err = rt_spi_bus_register(&spi_config[spi_index].bus, spi_handle[spi_index].bus_name, &ra_spi_ops); - if (RT_EOK != err) - { - LOG_E("%s bus register failed.", spi_config[spi_index].ra_spi_handle_t->bus_name); - return -RT_ERROR; - } - } - - if (RT_EOK != rt_event_init(&complete_event, "ra_spi", RT_IPC_FLAG_PRIO)) - { - LOG_E("SPI transfer event init fail!"); - return -RT_ERROR; - } - return RT_EOK; -} -INIT_BOARD_EXPORT(ra_hw_spi_init); -#endif /* RT_USING_SPI */ diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_spi.h b/bsp/renesas/ra6m4-iot/drivers/drv_spi.h deleted file mode 100644 index cb52433fc5..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_spi.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-23 Mr.Tiger first version - */ - -#ifndef __DRV_SPI_H__ -#define __DRV_SPI_H__ - -#include -#include -#include "hal_data.h" -#include "board.h" -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef R_SPI_H -struct ra_spi_handle -{ - const char bus_name[RT_NAME_MAX]; - const spi_cfg_t *spi_cfg_t; - const spi_instance_ctrl_t *spi_ctrl_t; -}; - -struct ra_spi -{ - rt_uint32_t cs_pin; - struct ra_spi_handle *ra_spi_handle_t; - struct rt_spi_configuration *rt_spi_cfg_t; - struct rt_spi_bus bus; -}; -#endif - -void rt_hw_spi_device_attach(struct rt_spi_device *device, const char *device_name, const char *bus_name, void *user_data); - -#ifdef __cplusplus -} -#endif - -/* stm32 spi dirver class */ - -#endif /*__DRV_SPI_H__ */ diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_usart_v2.c b/bsp/renesas/ra6m4-iot/drivers/drv_usart_v2.c deleted file mode 100644 index 7b1621ff3a..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_usart_v2.c +++ /dev/null @@ -1,236 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#include - -#ifdef RT_USING_SERIAL_V2 - -//#define DRV_DEBUG -#define DBG_TAG "drv.usart" -#ifdef DRV_DEBUG - #define DBG_LVL DBG_LOG -#else - #define DBG_LVL DBG_INFO -#endif /* DRV_DEBUG */ -#include - -static struct ra_uart_config uart_config[] = -{ -#ifdef BSP_USING_UART6 - UART6_CONFIG, -#endif - -#ifdef BSP_USING_UART7 - UART7_CONFIG, -#endif - -#ifdef BSP_USING_UART1 - UART1_CONFIG, -#endif -}; - -enum -{ -#ifdef BSP_USING_UART6 - UART6_INDEX, -#endif - -#ifdef BSP_USING_UART7 - UART7_INDEX, -#endif - -#ifdef BSP_USING_UART1 - UART1_INDEX, -#endif -}; - -static struct ra_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0}; - -static void ra_uart_get_config(void) -{ - struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; - -#ifdef BSP_USING_UART6 - uart_obj[UART6_INDEX].serial.config = config; - uart_obj[UART6_INDEX].uart_dma_flag = 0; - - uart_obj[UART6_INDEX].serial.config.rx_bufsz = BSP_UART6_RX_BUFSIZE; - uart_obj[UART6_INDEX].serial.config.tx_bufsz = BSP_UART6_TX_BUFSIZE; -#endif - -#ifdef BSP_USING_UART7 - uart_obj[UART7_INDEX].serial.config = config; - uart_obj[UART7_INDEX].uart_dma_flag = 0; - - uart_obj[UART7_INDEX].serial.config.rx_bufsz = BSP_UART7_RX_BUFSIZE; - uart_obj[UART7_INDEX].serial.config.tx_bufsz = BSP_UART7_TX_BUFSIZE; -#endif - -#ifdef BSP_USING_UART1 - uart_obj[UART1_INDEX].serial.config = config; - uart_obj[UART1_INDEX].uart_dma_flag = 0; - - uart_obj[UART1_INDEX].serial.config.rx_bufsz = BSP_UART1_RX_BUFSIZE; - uart_obj[UART1_INDEX].serial.config.tx_bufsz = BSP_UART1_TX_BUFSIZE; -#endif -} - - -/* - * UART interface - */ -static rt_err_t ra_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg) -{ - struct ra_uart *uart; - RT_ASSERT(serial != RT_NULL); - RT_ASSERT(cfg != RT_NULL); - - fsp_err_t err = FSP_SUCCESS; - - uart = rt_container_of(serial, struct ra_uart, serial); - RT_ASSERT(uart != RT_NULL); - - err = R_SCI_UART_Open(uart->config->p_api_ctrl, uart->config->p_cfg); - if (FSP_SUCCESS != err) - { - return RT_ERROR; - } - - return RT_EOK; -} - -static rt_err_t ra_uart_control(struct rt_serial_device *serial, int cmd, void *arg) -{ - return RT_EOK; -} - -static int ra_uart_putc(struct rt_serial_device *serial, char c) -{ - struct ra_uart *uart; - RT_ASSERT(serial != RT_NULL); - - uart = rt_container_of(serial, struct ra_uart, serial); - RT_ASSERT(uart != RT_NULL); - - sci_uart_instance_ctrl_t *p_ctrl = (sci_uart_instance_ctrl_t *)uart->config->p_api_ctrl; - - p_ctrl->p_reg->TDR = c; - while ((p_ctrl->p_reg->SSR_b.TEND) == 0); - - return RT_EOK; -} - -static int ra_uart_getc(struct rt_serial_device *serial) -{ - return RT_EOK; -} - -#ifdef BSP_USING_UART6 -void uart6_isr_cb(uart_callback_args_t *p_args) -{ - rt_interrupt_enter(); - - struct rt_serial_device *serial = &uart_obj[UART6_INDEX].serial; - RT_ASSERT(serial != RT_NULL); - - if (UART_EVENT_RX_CHAR == p_args->event) - { - struct rt_serial_rx_fifo *rx_fifo; - rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; - RT_ASSERT(rx_fifo != RT_NULL); - - rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); - - rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); - } - - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_UART7 -void uart7_isr_cb(uart_callback_args_t *p_args) -{ - rt_interrupt_enter(); - - struct rt_serial_device *serial = &uart_obj[UART7_INDEX].serial; - RT_ASSERT(serial != RT_NULL); - - if (UART_EVENT_RX_CHAR == p_args->event) - { - struct rt_serial_rx_fifo *rx_fifo; - rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; - RT_ASSERT(rx_fifo != RT_NULL); - - rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); - - rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); - } - - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_UART1 -void uart1_isr_cb(uart_callback_args_t *p_args) -{ - rt_interrupt_enter(); - - struct rt_serial_device *serial = &uart_obj[UART1_INDEX].serial; - RT_ASSERT(serial != RT_NULL); - - if (UART_EVENT_RX_CHAR == p_args->event) - { - struct rt_serial_rx_fifo *rx_fifo; - rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx; - RT_ASSERT(rx_fifo != RT_NULL); - - rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data); - - rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); - } - - rt_interrupt_leave(); -} -#endif - - -static const struct rt_uart_ops ra_uart_ops = -{ - .configure = ra_uart_configure, - .control = ra_uart_control, - .putc = ra_uart_putc, - .getc = ra_uart_getc, -}; - - -int rt_hw_usart_init(void) -{ - rt_err_t result = 0; - rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct ra_uart); - - ra_uart_get_config(); - for (int i = 0; i < obj_num; i++) - { - /* init UART object */ - uart_obj[i].config = &uart_config[i]; - uart_obj[i].serial.ops = &ra_uart_ops; - /* register UART device */ - result = rt_hw_serial_register(&uart_obj[i].serial, - uart_obj[i].config->name, - RT_DEVICE_FLAG_RDWR, - NULL); - RT_ASSERT(result == RT_EOK); - } - - return result; -} - -#endif /* RT_USING_SERIAL_V2 */ diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_usart_v2.h b/bsp/renesas/ra6m4-iot/drivers/drv_usart_v2.h deleted file mode 100644 index d4fe7eb327..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_usart_v2.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-07-29 KyleChan first version - */ - -#ifndef __DRV_USART_V2_H__ -#define __DRV_USART_V2_H__ - -#include -#include -#include -#include -#include -#include - -/* renesas config class */ -struct ra_uart_config -{ - const char *name; - uart_ctrl_t *const p_api_ctrl; - uart_cfg_t const *const p_cfg; -}; - -struct ra_uart -{ - struct rt_serial_device serial; - - rt_uint16_t uart_dma_flag; - - struct ra_uart_config *config; -}; - -int rt_hw_usart_init(void); - -#endif /* __DRV_USART_H__ */ diff --git a/bsp/renesas/ra6m4-iot/drivers/drv_wdt.c b/bsp/renesas/ra6m4-iot/drivers/drv_wdt.c deleted file mode 100644 index 44f64a1cce..0000000000 --- a/bsp/renesas/ra6m4-iot/drivers/drv_wdt.c +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-20 Mr.Tiger first version - */ - -#include -#include -#include -#include -#include -#include - -#ifdef RT_USING_WDT - -//#define DRV_DEBUG -#define LOG_TAG "drv.wdt" -#include - -static struct rt_watchdog_device ra_wdt_dev; -static struct rt_watchdog_ops ops; - -static rt_err_t wdt_init(rt_watchdog_t *wdt) -{ - return RT_EOK; -} - -static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg) -{ - struct st_wdt_timeout_values *wdt_value = {0}; - switch (cmd) - { - /* feed the watchdog */ - case RT_DEVICE_CTRL_WDT_KEEPALIVE: - if (R_WDT_Refresh(&g_wdt_ctrl) != FSP_SUCCESS) - { - LOG_E("watch dog keepalive fail."); - } - break; - /* set watchdog timeout */ - case RT_DEVICE_CTRL_WDT_SET_TIMEOUT: - /**< set*/ - break; - case RT_DEVICE_CTRL_WDT_GET_TIMEOUT: - wdt_value = (struct st_wdt_timeout_values *)arg; - if (R_WDT_TimeoutGet(&g_wdt_ctrl, wdt_value) != FSP_SUCCESS) - { - LOG_E("wdt get timeout failed."); - return -RT_ERROR; - } - break; - case RT_DEVICE_CTRL_WDT_START: - if (R_WDT_Open(&g_wdt_ctrl, &g_wdt_cfg) == FSP_SUCCESS) - { - if (R_WDT_Refresh(&g_wdt_ctrl) != FSP_SUCCESS) - { - LOG_E("wdt start failed."); - return -RT_ERROR; - } - } - else - { - LOG_E("wdt start failed."); - return -RT_ERROR; - } - break; - default: - LOG_W("This command is not supported."); - return -RT_ERROR; - } - return RT_EOK; -} - -int rt_wdt_init(void) -{ - ops.init = &wdt_init; - ops.control = &wdt_control; - ra_wdt_dev.ops = &ops; - /* register watchdog device */ - if (rt_hw_watchdog_register(&ra_wdt_dev, "wdt", RT_DEVICE_FLAG_DEACTIVATE, RT_NULL) != RT_EOK) - { - LOG_E("wdt device register failed."); - return -RT_ERROR; - } - LOG_D("wdt device register success."); - return RT_EOK; -} -INIT_BOARD_EXPORT(rt_wdt_init); - -#endif /* RT_USING_WDT */ diff --git a/bsp/renesas/ra6m4-iot/ports/SConscript b/bsp/renesas/ra6m4-iot/ports/SConscript deleted file mode 100644 index ca95be14e2..0000000000 --- a/bsp/renesas/ra6m4-iot/ports/SConscript +++ /dev/null @@ -1,12 +0,0 @@ -import os -from building import * - -objs = [] -cwd = GetCurrentDir() -list = os.listdir(cwd) - -for item in list: - if os.path.isfile(os.path.join(cwd, item, 'SConscript')): - objs = objs + SConscript(os.path.join(item, 'SConscript')) - -Return('objs') diff --git a/bsp/renesas/ra6m4-iot/ports/fal/SConscript b/bsp/renesas/ra6m4-iot/ports/fal/SConscript deleted file mode 100644 index c8931044c5..0000000000 --- a/bsp/renesas/ra6m4-iot/ports/fal/SConscript +++ /dev/null @@ -1,22 +0,0 @@ - -from building import * -import rtconfig - -cwd = GetCurrentDir() - -src = [] - -src += Glob('*.c') -CPPPATH = [cwd] -LOCAL_CFLAGS = '' - -if rtconfig.PLATFORM == 'gcc': - LOCAL_CFLAGS += ' -std=c99' -elif rtconfig.PLATFORM == 'armcc': - LOCAL_CFLAGS += ' --c99' -elif rtconfig.PLATFORM == 'armclang': - LOCAL_CFLAGS += ' -std=c99' - -group = DefineGroup('FAL', src, depend = ['PKG_USING_FAL'], CPPPATH = CPPPATH, LOCAL_CFLAGS = LOCAL_CFLAGS) - -Return('group') diff --git a/bsp/renesas/ra6m4-iot/ports/fal/fal_cfg.h b/bsp/renesas/ra6m4-iot/ports/fal/fal_cfg.h deleted file mode 100644 index 37d4e87e0a..0000000000 --- a/bsp/renesas/ra6m4-iot/ports/fal/fal_cfg.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2018-08-21 MurphyZhao the first version - */ -#ifndef _FAL_CFG_H_ -#define _FAL_CFG_H_ - -#include -#include - -/* enable stm32l4 onchip flash driver sample */ -#define FAL_FLASH_PORT_DRIVER_STM32L4 -/* enable SFUD flash driver sample */ -#define FAL_FLASH_PORT_DRIVER_SFUD - -extern const struct fal_flash_dev _onchip_flash_8k; -extern const struct fal_flash_dev _onchip_flash_32k; - -/* flash device table */ -#define FAL_FLASH_DEV_TABLE \ -{ \ - &_onchip_flash_8k, \ - &_onchip_flash_32k, \ -} -/* ====================== Partition Configuration ========================== */ -#ifdef FAL_PART_HAS_TABLE_CFG -/** partition table, The chip flash partition is defined in "\ra\fsp\src\bsp\mcu\ra6m4\bsp_feature.h". - * More details can be found in the RA6M4 Group User Manual: Hardware section 47 Flash memory.*/ -#define FAL_PART_TABLE \ -{ \ - {FAL_PART_MAGIC_WROD, "app", "onchip_flash_8k", 0, 64 * 1024, 0}, \ - {FAL_PART_MAGIC_WROD, "param", "onchip_flash_32k", 0, 32 * 30 * 1024, 0}, \ -} -#endif /* FAL_PART_HAS_TABLE_CFG */ -#endif /* _FAL_CFG_H_ */ - diff --git a/bsp/renesas/ra6m4-iot/ports/rw007/SConscript b/bsp/renesas/ra6m4-iot/ports/rw007/SConscript deleted file mode 100644 index 99b97f1a80..0000000000 --- a/bsp/renesas/ra6m4-iot/ports/rw007/SConscript +++ /dev/null @@ -1,22 +0,0 @@ - -from building import * -import rtconfig - -cwd = GetCurrentDir() - -src = [] - -src += Glob('*.c') -CPPPATH = [cwd] -LOCAL_CFLAGS = '' - -if rtconfig.PLATFORM == 'gcc': - LOCAL_CFLAGS += ' -std=c99' -elif rtconfig.PLATFORM == 'armcc': - LOCAL_CFLAGS += ' --c99' -elif rtconfig.PLATFORM == 'armclang': - LOCAL_CFLAGS += ' -std=c99' - -group = DefineGroup('rw007', src, depend = ['BSP_USING_RW007'], CPPPATH = CPPPATH, LOCAL_CFLAGS = LOCAL_CFLAGS) - -Return('group') diff --git a/bsp/renesas/ra6m4-iot/ports/rw007/drv_rw007.c b/bsp/renesas/ra6m4-iot/ports/rw007/drv_rw007.c deleted file mode 100644 index 14e4155b59..0000000000 --- a/bsp/renesas/ra6m4-iot/ports/rw007/drv_rw007.c +++ /dev/null @@ -1,67 +0,0 @@ -#include -#include -#ifdef BSP_USING_RW007 -#include -#include -#include -#include - -extern void spi_wifi_isr(int vector); - -static void rw007_gpio_init(void) -{ - /* Configure IO */ - rt_pin_mode(RA_RW007_RST_PIN, PIN_MODE_OUTPUT); - rt_pin_mode(RA_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLDOWN); - - /* Reset rw007 and config mode */ - rt_pin_write(RA_RW007_RST_PIN, PIN_LOW); - rt_thread_delay(rt_tick_from_millisecond(100)); - rt_pin_write(RA_RW007_RST_PIN, PIN_HIGH); - - /* Wait rw007 ready(exit busy stat) */ - while (!rt_pin_read(RA_RW007_INT_BUSY_PIN)) - { - rt_thread_delay(5); - } - - rt_thread_delay(rt_tick_from_millisecond(200)); - rt_pin_mode(RA_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLUP); -} - -static struct rt_spi_device rw007_dev; - -int wifi_spi_device_init(void) -{ - char sn_version[32]; - uint32_t cs_pin = RA_RW007_CS_PIN; - - rw007_gpio_init(); - rt_hw_spi_device_attach(&rw007_dev, "wspi", RA_RW007_SPI_BUS_NAME, (void *)cs_pin); - rt_hw_wifi_init("wspi"); - - rt_wlan_set_mode(RT_WLAN_DEVICE_STA_NAME, RT_WLAN_STATION); - rt_wlan_set_mode(RT_WLAN_DEVICE_AP_NAME, RT_WLAN_AP); - - rw007_sn_get(sn_version); - rt_kprintf("\nrw007 sn: [%s]\n", sn_version); - rw007_version_get(sn_version); - rt_kprintf("rw007 ver: [%s]\n\n", sn_version); - - return 0; -} -INIT_APP_EXPORT(wifi_spi_device_init); - -static void int_wifi_irq(void *p) -{ - ((void)p); - spi_wifi_isr(0); -} - -void spi_wifi_hw_init(void) -{ - rt_pin_attach_irq(RA_RW007_INT_BUSY_PIN, PIN_IRQ_MODE_FALLING, int_wifi_irq, 0); - rt_pin_irq_enable(RA_RW007_INT_BUSY_PIN, RT_TRUE); -} - -#endif /* BSP_USING_RW007 */ diff --git a/bsp/renesas/ra6m4-iot/project.uvoptx b/bsp/renesas/ra6m4-iot/project.uvoptx index 56802c399c..040d302310 100644 --- a/bsp/renesas/ra6m4-iot/project.uvoptx +++ b/bsp/renesas/ra6m4-iot/project.uvoptx @@ -170,22 +170,494 @@ - Source Group 1 + Compiler 0 0 0 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\armlibc\syscall_mem.c + syscall_mem.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\armlibc\syscalls.c + syscalls.c + 0 + 0 + + + 1 + 3 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\stdlib.c + stdlib.c + 0 + 0 + + + 1 + 4 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\time.c + time.c + 0 + 0 + - :Renesas RA Smart Configurator:Common Sources + CPU 0 0 0 0 2 - 1 + 5 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\backtrace.c + backtrace.c + 0 + 0 + + + 2 + 6 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\div0.c + div0.c + 0 + 0 + + + 2 + 7 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\showmem.c + showmem.c + 0 + 0 + + + 2 + 8 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m4\cpuport.c + cpuport.c + 0 + 0 + + + 2 + 9 + 2 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m4\context_rvds.S + context_rvds.S + 0 + 0 + + + + + DeviceDrivers + 0 + 0 + 0 + 0 + + 3 + 10 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\workqueue.c + workqueue.c + 0 + 0 + + + 3 + 11 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\ringblk_buf.c + ringblk_buf.c + 0 + 0 + + + 3 + 12 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\dataqueue.c + dataqueue.c + 0 + 0 + + + 3 + 13 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\completion.c + completion.c + 0 + 0 + + + 3 + 14 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\pipe.c + pipe.c + 0 + 0 + + + 3 + 15 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\ringbuffer.c + ringbuffer.c + 0 + 0 + + + 3 + 16 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\ipc\waitqueue.c + waitqueue.c + 0 + 0 + + + 3 + 17 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\misc\pin.c + pin.c + 0 + 0 + + + 3 + 18 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\serial\serial_v2.c + serial_v2.c + 0 + 0 + + + + + Drivers + 0 + 0 + 0 + 0 + + 4 + 19 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_gpio.c + drv_gpio.c + 0 + 0 + + + 4 + 20 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_usart_v2.c + drv_usart_v2.c + 0 + 0 + + + 4 + 21 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_common.c + drv_common.c + 0 + 0 + + + + + Finsh + 0 + 0 + 0 + 0 + + 5 + 22 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\shell.c + shell.c + 0 + 0 + + + 5 + 23 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\msh.c + msh.c + 0 + 0 + + + 5 + 24 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\cmd.c + cmd.c + 0 + 0 + + + + + Kernel + 0 + 0 + 0 + 0 + + 6 + 25 + 1 + 0 + 0 + 0 + ..\..\..\src\device.c + device.c + 0 + 0 + + + 6 + 26 + 1 + 0 + 0 + 0 + ..\..\..\src\timer.c + timer.c + 0 + 0 + + + 6 + 27 + 1 + 0 + 0 + 0 + ..\..\..\src\scheduler.c + scheduler.c + 0 + 0 + + + 6 + 28 + 1 + 0 + 0 + 0 + ..\..\..\src\ipc.c + ipc.c + 0 + 0 + + + 6 + 29 + 1 + 0 + 0 + 0 + ..\..\..\src\object.c + object.c + 0 + 0 + + + 6 + 30 + 1 + 0 + 0 + 0 + ..\..\..\src\components.c + components.c + 0 + 0 + + + 6 + 31 + 1 + 0 + 0 + 0 + ..\..\..\src\idle.c + idle.c + 0 + 0 + + + 6 + 32 + 1 + 0 + 0 + 0 + ..\..\..\src\mem.c + mem.c + 0 + 0 + + + 6 + 33 + 1 + 0 + 0 + 0 + ..\..\..\src\thread.c + thread.c + 0 + 0 + + + 6 + 34 + 1 + 0 + 0 + 0 + ..\..\..\src\irq.c + irq.c + 0 + 0 + + + 6 + 35 + 1 + 0 + 0 + 0 + ..\..\..\src\kservice.c + kservice.c + 0 + 0 + + + 6 + 36 + 1 + 0 + 0 + 0 + ..\..\..\src\clock.c + clock.c + 0 + 0 + + + + + :Renesas RA Smart Configurator:Common Sources + 0 + 0 + 0 + 0 + + 7 + 37 1 0 0 diff --git a/bsp/renesas/ra6m4-iot/project.uvprojx b/bsp/renesas/ra6m4-iot/project.uvprojx index 1d9f12e9b3..93b9be6023 100644 --- a/bsp/renesas/ra6m4-iot/project.uvprojx +++ b/bsp/renesas/ra6m4-iot/project.uvprojx @@ -1,12 +1,16 @@ + 2.1 +
### uVision Project, (C) Keil Software
+ Target 1 0x4 ARM-ADS + 6160000::V6.16::ARMCLANG 1 @@ -15,28 +19,28 @@ Renesas.RA_DFP.3.1.0 https://www2.renesas.eu/Keil_MDK_Packs/ CPUTYPE("Cortex-M33") FPU3(SFPU) DSP TZ CLOCK(12000000) ELITTLE - - - + + + 0 - - - - - - - - - - + + + + + + + + + + $$Device:R7FA6M4AF3CFP$SVD\R7FA6M4AF.svd 0 0 - - - - - + + + + + 0 0 @@ -45,7 +49,7 @@ 1 .\Objects\ - ra6m4_iot + rtthread 1 0 1 @@ -58,8 +62,8 @@ 0 0 - - + + 0 0 0 @@ -68,8 +72,8 @@ 0 0 - - + + 0 0 0 @@ -79,14 +83,14 @@ 0 0 cmd /c "start "Renesas" /w cmd /c ""$Slauncher\rasc_launcher.bat" "3.5.0" --gensecurebundle --compiler ARMv6 "$Pconfiguration.xml" "$L%L" 2> "%%TEMP%%\rasc_stderr.out""" - + 0 0 2 0 0 - + 0 @@ -100,8 +104,8 @@ 0 0 3 - - + + 1 @@ -133,12 +137,12 @@ -1 1 - + "" () - - - - + + + + 0 @@ -171,7 +175,7 @@ 0 0 "Cortex-M33" - + 0 0 0 @@ -305,7 +309,7 @@ 0x0 - + 1 @@ -333,9 +337,9 @@ 0 -Wno-license-management -Wuninitialized -Wall -Wmissing-declarations -Wpointer-arith -Waggregate-return -Wfloat-equal - SOC_R7FA6M4AF, __RTTHREAD__, RT_USING_ARM_LIBC, __CLK_TCK=RT_TICK_PER_SECOND - - ..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\extension;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;drivers;drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc;..\..\..\examples\utest\testcases\kernel + __RTTHREAD__, RT_USING_ARM_LIBC, __CLK_TCK=RT_TICK_PER_SECOND + + ..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\extension;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\ports;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\posix\io\poll;..\..\..\components\libc\posix\io\stdio;..\..\..\components\libc\posix\ipc @@ -350,10 +354,10 @@ 0 4 - - - - + + + + @@ -363,14 +367,14 @@ 0 0 0 - - - + + + .\script\fsp.scat - - - - + + + + 6319,6314 @@ -384,26 +388,20 @@ 1 ..\..\..\components\libc\compilers\armlibc\syscall_mem.c - - syscalls.c 1 ..\..\..\components\libc\compilers\armlibc\syscalls.c - - - time.c + stdlib.c 1 - ..\..\..\components\libc\compilers\common\time.c + ..\..\..\components\libc\compilers\common\stdlib.c - - - stdlib.c + time.c 1 - ..\..\..\components\libc\compilers\common\stdlib.c + ..\..\..\components\libc\compilers\common\time.c @@ -415,29 +413,21 @@ 1 ..\..\..\libcpu\arm\common\backtrace.c - - div0.c 1 ..\..\..\libcpu\arm\common\div0.c - - showmem.c 1 ..\..\..\libcpu\arm\common\showmem.c - - cpuport.c 1 ..\..\..\libcpu\arm\cortex-m4\cpuport.c - - context_rvds.S 2 @@ -449,61 +439,45 @@ DeviceDrivers - ringbuffer.c + workqueue.c 1 - ..\..\..\components\drivers\ipc\ringbuffer.c + ..\..\..\components\drivers\ipc\workqueue.c - - ringblk_buf.c 1 ..\..\..\components\drivers\ipc\ringblk_buf.c - - - waitqueue.c + dataqueue.c 1 - ..\..\..\components\drivers\ipc\waitqueue.c + ..\..\..\components\drivers\ipc\dataqueue.c - - - dataqueue.c + completion.c 1 - ..\..\..\components\drivers\ipc\dataqueue.c + ..\..\..\components\drivers\ipc\completion.c - - pipe.c 1 ..\..\..\components\drivers\ipc\pipe.c - - - workqueue.c + ringbuffer.c 1 - ..\..\..\components\drivers\ipc\workqueue.c + ..\..\..\components\drivers\ipc\ringbuffer.c - - - completion.c + waitqueue.c 1 - ..\..\..\components\drivers\ipc\completion.c + ..\..\..\components\drivers\ipc\waitqueue.c - - pin.c 1 ..\..\..\components\drivers\misc\pin.c - - serial_v2.c 1 @@ -517,21 +491,17 @@ drv_gpio.c 1 - drivers\drv_gpio.c + ..\libraries\HAL_Drivers\drv_gpio.c - - drv_usart_v2.c 1 - drivers\drv_usart_v2.c + ..\libraries\HAL_Drivers\drv_usart_v2.c - - drv_common.c 1 - drivers\drv_common.c + ..\libraries\HAL_Drivers\drv_common.c @@ -543,15 +513,11 @@ 1 ..\..\..\components\finsh\shell.c - - msh.c 1 ..\..\..\components\finsh\msh.c - - cmd.c 1 @@ -563,109 +529,102 @@ Kernel - components.c + device.c 1 - ..\..\..\src\components.c + ..\..\..\src\device.c - - - ipc.c + timer.c 1 - ..\..\..\src\ipc.c + ..\..\..\src\timer.c - - scheduler.c 1 ..\..\..\src\scheduler.c - - - thread.c + ipc.c 1 - ..\..\..\src\thread.c + ..\..\..\src\ipc.c - - - idle.c + object.c 1 - ..\..\..\src\idle.c + ..\..\..\src\object.c - - - kservice.c + components.c 1 - ..\..\..\src\kservice.c + ..\..\..\src\components.c - - - device.c + idle.c 1 - ..\..\..\src\device.c + ..\..\..\src\idle.c - - mem.c 1 ..\..\..\src\mem.c - - + + thread.c + 1 + ..\..\..\src\thread.c + irq.c 1 ..\..\..\src\irq.c - - - object.c + kservice.c 1 - ..\..\..\src\object.c + ..\..\..\src\kservice.c - - clock.c 1 ..\..\..\src\clock.c + + + :Renesas RA Smart Configurator:Common Sources - timer.c + hal_entry.c 1 - ..\..\..\src\timer.c + .\src\hal_entry.c + + ::Flex Software + + - + - + - + - + - + + diff --git a/bsp/renesas/ra6m4-iot/ra/SConscript b/bsp/renesas/ra6m4-iot/ra/SConscript index e9b91784b5..6083836358 100644 --- a/bsp/renesas/ra6m4-iot/ra/SConscript +++ b/bsp/renesas/ra6m4-iot/ra/SConscript @@ -6,21 +6,29 @@ cwd = GetCurrentDir() src = [] group = [] CPPPATH = [] -CPPDEFINES = ['SOC_R7FA6M4AF'] -if rtconfig.CROSS_TOOL == 'iar': +if rtconfig.PLATFORM == 'iar': print("\nThe current project does not support iar build\n") Return('group') -elif rtconfig.CROSS_TOOL == 'gcc': +elif rtconfig.PLATFORM == 'gcc' : src += Glob(cwd + '/fsp/src/bsp/mcu/all/*.c') src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c'] src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c'] src += Glob(cwd + '/fsp/src/r_*/*.c') - CPPPATH = [ cwd + '/arm/CMSIS_5/CMSIS/Core/Include', cwd + '/fsp/inc', cwd + '/fsp/inc/api', cwd + '/fsp/inc/instances',] +elif rtconfig.PLATFORM == 'armclang': + if GetOption('target') != 'mdk5': + src += Glob(cwd + '/fsp/src/bsp/mcu/all/*.c') + src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c'] + src += [cwd + '/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c'] + src += Glob(cwd + '/fsp/src/r_*/*.c') + CPPPATH = [ cwd + '/arm/CMSIS_5/CMSIS/Core/Include', + cwd + '/fsp/inc', + cwd + '/fsp/inc/api', + cwd + '/fsp/inc/instances',] -group = DefineGroup('ra', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES) +group = DefineGroup('ra', src, depend = [''], CPPPATH = CPPPATH) Return('group') diff --git a/bsp/renesas/ra6m4-iot/ra_cfg/SConscript b/bsp/renesas/ra6m4-iot/ra_cfg/SConscript index f87ed5957c..3f03930232 100644 --- a/bsp/renesas/ra6m4-iot/ra_cfg/SConscript +++ b/bsp/renesas/ra6m4-iot/ra_cfg/SConscript @@ -7,13 +7,16 @@ src = [] group = [] CPPPATH = [] -if rtconfig.CROSS_TOOL == 'iar': +if rtconfig.PLATFORM == 'iar': print("\nThe current project does not support iar build\n") Return('group') - -elif rtconfig.CROSS_TOOL == 'gcc': +elif rtconfig.PLATFORM == 'gcc' : src = Glob('*.c') CPPPATH = [cwd+'/fsp_cfg', cwd + '/fsp_cfg/bsp'] +elif rtconfig.PLATFORM == 'armclang': + if GetOption('target') != 'mdk5': + src = Glob('*.c') + CPPPATH = [cwd+'/fsp_cfg', cwd + '/fsp_cfg/bsp'] group += DefineGroup('ra_cfg', src, depend = [''], CPPPATH = CPPPATH) Return('group') diff --git a/bsp/renesas/ra6m4-iot/ra_gen/SConscript b/bsp/renesas/ra6m4-iot/ra_gen/SConscript index 68084fbd28..5fb4a860df 100644 --- a/bsp/renesas/ra6m4-iot/ra_gen/SConscript +++ b/bsp/renesas/ra6m4-iot/ra_gen/SConscript @@ -7,12 +7,16 @@ src = [] group = [] CPPPATH = [] -if rtconfig.CROSS_TOOL == 'iar': +if rtconfig.PLATFORM == 'iar': print("\nThe current project does not support iar build\n") Return('group') -elif rtconfig.CROSS_TOOL == 'gcc': +elif rtconfig.PLATFORM == 'gcc' : src = Glob('*.c') CPPPATH = [cwd, ] +elif rtconfig.PLATFORM == 'armclang': + if GetOption('target') != 'mdk5': + src = Glob('*.c') + CPPPATH = [cwd, ] group = DefineGroup('ra_gen', src, depend = [''], CPPPATH = CPPPATH) Return('group') diff --git a/bsp/renesas/ra6m4-iot/ra_gen/hal_data.c b/bsp/renesas/ra6m4-iot/ra_gen/hal_data.c index 6607fb5bc4..5184d31184 100644 --- a/bsp/renesas/ra6m4-iot/ra_gen/hal_data.c +++ b/bsp/renesas/ra6m4-iot/ra_gen/hal_data.c @@ -30,7 +30,7 @@ sci_uart_instance_ctrl_t g_uart6_ctrl; .data_bits = UART_DATA_BITS_8, .parity = UART_PARITY_OFF, .stop_bits = UART_STOP_BITS_1, - .p_callback = uart6_isr_cb, + .p_callback = user_uart6_callback, .p_context = NULL, .p_extend = &g_uart6_cfg_extend, #define RA_NOT_DEFINED (1) diff --git a/bsp/renesas/ra6m4-iot/ra_gen/hal_data.h b/bsp/renesas/ra6m4-iot/ra_gen/hal_data.h index 789f450c56..7bfae6a99b 100644 --- a/bsp/renesas/ra6m4-iot/ra_gen/hal_data.h +++ b/bsp/renesas/ra6m4-iot/ra_gen/hal_data.h @@ -15,8 +15,8 @@ FSP_HEADER extern const uart_cfg_t g_uart6_cfg; extern const sci_uart_extended_cfg_t g_uart6_cfg_extend; - #ifndef uart6_isr_cb - void uart6_isr_cb(uart_callback_args_t * p_args); + #ifndef user_uart6_callback + void user_uart6_callback(uart_callback_args_t * p_args); #endif void hal_entry(void); void g_hal_init(void); diff --git a/bsp/renesas/ra6m4-iot/rtconfig.h b/bsp/renesas/ra6m4-iot/rtconfig.h index c18d73f80d..42bef153b1 100644 --- a/bsp/renesas/ra6m4-iot/rtconfig.h +++ b/bsp/renesas/ra6m4-iot/rtconfig.h @@ -106,17 +106,6 @@ /* Network */ -/* Socket abstraction layer */ - - -/* Network interface device */ - - -/* light weight TCP/IP stack */ - - -/* AT commands */ - /* VBUS(Virtual Software BUS) */ @@ -193,10 +182,12 @@ /* entertainment: terminal games and other interesting software packages */ +#define SOC_FAMILY_RENESAS +#define SOC_SERIES_R7FA6M4 /* Hardware Drivers Config */ -#define SOC_SERIES_R7FA6M4AF +#define SOC_R7FA6M4AF /* Onboard Peripheral Drivers */ @@ -210,6 +201,5 @@ /* Board extended module Drivers */ -#define SOC_FAMILY_RENESAS #endif diff --git a/bsp/renesas/ra6m4-iot/rtconfig.py b/bsp/renesas/ra6m4-iot/rtconfig.py index ad55ddedbd..956dda67c6 100644 --- a/bsp/renesas/ra6m4-iot/rtconfig.py +++ b/bsp/renesas/ra6m4-iot/rtconfig.py @@ -26,8 +26,8 @@ elif CROSS_TOOL == 'iar': if os.getenv('RTT_EXEC_PATH'): EXEC_PATH = os.getenv('RTT_EXEC_PATH') -# BUILD = 'debug' -BUILD = 'release' +BUILD = 'debug' +# BUILD = 'release' if PLATFORM == 'gcc': # toolchains @@ -60,21 +60,31 @@ if PLATFORM == 'gcc': POST_ACTION = OBJCPY + ' -O ihex $TARGET rtthread.hex\n' + SIZE + ' $TARGET \n' # POST_ACTION += OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' -elif PLATFORM == 'armcc': +elif PLATFORM == 'armclang': # toolchains - CC = 'armcc' + CC = 'armclang' + CXX = 'armclang' AS = 'armasm' AR = 'armar' LINK = 'armlink' TARGET_EXT = 'axf' - DEVICE = ' --cpu=cortex-m4' - CFLAGS = DEVICE + ' --apcs=interwork --c99 --gnu' + DEVICE = ' --cpu Cortex-M33' + + CFLAGS = ' -mcpu=Cortex-M33 -xc -std=c99 --target=arm-arm-none-eabi -mfpu=fpv5-sp-d16 -mfloat-abi=hard -c' + CFLAGS += ' -fno-rtti -funsigned-char -ffunction-sections' + CFLAGS += ' -Wno-license-management -Wuninitialized -Wall -Wmissing-declarations -Wpointer-arith -Waggregate-return -Wfloat-equal' + AFLAGS = DEVICE + ' --apcs=interwork ' - LFLAGS = DEVICE + ' --scatter ' + 'script/fsp.scat' + ' --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict' - LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' - EXEC_PATH += '/ARM/ARMCC/bin/' + LFLAGS = DEVICE + ' --scatter ' + 'script/fsp.scat' + LFLAGS +=' --info sizes --info totals --info unused --info veneers ' + LFLAGS += ' --list rt-thread.map --strict' + LFLAGS += ' --diag_suppress 6319,6314 --summary_stderr --info summarysizes' + LFLAGS += ' --map --load_addr_map_info --xref --callgraph --symbols' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCLANG/lib' + + EXEC_PATH += '/ARM/ARMCLANG/bin/' if BUILD == 'debug': CFLAGS += ' -g -O0' @@ -83,4 +93,10 @@ elif PLATFORM == 'armcc': CFLAGS += ' -Os' POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET \n' - POST_ACTION += 'python ./makeimg.py' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) \ No newline at end of file diff --git a/bsp/renesas/ra6m4-iot/template.uvprojx b/bsp/renesas/ra6m4-iot/template.uvprojx index cc633be7f4..32d6f3cf18 100644 --- a/bsp/renesas/ra6m4-iot/template.uvprojx +++ b/bsp/renesas/ra6m4-iot/template.uvprojx @@ -48,7 +48,7 @@ 1 .\Objects\ - ra6m4_iot + rtthread 1 0 1 diff --git a/bsp/renesas/tools/sdk_dist.py b/bsp/renesas/tools/sdk_dist.py new file mode 100644 index 0000000000..646501310c --- /dev/null +++ b/bsp/renesas/tools/sdk_dist.py @@ -0,0 +1,20 @@ +import os +import sys +import shutil + +cwd_path = os.getcwd() +sys.path.append(os.path.join(os.path.dirname(cwd_path), 'rt-thread', 'tools')) + + +# BSP dist function +def dist_do_building(BSP_ROOT, dist_dir): + from mkdist import bsp_copy_files + import rtconfig + + print("=> copy renesas bsp hal_drivers") + library_dir = os.path.join(dist_dir, 'libraries') + library_path = os.path.join(os.path.dirname(BSP_ROOT), 'libraries') + + print("=> copy bsp drivers") + bsp_copy_files(os.path.join(library_path, 'HAL_Drivers'), os.path.join(library_dir, 'HAL_Drivers')) + shutil.copyfile(os.path.join(library_path, 'Kconfig'), os.path.join(library_dir, 'Kconfig')) -- cgit v1.3.1