From f601ffbdc45c7c92c8c4cbf05aae32be315ef910 Mon Sep 17 00:00:00 2001
From: seteiro <276597748+cms19859230182-lang@users.noreply.github.com>
Date: Thu, 12 Nov 2026 13:29:35 +0800
Subject: [libcpu][m0] skip MSP restore when VTOR is zero

---
 libcpu/arm/cortex-m0/context_gcc.S  | 3 +++
 libcpu/arm/cortex-m0/context_iar.S  | 3 +++
 libcpu/arm/cortex-m0/context_rvds.S | 3 +++
 3 files changed, 9 insertions(+)

diff --git a/libcpu/arm/cortex-m0/context_gcc.S b/libcpu/arm/cortex-m0/context_gcc.S
index 50e8040a00..4c65bf7622 100644
--- a/libcpu/arm/cortex-m0/context_gcc.S
+++ b/libcpu/arm/cortex-m0/context_gcc.S
@@ -173,9 +173,12 @@ rt_hw_context_switch_to:
     /* restore MSP */
     LDR     R0, =SCB_VTOR
     LDR     R0, [R0]
+    CMP     R0, #0
+    BEQ     _restore_msp_done
     LDR     R0, [R0]
     NOP
     MSR     MSP, R0
+_restore_msp_done:
 
     /* enable interrupts at processor level */
     CPSIE   I
diff --git a/libcpu/arm/cortex-m0/context_iar.S b/libcpu/arm/cortex-m0/context_iar.S
index ee4cf89c9b..114ad82ae8 100644
--- a/libcpu/arm/cortex-m0/context_iar.S
+++ b/libcpu/arm/cortex-m0/context_iar.S
@@ -179,9 +179,12 @@ rt_hw_context_switch_to:
     ; restore MSP
     LDR     r0, =SCB_VTOR
     LDR     r0, [r0]
+    CMP     r0, #0
+    BEQ     _restore_msp_done
     LDR     r0, [r0]
     NOP
     MSR     msp, r0
+_restore_msp_done
 
     ; enable interrupts at processor level
     CPSIE   I
diff --git a/libcpu/arm/cortex-m0/context_rvds.S b/libcpu/arm/cortex-m0/context_rvds.S
index 809b35363b..31732da834 100644
--- a/libcpu/arm/cortex-m0/context_rvds.S
+++ b/libcpu/arm/cortex-m0/context_rvds.S
@@ -183,8 +183,11 @@ rt_hw_context_switch_to    PROC
     ; restore MSP
     LDR     r0, =SCB_VTOR
     LDR     r0, [r0]
+    CMP     r0, #0
+    BEQ     _restore_msp_done
     LDR     r0, [r0]
     MSR     msp, r0
+_restore_msp_done
 
     ; enable interrupts at processor level
     CPSIE   I
-- 
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