From 0eba85eed4c2a3963608ae5a7e441b6318b658bf Mon Sep 17 00:00:00 2001 From: Rbb666 Date: Mon, 10 Oct 2022 15:46:11 +0800 Subject: 修改英飞凌BSP名称 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/cypress/psoc6-cy8ckit-062S2-43012/.config | 764 ++++++++++++++ bsp/cypress/psoc6-cy8ckit-062S2-43012/.cproject | 240 +++++ bsp/cypress/psoc6-cy8ckit-062S2-43012/.gitignore | 42 + bsp/cypress/psoc6-cy8ckit-062S2-43012/.project | 28 + .../dist_ide_project.DAPLink.Debug.rttlaunch | 65 ++ .../dist_ide_project.OpenOCD.Debug.rttlaunch | 58 ++ bsp/cypress/psoc6-cy8ckit-062S2-43012/Kconfig | 21 + bsp/cypress/psoc6-cy8ckit-062S2-43012/LICENSE | 210 ++++ bsp/cypress/psoc6-cy8ckit-062S2-43012/README.md | 119 +++ bsp/cypress/psoc6-cy8ckit-062S2-43012/SConscript | 15 + bsp/cypress/psoc6-cy8ckit-062S2-43012/SConstruct | 60 ++ .../applications/SConscript | 16 + .../psoc6-cy8ckit-062S2-43012/applications/main.c | 29 + .../psoc6-cy8ckit-062S2-43012/board/Kconfig | 323 ++++++ .../psoc6-cy8ckit-062S2-43012/board/SConscript | 44 + .../psoc6-cy8ckit-062S2-43012/board/board.c | 25 + .../psoc6-cy8ckit-062S2-43012/board/board.h | 63 ++ .../board/linker_scripts/link.icf | 247 +++++ .../board/linker_scripts/link.ld | 487 +++++++++ .../board/linker_scripts/link.sct | 277 +++++ .../board/ports/drv_rw007.c | 67 ++ .../board/ports/fal_cfg.h | 37 + .../board/ports/slider_sample.c | 243 +++++ .../board/ports/spi_sample.c | 84 ++ .../psoc6-cy8ckit-062S2-43012/figures/board.png | Bin 0 -> 1760156 bytes .../figures/mdk_package.png | Bin 0 -> 52129 bytes .../psoc6-cy8ckit-062S2-43012/figures/studio1.png | Bin 0 -> 30396 bytes .../psoc6-cy8ckit-062S2-43012/figures/studio2.png | Bin 0 -> 29218 bytes .../figures/studio3-build.png | Bin 0 -> 9554 bytes .../figures/studio4-download.png | Bin 0 -> 11819 bytes .../psoc6-cy8ckit-062S2-43012/makefile.targets | 6 + .../psoc6-cy8ckit-062S2-43012/project.uvoptx | 184 ++++ .../psoc6-cy8ckit-062S2-43012/project.uvproj | 1059 ++++++++++++++++++++ .../psoc6-cy8ckit-062S2-43012/project.uvprojx | 1042 +++++++++++++++++++ bsp/cypress/psoc6-cy8ckit-062S2-43012/rtconfig.h | 212 ++++ bsp/cypress/psoc6-cy8ckit-062S2-43012/rtconfig.py | 135 +++ .../psoc6-cy8ckit-062S2-43012/template.uvoptx | 184 ++++ .../psoc6-cy8ckit-062S2-43012/template.uvproj | 407 ++++++++ .../psoc6-cy8ckit-062S2-43012/template.uvprojx | 391 ++++++++ bsp/cypress/psoc6-cy8cproto-4343w/.config | 764 -------------- bsp/cypress/psoc6-cy8cproto-4343w/.cproject | 240 ----- bsp/cypress/psoc6-cy8cproto-4343w/.gitignore | 42 - bsp/cypress/psoc6-cy8cproto-4343w/.project | 28 - .../dist_ide_project.DAPLink.Debug.rttlaunch | 65 -- .../dist_ide_project.OpenOCD.Debug.rttlaunch | 58 -- bsp/cypress/psoc6-cy8cproto-4343w/Kconfig | 21 - bsp/cypress/psoc6-cy8cproto-4343w/LICENSE | 210 ---- bsp/cypress/psoc6-cy8cproto-4343w/README.md | 119 --- bsp/cypress/psoc6-cy8cproto-4343w/SConscript | 15 - bsp/cypress/psoc6-cy8cproto-4343w/SConstruct | 60 -- .../psoc6-cy8cproto-4343w/applications/SConscript | 16 - .../psoc6-cy8cproto-4343w/applications/main.c | 29 - bsp/cypress/psoc6-cy8cproto-4343w/board/Kconfig | 323 ------ bsp/cypress/psoc6-cy8cproto-4343w/board/SConscript | 44 - bsp/cypress/psoc6-cy8cproto-4343w/board/board.c | 25 - bsp/cypress/psoc6-cy8cproto-4343w/board/board.h | 63 -- .../board/linker_scripts/link.icf | 247 ----- .../board/linker_scripts/link.ld | 487 --------- .../board/linker_scripts/link.sct | 277 ----- .../psoc6-cy8cproto-4343w/board/ports/drv_rw007.c | 67 -- .../psoc6-cy8cproto-4343w/board/ports/fal_cfg.h | 37 - .../board/ports/slider_sample.c | 243 ----- .../psoc6-cy8cproto-4343w/board/ports/spi_sample.c | 84 -- .../psoc6-cy8cproto-4343w/figures/board.png | Bin 1760156 -> 0 bytes .../psoc6-cy8cproto-4343w/figures/mdk_package.png | Bin 52129 -> 0 bytes .../psoc6-cy8cproto-4343w/figures/studio1.png | Bin 30396 -> 0 bytes .../psoc6-cy8cproto-4343w/figures/studio2.png | Bin 52093 -> 0 bytes .../figures/studio3-build.png | Bin 9554 -> 0 bytes .../figures/studio4-download.png | Bin 11819 -> 0 bytes bsp/cypress/psoc6-cy8cproto-4343w/makefile.targets | 6 - bsp/cypress/psoc6-cy8cproto-4343w/project.uvoptx | 184 ---- bsp/cypress/psoc6-cy8cproto-4343w/project.uvproj | 1059 -------------------- bsp/cypress/psoc6-cy8cproto-4343w/project.uvprojx | 1042 ------------------- bsp/cypress/psoc6-cy8cproto-4343w/rtconfig.h | 212 ---- bsp/cypress/psoc6-cy8cproto-4343w/rtconfig.py | 135 --- bsp/cypress/psoc6-cy8cproto-4343w/template.uvoptx | 184 ---- bsp/cypress/psoc6-cy8cproto-4343w/template.uvproj | 407 -------- bsp/cypress/psoc6-cy8cproto-4343w/template.uvprojx | 391 -------- 78 files changed, 7184 insertions(+), 7184 deletions(-) create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/.config create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/.cproject create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/.gitignore create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/.project create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/.settings/dist_ide_project.DAPLink.Debug.rttlaunch create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/.settings/dist_ide_project.OpenOCD.Debug.rttlaunch create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/Kconfig create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/LICENSE create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/README.md create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/SConscript create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/SConstruct create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/applications/SConscript create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/applications/main.c create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/board/Kconfig create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/board/SConscript create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/board/board.c create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/board/board.h create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/board/linker_scripts/link.icf create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/board/linker_scripts/link.ld create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/board/linker_scripts/link.sct create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/drv_rw007.c create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/fal_cfg.h create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/slider_sample.c create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/spi_sample.c create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/board.png create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/mdk_package.png create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/studio1.png create mode 100644 bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/studio2.png create mode 100644 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100644 bsp/cypress/psoc6-cy8cproto-4343w/.project delete mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/.settings/dist_ide_project.DAPLink.Debug.rttlaunch delete mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/.settings/dist_ide_project.OpenOCD.Debug.rttlaunch delete mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/Kconfig delete mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/LICENSE delete mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/README.md delete mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/SConscript delete mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/SConstruct delete mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/applications/SConscript delete mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/applications/main.c delete mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/board/Kconfig delete mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/board/SConscript delete mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/board/board.c delete mode 100644 bsp/cypress/psoc6-cy8cproto-4343w/board/board.h delete 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Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_HOOK_USING_FUNC_PTR=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +CONFIG_RT_USING_TIMER_SOFT=y +CONFIG_RT_TIMER_THREAD_PRIO=4 +CONFIG_RT_TIMER_THREAD_STACK_SIZE=512 + +# +# kservice optimization +# +CONFIG_RT_KSERVICE_USING_STDLIB=y +# CONFIG_RT_KSERVICE_USING_STDLIB_MEMORY is not set +# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +# CONFIG_RT_USING_TINY_FFS is not set +# CONFIG_RT_KPRINTF_USING_LONGLONG is not set +CONFIG_RT_DEBUG=y +# CONFIG_RT_DEBUG_COLOR is not set +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMHEAP is not set +CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y +# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set +# CONFIG_RT_USING_SLAB_AS_HEAP is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +# CONFIG_RT_USING_HEAP_ISR is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart5" +CONFIG_RT_VER_NUM=0x40101 +CONFIG_ARCH_ARM=y +CONFIG_RT_USING_CPU_FFS=y +CONFIG_ARCH_ARM_CORTEX_M=y +CONFIG_ARCH_ARM_CORTEX_M4=y +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 +# CONFIG_RT_USING_LEGACY is not set +CONFIG_RT_USING_MSH=y +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_ARG_MAX=10 +# CONFIG_RT_USING_DFS is not set +# CONFIG_RT_USING_FAL is not set +# CONFIG_RT_USING_LWP is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB is not set +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# C/C++ and POSIX layer +# +CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 + +# +# POSIX (Portable Operating System Interface) layer +# +# CONFIG_RT_USING_POSIX_FS is not set +# CONFIG_RT_USING_POSIX_DELAY is not set +# CONFIG_RT_USING_POSIX_CLOCK is not set +# CONFIG_RT_USING_POSIX_TIMER is not set +# CONFIG_RT_USING_PTHREADS is not set +# CONFIG_RT_USING_MODULE is not set + +# +# Interprocess Communication (IPC) +# +# CONFIG_RT_USING_POSIX_PIPE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set + +# +# Socket is in the 'Network' category +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Network +# +# CONFIG_RT_USING_SAL is not set +# CONFIG_RT_USING_NETDEV is not set +# CONFIG_RT_USING_LWIP is not set +# CONFIG_RT_USING_AT is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set +# CONFIG_RT_USING_RT_LINK is not set +# CONFIG_RT_USING_VBUS is not set + +# +# RT-Thread Utestcases +# +# CONFIG_RT_USING_UTESTCASES is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LWIP is not set +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set +# CONFIG_PKG_USING_ZB_COORDINATOR is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_EZ_IOT_OS is not set +# CONFIG_PKG_USING_IOTSHARP_SDK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set +# CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_LORA_PKT_FWD is not set +# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set +# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set +# CONFIG_PKG_USING_HM is not set +# CONFIG_PKG_USING_SMALL_MODBUS is not set +# CONFIG_PKG_USING_NET_SERVER is not set +# CONFIG_PKG_USING_ZFTP is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_LIBSODIUM is not set +# CONFIG_PKG_USING_LIBHYDROGEN is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set + +# +# language packages +# + +# +# JSON: JavaScript Object Notation, a lightweight data-interchange format +# +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PARSON is not set + +# +# XML: Extensible Markup Language +# +# CONFIG_PKG_USING_SIMPLE_XML is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_LUATOS_SOC is not set +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set +# CONFIG_PKG_USING_PIKASCRIPT is not set +# CONFIG_PKG_USING_RTT_RUST is not set + +# +# multimedia packages +# + +# +# LVGL: powerful and easy-to-use embedded GUI library +# +# CONFIG_PKG_USING_LVGL is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set +# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set +# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set +# CONFIG_PKG_USING_UGUI is not set + +# +# PainterEngine: A cross-platform graphics application framework written in C language +# +# CONFIG_PKG_USING_PAINTERENGINE is not set +# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_TERMBOX is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_PERSIMMON is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ULOG_FILE is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set +# CONFIG_PKG_USING_FDT is not set +# CONFIG_PKG_USING_CBOX is not set +# CONFIG_PKG_USING_SNOWFLAKE is not set +# CONFIG_PKG_USING_HASH_MATCH is not set +# CONFIG_PKG_USING_FIRE_PID_CURVE is not set +# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set + +# +# system packages +# + +# +# enhanced kernel services +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set + +# +# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard +# +# CONFIG_PKG_USING_CMSIS_5 is not set +# CONFIG_PKG_USING_CMSIS_RTOS1 is not set +# CONFIG_PKG_USING_CMSIS_RTOS2 is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_PKG_USING_RTDUINO is not set +# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_PERF_COUNTER is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set +# CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_MCUBOOT is not set +# CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_CHERRYUSB is not set +# CONFIG_PKG_USING_KMULTI_RTIMER is not set +# CONFIG_PKG_USING_TFDB is not set +# CONFIG_PKG_USING_QPC is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_ADT74XX is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ESP_IDF is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set + +# +# Kendryte SDK +# +# CONFIG_PKG_USING_K210_SDK is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_MULTI_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_RS232 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set +# CONFIG_PKG_USING_MCP23008 is not set +# CONFIG_PKG_USING_BLUETRUM_SDK is not set +# CONFIG_PKG_USING_MISAKA_AT24CXX is not set +# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set +# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set +# CONFIG_PKG_USING_BL_MCU_SDK is not set +# CONFIG_PKG_USING_SOFT_SERIAL is not set +# CONFIG_PKG_USING_MB85RS16 is not set +# CONFIG_PKG_USING_CW2015 is not set +# CONFIG_PKG_USING_RFM300 is not set +# CONFIG_PKG_USING_IO_INPUT_FILTER is not set +# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set + +# +# miscellaneous packages +# + +# +# project laboratory +# + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_CMATRIX is not set +# CONFIG_PKG_USING_SL is not set +# CONFIG_PKG_USING_CAL is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_HEATSHRINK is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_UKAL is not set +# CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_DESIGN_PATTERN is not set +# CONFIG_PKG_USING_CONTROLLER is not set +# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set +# CONFIG_PKG_USING_MFBD is not set +# CONFIG_PKG_USING_SLCAN2RTT is not set +# CONFIG_PKG_USING_SOEM is not set +# CONFIG_PKG_USING_QPARAM is not set + +# +# Privated Packages of RealThread +# +# CONFIG_PKG_USING_CODEC is not set +# CONFIG_PKG_USING_PLAYER is not set +# CONFIG_PKG_USING_MPLAYER is not set +# CONFIG_PKG_USING_PERSIMMON_SRC is not set +# CONFIG_PKG_USING_JS_PERSIMMON is not set +# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set + +# +# Network Utilities +# +# CONFIG_PKG_USING_WICED is not set +# CONFIG_PKG_USING_CLOUDSDK is not set +# CONFIG_PKG_USING_POWER_MANAGER is not set +# CONFIG_PKG_USING_RT_OTA is not set +# CONFIG_PKG_USING_RTINSIGHT is not set +# CONFIG_PKG_USING_SMARTCONFIG is not set +# CONFIG_PKG_USING_RTX is not set +# CONFIG_RT_USING_TESTCASE is not set +# CONFIG_PKG_USING_NGHTTP2 is not set +# CONFIG_PKG_USING_AVS is not set +# CONFIG_PKG_USING_ALI_LINKKIT is not set +# CONFIG_PKG_USING_STS is not set +# CONFIG_PKG_USING_DLMS is not set +# CONFIG_PKG_USING_AUDIO_FRAMEWORK is not set +# CONFIG_PKG_USING_ZBAR is not set +# CONFIG_PKG_USING_MCF is not set +# CONFIG_PKG_USING_URPC is not set +# CONFIG_PKG_USING_DCM is not set +# CONFIG_PKG_USING_EMQ is not set +# CONFIG_PKG_USING_CFGM is not set +# CONFIG_PKG_USING_RT_CMSIS_DAP is not set +# CONFIG_PKG_USING_SMODULE is not set +# CONFIG_PKG_USING_SNFD is not set +# CONFIG_PKG_USING_UDBD is not set +# CONFIG_PKG_USING_BENCHMARK is not set +# CONFIG_PKG_USING_UBJSON is not set +# CONFIG_PKG_USING_DATATYPE is not set +# CONFIG_PKG_USING_FASTFS is not set +# CONFIG_PKG_USING_RIL is not set +# CONFIG_PKG_USING_WATCH_DCM_SVC is not set +# CONFIG_PKG_USING_WATCH_APP_FWK is not set +# CONFIG_PKG_USING_GUI_TEST is not set +# CONFIG_PKG_USING_PMEM is not set +# CONFIG_PKG_USING_LWRDP is not set +# CONFIG_PKG_USING_MASAN is not set +# CONFIG_PKG_USING_BSDIFF_LIB is not set +# CONFIG_PKG_USING_PRC_DIFF is not set + +# +# RT-Thread Smart +# +# CONFIG_PKG_USING_UKERNEL is not set +# CONFIG_PKG_USING_TRACE_AGENT is not set +CONFIG_SOC_FAMILY_IFX=y +CONFIG_SOC_SERIES_IFX_PSOC6=y + +# +# Hardware Drivers Config +# +CONFIG_SOC_IFX_PSOC6_43012=y + +# +# Onboard Peripheral Drivers +# +CONFIG_BSP_USING_USB_TO_USART=y + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +# CONFIG_BSP_USING_UART0 is not set +# CONFIG_BSP_USING_UART1 is not set +# CONFIG_BSP_USING_UART2 is not set +# CONFIG_BSP_USING_UART3 is not set +# CONFIG_BSP_USING_UART4 is not set +CONFIG_BSP_USING_UART5=y +# CONFIG_BSP_USING_PWM is not set +# CONFIG_BSP_USING_SPI is not set +# CONFIG_BSP_USING_ADC is not set +# CONFIG_BSP_USING_SDMMC is not set +# CONFIG_BSP_USING_QSPI_FLASH is not set +# CONFIG_BSP_USING_HW_I2C is not set +# CONFIG_BSP_USING_I2C is not set +# CONFIG_BSP_USING_USBD is not set +# CONFIG_BSP_USING_RTC is not set +# CONFIG_BSP_USING_ON_CHIP_FLASH is not set +# CONFIG_BSP_USING_WDT is not set +# CONFIG_BSP_USING_DAC is not set +# CONFIG_BSP_USING_TIM is not set + +# +# Board extended module Drivers +# +# CONFIG_BSP_USING_SLIDER is not set +# CONFIG_BSP_USING_RW007 is not set diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/.cproject b/bsp/cypress/psoc6-cy8ckit-062S2-43012/.cproject new file mode 100644 index 0000000000..52796a8a5d --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/.cproject @@ -0,0 +1,240 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/.gitignore b/bsp/cypress/psoc6-cy8ckit-062S2-43012/.gitignore new file mode 100644 index 0000000000..7221bde019 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/.gitignore @@ -0,0 +1,42 @@ +*.pyc +*.map +*.dblite +*.elf +*.bin +*.hex +*.axf +*.exe +*.pdb +*.idb +*.ilk +*.old +build +Debug +documentation/html +packages/ +*~ +*.o +*.obj +*.out +*.bak +*.dep +*.lib +*.i +*.d +.DS_Stor* +.config 3 +.config 4 +.config 5 +Midea-X1 +*.uimg +GPATH +GRTAGS +GTAGS +.vscode +JLinkLog.txt +JLinkSettings.ini +DebugConfig/ +RTE/ +settings/ +*.uvguix* +cconfig.h diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/.project b/bsp/cypress/psoc6-cy8ckit-062S2-43012/.project new file mode 100644 index 0000000000..f7b356f1f9 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/.project @@ -0,0 +1,28 @@ + + + dist_ide_project + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + com.cypress.studio.app.cymodusnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/.settings/dist_ide_project.DAPLink.Debug.rttlaunch b/bsp/cypress/psoc6-cy8ckit-062S2-43012/.settings/dist_ide_project.DAPLink.Debug.rttlaunch new file mode 100644 index 0000000000..8c8040b3ad --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/.settings/dist_ide_project.DAPLink.Debug.rttlaunch @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/.settings/dist_ide_project.OpenOCD.Debug.rttlaunch b/bsp/cypress/psoc6-cy8ckit-062S2-43012/.settings/dist_ide_project.OpenOCD.Debug.rttlaunch new file mode 100644 index 0000000000..2b3931d2f9 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/.settings/dist_ide_project.OpenOCD.Debug.rttlaunch @@ -0,0 +1,58 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/Kconfig b/bsp/cypress/psoc6-cy8ckit-062S2-43012/Kconfig new file mode 100644 index 0000000000..8cbc7b71a8 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/Kconfig @@ -0,0 +1,21 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "board/Kconfig" diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/LICENSE b/bsp/cypress/psoc6-cy8ckit-062S2-43012/LICENSE new file mode 100644 index 0000000000..91c81ad20b --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/LICENSE @@ -0,0 +1,210 @@ +CYPRESS END USER LICENSE AGREEMENT + +PLEASE READ THIS END USER LICENSE AGREEMENT ("Agreement") CAREFULLY BEFORE +DOWNLOADING, INSTALLING, COPYING, OR USING THIS SOFTWARE AND ACCOMPANYING +DOCUMENTATION. BY DOWNLOADING, INSTALLING, COPYING OR USING THE SOFTWARE, +YOU ARE AGREEING TO BE BOUND BY THIS AGREEMENT. IF YOU DO NOT AGREE TO ALL +OF THE TERMS OF THIS AGREEMENT, PROMPTLY RETURN AND DO NOT USE THE SOFTWARE. +IF YOU HAVE PURCHASED THIS LICENSE TO THE SOFTWARE, YOUR RIGHT TO RETURN THE +SOFTWARE EXPIRES 30 DAYS AFTER YOUR PURCHASE AND APPLIES ONLY TO THE ORIGINAL +PURCHASER. + +1. Definitions. + + "Software" means this software and any accompanying documentation, + including any upgrades, updates, bug fixes or modified versions provided + to you by Cypress. + + "Source Code" means software in human-readable form. + + "Binary Code" means the software in binary code form such as object code or + an executable. + + "Development Tools" means software that is intended to be installed on a + personal computer and used to create programming code for Firmware, + Drivers, or Host Applications. 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The parties consent to personal and exclusive jurisdiction of and venue +in, the state and federal courts within Santa Clara County, California; +provided however, that nothing in this Agreement will limit Cypress' right to +bring legal action in any venue in order to protect or enforce its +intellectual property rights. No failure of either party to exercise or +enforce any of its rights under this Agreement will act as a waiver of such +rights. If any portion of this Agreement is found to be void or +unenforceable, the remaining provisions of this Agreement shall remain in full +force and effect. This Agreement is the complete and exclusive agreement +between the parties with respect to the subject matter hereof, superseding and +replacing any and all prior agreements, communications, and understandings +(both written and oral) regarding such subject matter. Any notice to Cypress +will be deemed effective when actually received and must be sent to Cypress +Semiconductor Corporation, ATTN: Chief Legal Officer, 198 Champion Court, San +Jose, CA 95134 USA. diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/README.md b/bsp/cypress/psoc6-cy8ckit-062S2-43012/README.md new file mode 100644 index 0000000000..5071b60a5d --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/README.md @@ -0,0 +1,119 @@ +# Cypress Psoc6-CY8CKIT-062S2-43012 说明 + +## 简介 + +本文档为 `RT-Thread` 为 `PSoC6 CY8CKIT-062S2-43012`开发板提供的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 `RT-Thread` 驱动更多板载资源。 + +## 开发板介绍 + +`PSoC6 CY8CKIT-062S2-43012` 是英飞凌推出的一款32位双核CPU子系统（ ARM Cortex-M4 和 ARM Cortex-M0）的开发板，具有单周期乘法的150-MHz Arm Cortex-M4F CPU (浮点和存储器保护单元)，100-MHz Cortex M0+ CPU，带单周期乘法和MPU，可以充分发挥 PSoC6 双核芯片性能。 + +开发板外观详细信息：[CY8CPROTO-062-4343W - Infineon Technologies](https://www.infineon.com/cms/en/product/evaluation-boards/cy8cproto-062-4343w/) + +该开发板核心 **板载资源** 如下： + +- MCU：CY8C624ABZI-S2D44，Cortex-M4主频 150MHz，Cortex-M0主频 100MHz，2MB Flash 和 1MB SRAM + MCU手册更多详细信息请参考文档 [PSoC 6 MCU: CY8C62x8, CY8C62xA Datasheet (infineon.com)](https://www.infineon.com/dgdl/Infineon-PSOC_6_MCU_CY8C62X8_CY8C62XA-DataSheet-v17_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee7d03a70b1) +- 板载资源：microSD card , 64-Mb Quad-SPI NOR flash， CYW43012 Wi-Fi + Bluetooth Combo Chip +- 开发环境：ModusToolbox 2.0/MDK V5 + PSoC® Creator™ 下载链接 [ModusToolbox™ Software - Infineon Technologies](https://www.infineon.com/cms/en/design-support/tools/sdk/modustoolbox-software/) +- 开发板：CY8CKIT-062-BLE PSoC 6 BLE Pioneer Kit + 开发板更多详细信息请参考文档 https://www.cypress.com/file/390496/download + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **片上外设** | **支持情况** | **备注** | +| :----------: | :----------: | :-----------: | +| USB 转串口 | 支持 | UART5 | +| GPIO | 支持 | — | +| UART | 支持 | UART0-5 | +| I2C | 支持 | 软件+硬件 I2C | +| RTC | 支持 | — | +| WDT | 支持 | — | +| PWM | 支持 | — | +| SPI | 支持 | — | +| HardTimer | 支持 | — | +| DAC | 支持 | IDAC | +| Flash | 支持 | 片内 Falsh | +| Touch | 支持 | 触摸滑条 | +| SDIO | 暂不支持 | — | +| USB Device | 暂不支持 | — | +| USB Host | 暂不支持 | — | + +## 快速上手 + +本 BSP 是以 `MDK V5` 和 `RT-Thread Studio` 为开发环境（编译器：ARMClang / GCC），接下来介绍如何将系统运行起来。 + +### 使用 MDK V5 开发 + +#### 硬件连接 + +使用数据线连接开发板到 PC。 + +#### 编译下载 + +1、配置工程： + +首先打开 MDK ，若没有安装 `Cypress-PSoC6` 的芯片支持包会提示在线安装，根据提示安装即可。若受网络问题，可以进入 [keil](https://www.keil.com/dd2/pack) 官网下载安装包，离线安装。 + +![mdk_package](./figures/mdk_package.png) + +2、 编译此工程：在安装好芯片支持包后，在 `MDK`工程中进行编译。 + +3、下载此工程： + +工程默认配置使用板载 `DAP-LINK` 使用 `SWD` 方式下载程序，使用数据线连接开发板，编译之后直接点击下载按钮即可。 + +### 使用 RT-Thread Studio 开发 + +#### 导入工程 + +* 首先打开 `RT-Thread Studio` 开发工具，点加左上角文件—>导入—> RT-Thread Studio项目到工作空间中。 + +![](./figures/studio1.png) + +* 接着选择 `PSoC6 CY8CKIT-062S2-43012` 开发板支持包的目录，进行导入。 + +![](./figures/studio2.png) + +#### 编译下载 + +* 点击 IDE 左上角的构建选项进行工程的编译。 + +![](./figures/studio3-build.png) + +* 当编译无错误警告时，点击 `Debug` 或 `Download` 选项进行调试/下载。 + + 注：若点击下载并下载成功后串口终端无显示信息，请手动按下复位按键进行重启运行。 + + ![](./figures/studio4-download.png) + +## 运行结果 + +下载程序成功之后，系统会自动运行。打开终端工具串口助手，选择波特率为 115200。复位设备后，LED 将会以 500HZ 的频率闪烁，而且在终端上可以看到 `RT-Thread` 的输出信息： + +注：推荐使用串口调试助手如：`MobaXterm` + +``` + \ | / +- RT - Thread Operating System + / | \ 4.1.1 build Jul 25 2022 18:03:35 + 2006 - 2022 Copyright by RT-Thread team +msh > +``` + +## 联系人 + +维护人: + +- [Rbb666](https://github.com/Rbb666) \ No newline at end of file diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/SConscript b/bsp/cypress/psoc6-cy8ckit-062S2-43012/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/SConstruct b/bsp/cypress/psoc6-cy8ckit-062S2-43012/SConstruct new file mode 100644 index 0000000000..ed03635714 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/SConstruct @@ -0,0 +1,60 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rt-thread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM in ['iccarm']: + env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +IFX_library = 'IFX_PSOC6_HAL' +rtconfig.BSP_LIBRARY_TYPE = IFX_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, IFX_library, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/applications/SConscript b/bsp/cypress/psoc6-cy8ckit-062S2-43012/applications/SConscript new file mode 100644 index 0000000000..fe708e67c8 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/applications/SConscript @@ -0,0 +1,16 @@ +import rtconfig +from building import * +import os + +cwd = GetCurrentDir() +path = [cwd] +src = Glob('*.c') + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = path) + +list = os.listdir(cwd) +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + group = group + SConscript(os.path.join(item, 'SConscript')) + +Return('group') \ No newline at end of file diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/applications/main.c b/bsp/cypress/psoc6-cy8ckit-062S2-43012/applications/main.c new file mode 100644 index 0000000000..e3e21c2ec8 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/applications/main.c @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2006-2022, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022-06-29 Rbb666 first version + */ + +#include +#include + +#include "drv_gpio.h" + +#define LED_PIN GET_PIN(13, 7) + +int main(void) +{ + rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT); + + for (;;) + { + rt_pin_write(LED_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED_PIN, PIN_LOW); + rt_thread_mdelay(500); + } +} diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/Kconfig b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/Kconfig new file mode 100644 index 0000000000..6264b8b300 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/Kconfig @@ -0,0 +1,323 @@ +menu "Hardware Drivers Config" + +config SOC_IFX_PSOC6_43012 + bool + select SOC_SERIES_IFX_PSOC6 + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + +menu "Onboard Peripheral Drivers" + + config BSP_USING_USB_TO_USART + bool "Enable USB TO USART (uart5)" + select BSP_USING_UART + select BSP_USING_UART5 + default y +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART0 + bool "Enable UART0" + default n + config BSP_USING_UART1 + bool "Enable UART1" + default n + config BSP_USING_UART2 + bool "Enable UART2" + default n + config BSP_USING_UART3 + bool "Enable UART3" + default n + config BSP_USING_UART4 + bool "Enable UART4" + default n + config BSP_USING_UART5 + bool "Enable UART5" + default y + endif + + menuconfig BSP_USING_PWM + bool "Enable PWM" + default n + select RT_USING_PWM + if BSP_USING_PWM + menuconfig BSP_USING_PWM0 + bool "Enable timer0 output pwm" + default n + if BSP_USING_PWM0 + menuconfig BSP_USING_PWM0_CH3 + bool "Enable PWM0 channel3" + default n + if BSP_USING_PWM0_CH3 + config BSP_USING_PWM0_PORT13 + bool "Enable PWM0-PORT13 output pwm" + default n + endif + menuconfig BSP_USING_PWM0_CH7 + bool "Enable PWM0 channel7" + default n + if BSP_USING_PWM0_CH7 + config BSP_USING_PWM0_PORT2 + bool "Enable PWM0-PORT2 output pwm" + default n + endif + if BSP_USING_PWM0_CH7 + config BSP_USING_PWM0_PORT5 + bool "Enable PWM0-PORT5 output pwm" + default n + endif + if BSP_USING_PWM0_CH7 + config BSP_USING_PWM0_PORT7 + bool "Enable PWM0-PORT7 output pwm" + default n + endif + if BSP_USING_PWM0_CH7 + config BSP_USING_PWM0_PORT9 + bool "Enable PWM0-PORT9 output pwm" + default n + endif + if BSP_USING_PWM0_CH7 + config BSP_USING_PWM0_PORT10 + bool "Enable PWM0-PORT10 output pwm" + default n + endif + if BSP_USING_PWM0_CH7 + config BSP_USING_PWM0_PORT12 + bool "Enable PWM0-PORT12 output pwm" + default n + endif + endif + endif + + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + select RT_USING_SPI + default n + if BSP_USING_SPI + menuconfig BSP_USING_SPI3 + bool "Enable SPI3 BUS" + default n + if BSP_USING_SPI3 + config BSP_USING_SPI3_SAMPLE + bool "Enable SPI3 BUS Sample" + default n + endif + endif + + menuconfig BSP_USING_ADC + bool "Enable ADC" + default n + select RT_USING_ADC + if BSP_USING_ADC + config BSP_USING_ADC1 + bool "Enable ADC1" + default n + endif + + config BSP_USING_SDMMC + bool "Enable SDMMC (sd card)" + default n + select RT_USING_SDIO + select RT_USING_DFS + select RT_USING_DFS_ELMFAT + if BSP_USING_SDMMC + config BSP_USING_SDIO1 + bool "Enable SDIO1 (sd card)" + default n + endif + + config BSP_USING_QSPI_FLASH + bool "Enable QSPI BUS" + select RT_USING_QSPI + select RT_USING_SFUD + select RT_SFUD_USING_QSPI + default n + + menuconfig BSP_USING_HW_I2C + bool "Enable Hardware I2C Bus" + default n + select RT_USING_I2C + select RT_USING_PIN + if BSP_USING_HW_I2C + config BSP_USING_HW_I2C3 + bool "Enable I2C3 Bus (User I2C)" + default n + if BSP_USING_HW_I2C3 + comment "Notice: P6_0 --> 48; P6_1 --> 49" + config BSP_I2C3_SCL_PIN + int "i2c3 SCL pin number" + range 1 113 + default 48 + config BSP_I2C3_SDA_PIN + int "i2c3 SDA pin number" + range 1 113 + default 49 + endif + config BSP_USING_HW_I2C6 + bool "Enable I2C6 Bus (User I2C)" + default n + if BSP_USING_HW_I2C6 + comment "Notice: P13_0 --> 48; P13_1 --> 49" + config BSP_I2C6_SCL_PIN + int "i2c6 SCL pin number" + range 1 113 + default 104 + config BSP_I2C6_SDA_PIN + int "i2c6 SDA pin number" + range 1 113 + default 105 + endif + endif + + menuconfig BSP_USING_I2C + bool "Enable Software I2C Bus" + default n + select RT_USING_I2C + select RT_USING_I2C_BITOPS + select RT_USING_PIN + if BSP_USING_I2C + config BSP_USING_I2C1 + bool "Enable I2C1 Bus (User I2C)" + default n + if BSP_USING_I2C1 + comment "Notice: P13_1 --> 105; P13_2 --> 106" + config BSP_I2C1_SCL_PIN + int "i2c1 SCL pin number" + range 1 113 + default 105 + config BSP_I2C1_SDA_PIN + int "i2c1 SDA pin number" + range 1 113 + default 106 + endif + endif + + config BSP_USING_USBD + bool "Enable USB Device" + select RT_USING_USB_DEVICE + default n + + menuconfig BSP_USING_RTC + bool "Enable RTC" + select RT_USING_RTC + default n + if BSP_USING_RTC + choice + prompt "Select clock source" + default BSP_RTC_USING_LSE + + config BSP_RTC_USING_LSE + bool "RTC USING LSE" + + config BSP_RTC_USING_LSI + bool "RTC USING LSI" + endchoice + endif + + config BSP_USING_ON_CHIP_FLASH + bool "Enable on-chip FLASH" + default n + + config BSP_USING_WDT + bool "Enable Watchdog Timer" + select RT_USING_WDT + default n + + menuconfig BSP_USING_DAC + bool "Enable DAC" + default n + select RT_USING_DAC + if BSP_USING_DAC + config BSP_USING_DAC1 + bool "Enable DAC1" + default n + config BSP_USING_DAC2 + bool "Enable DAC2" + default n + endif + + menuconfig BSP_USING_TIM + bool "Enable timer" + default n + select RT_USING_HWTIMER + if BSP_USING_TIM + config BSP_USING_TIM1 + bool "Enable TIM1" + default n + config BSP_USING_TIM2 + bool "Enable TIM2" + default n + endif +endmenu + +menu "Board extended module Drivers" + + config BSP_USING_SLIDER + bool "Enable Slider Demo" + select BSP_USING_PWM + select BSP_USING_PWM0 + select BSP_USING_PWM0_CH3 + select BSP_USING_PWM0_PORT13 + default n + + menuconfig BSP_USING_RW007 + bool "Enable RW007" + default n + select PKG_USING_RW007 + select BSP_USING_SPI + select RW007_NOT_USE_EXAMPLE_DRIVERS + + if BSP_USING_RW007 + comment "Notice: P5_7 --> 47; P6_2 -->50; P6_5 --> 53; P12_0 --> 96" + config IFX_RW007_SPI_BUS_NAME + string "RW007 BUS NAME" + default "spi3" + + config IFX_RW007_WIFI_SSID + string "Wi-Fi SSID" + default "realthread_VIP" + + config IFX_RW007_WIFI_PASSWORD + string "Wi-Fi Password" + default "your wifi password" + + config IFX_RW007_CS_PIN + int "(INT)CS pin index" + range 1 113 + default 96 + + config IFX_RW007_BOOT0_PIN + int "(INT)BOOT0 pin index (same as spi clk pin)" + range 1 113 + default 50 + + config IFX_RW007_BOOT1_PIN + int "(INT)BOOT1 pin index (same as spi cs pin)" + range 1 113 + default 96 + + config IFX_RW007_INT_BUSY_PIN + int "(INT)INT/BUSY pin index" + range 1 113 + default 47 + + config IFX_RW007_RST_PIN + int "(INT)RESET pin index" + range 1 113 + default 53 + endif +endmenu + +endmenu diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/SConscript b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/SConscript new file mode 100644 index 0000000000..a6cdd0eedc --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/SConscript @@ -0,0 +1,44 @@ +import os +import rtconfig +from building import * + +Import('SDK_LIB') + +objs = [] +cwd = GetCurrentDir() +list = os.listdir(cwd) + +# add general drivers +src = Split(''' +board.c +''') + +if GetDepend(['BSP_USING_SPI3_SAMPLE']): + src += Glob('ports/spi_sample.c') + +if GetDepend(['BSP_USING_RW007']): + src += Glob('ports/drv_rw007.c') + +if GetDepend(['BSP_USING_SLIDER']): + src += Glob('ports/slider_sample.c') + +path = [cwd] +path += [cwd + '/ports'] + +startup_path_prefix = SDK_LIB + +if rtconfig.PLATFORM in ['gcc']: + src += [startup_path_prefix + + '/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/startup_psoc6_02_cm4.S'] + src += [startup_path_prefix + + '/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S'] +elif rtconfig.PLATFORM in ['armcc', 'armclang']: + src += [startup_path_prefix + + '/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_02_cm4.S'] + src += [startup_path_prefix + + '/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/TOOLCHAIN_ARM/cy_syslib_mdk.S'] + +CPPDEFINES = ['CY8C624ABZI_S2D44', 'IFX_PSOC6_43012', 'CY_USING_HAL', 'COMPONENT_CAT1A', 'COMPONENT_CAT1', 'COMPONENT_BSP_DESIGN_MODUS'] +group = DefineGroup('Drivers', src, depend=[''], CPPPATH=path, CPPDEFINES=CPPDEFINES) + +Return('group') \ No newline at end of file diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/board.c b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/board.c new file mode 100644 index 0000000000..98ed84a6c2 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/board.c @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2006-2022, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022-06-29 Rbb666 first version + */ + +#include "board.h" + +void cy_bsp_all_init(void) +{ + cy_rslt_t result; + + /* Initialize the device and board peripherals */ + result = cybsp_init(); + + /* Board init failed. Stop program execution */ + if (result != CY_RSLT_SUCCESS) + { + CY_ASSERT(0); + } +} diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/board.h b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/board.h new file mode 100644 index 0000000000..257de99ee8 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/board.h @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2006-2022, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022-06-29 Rbb666 first version + * 2022-07-26 Rbb666 Add Flash Config + */ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include +#include "drv_common.h" +#include "drv_gpio.h" + +#include "cy_result.h" +#include "cybsp_types.h" +#include "cyhal.h" +#include "cybsp.h" + +#ifdef BSP_USING_USBD + #include "cy_usb_dev.h" + #include "cy_usb_dev_hid.h" + #include "cycfg_usbdev.h" +#endif + +/*FLASH CONFIG*/ +#define IFX_FLASH_START_ADRESS ((uint32_t)0x10000000) +#define IFX_FLASH_PAGE_SIZE (256 * 1024) +#define IFX_FLASH_SIZE (2 * 1024 * 1024) +#define IFX_FLASH_END_ADDRESS ((uint32_t)(IFX_FLASH_START_ADRESS + IFX_FLASH_SIZE)) + +/*EFLASH CONFIG*/ +#define IFX_EFLASH_START_ADRESS ((uint32_t)0x14000000) +#define IFX_EFLASH_PAGE_SIZE (32 * 1024) +#define IFX_EFLASH_SIZE (32 * 1024) +#define IFX_EFLASH_END_ADDRESS ((uint32_t)(IFX_EFLASH_START_ADRESS + IFX_EFLASH_SIZE)) + +/*SRAM CONFIG*/ +#define IFX_SRAM_SIZE (1014) +#define IFX_SRAM_END (0x08002000 + IFX_SRAM_SIZE * 1024) + +#ifdef __ARMCC_VERSION + extern int Image$$RW_IRAM1$$ZI$$Limit; + #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) + #define HEAP_END IFX_SRAM_END +#elif __ICCARM__ + #pragma section="HEAP" + #define HEAP_BEGIN (__segment_end("HEAP")) +#else + extern unsigned int __end__; + extern unsigned int __HeapLimit; + #define HEAP_BEGIN (void*)&__end__ + #define HEAP_END (void*)&__HeapLimit +#endif + +void cy_bsp_all_init(void); + +#endif + diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/linker_scripts/link.icf b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/linker_scripts/link.icf new file mode 100644 index 0000000000..fb4071c60d --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/linker_scripts/link.icf @@ -0,0 +1,247 @@ +/******************************************************************************* +* \file cy8c6xxa_cm4_dual.icf +* \version 2.91 +* +* Linker file for the IAR compiler. +* +* The main purpose of the linker script is to describe how the sections in the +* input files should be mapped into the output file, and to control the memory +* layout of the output file. +* +* \note The entry point is fixed and starts at 0x10000000. The valid application +* image should be placed there. +* +* \note The linker files included with the PDL template projects must be generic +* and handle all common use cases. Your project may not use every section +* defined in the linker files. In that case you may see warnings during the +* build process. In your project, you can simply comment out or remove the +* relevant code in the linker file. +* +******************************************************************************** +* \copyright +* Copyright 2016-2021 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ + +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_4.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x00000000; + +/* The symbols below define the location and size of blocks of memory in the target. + * Use these symbols to specify the memory regions available for allocation. + */ + +/* The following symbols control RAM and flash memory allocation for the CM4 core. + * You can change the memory allocation by editing RAM and Flash symbols. + * Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use. + * Using this memory region for other purposes will lead to unexpected behavior. + * Your changes must be aligned with the corresponding symbols for CM0+ core in 'xx_cm0plus.icf', + * where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.icf'. + */ +/* RAM */ +define symbol __ICFEDIT_region_IRAM1_start__ = 0x08002000; +define symbol __ICFEDIT_region_IRAM1_end__ = 0x080FF7FF; + +/* Flash */ +define symbol __ICFEDIT_region_IROM1_start__ = 0x10000000; +define symbol __ICFEDIT_region_IROM1_end__ = 0x101FFFFF; + +/* The following symbols define a 32K flash region used for EEPROM emulation. + * This region can also be used as the general purpose flash. + * You can assign sections to this memory region for only one of the cores. + * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region. + * Therefore, repurposing this memory region will prevent such middleware from operation. + */ +define symbol __ICFEDIT_region_IROM2_start__ = 0x14000000; +define symbol __ICFEDIT_region_IROM2_end__ = 0x14007FFF; + +/* The following symbols define device specific memory regions and must not be changed. */ +/* Supervisory FLASH - User Data */ +define symbol __ICFEDIT_region_IROM3_start__ = 0x16000800; +define symbol __ICFEDIT_region_IROM3_end__ = 0x16000FFF; + +/* Supervisory FLASH - Normal Access Restrictions (NAR) */ +define symbol __ICFEDIT_region_IROM4_start__ = 0x16001A00; +define symbol __ICFEDIT_region_IROM4_end__ = 0x16001BFF; + +/* Supervisory FLASH - Public Key */ +define symbol __ICFEDIT_region_IROM5_start__ = 0x16005A00; +define symbol __ICFEDIT_region_IROM5_end__ = 0x160065FF; + +/* Supervisory FLASH - Table of Content # 2 */ +define symbol __ICFEDIT_region_IROM6_start__ = 0x16007C00; +define symbol __ICFEDIT_region_IROM6_end__ = 0x16007DFF; + +/* Supervisory FLASH - Table of Content # 2 Copy */ +define symbol __ICFEDIT_region_IROM7_start__ = 0x16007E00; +define symbol __ICFEDIT_region_IROM7_end__ = 0x16007FFF; + +/* eFuse */ +define symbol __ICFEDIT_region_IROM8_start__ = 0x90700000; +define symbol __ICFEDIT_region_IROM8_end__ = 0x907FFFFF; + +/* XIP */ +define symbol __ICFEDIT_region_EROM1_start__ = 0x18000000; +define symbol __ICFEDIT_region_EROM1_end__ = 0x1FFFFFFF; + +define symbol __ICFEDIT_region_EROM2_start__ = 0x0; +define symbol __ICFEDIT_region_EROM2_end__ = 0x0; +define symbol __ICFEDIT_region_EROM3_start__ = 0x0; +define symbol __ICFEDIT_region_EROM3_end__ = 0x0; + + +define symbol __ICFEDIT_region_IRAM2_start__ = 0x0; +define symbol __ICFEDIT_region_IRAM2_end__ = 0x0; +define symbol __ICFEDIT_region_ERAM1_start__ = 0x0; +define symbol __ICFEDIT_region_ERAM1_end__ = 0x0; +define symbol __ICFEDIT_region_ERAM2_start__ = 0x0; +define symbol __ICFEDIT_region_ERAM2_end__ = 0x0; +define symbol __ICFEDIT_region_ERAM3_start__ = 0x0; +define symbol __ICFEDIT_region_ERAM3_end__ = 0x0; +/*-Sizes-*/ +if (!isdefinedsymbol(__STACK_SIZE)) { + define symbol __ICFEDIT_size_cstack__ = 0x1000; +} else { + define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE; +} +define symbol __ICFEDIT_size_proc_stack__ = 0x0; + +/* Defines the minimum heap size. The actual heap size will be expanded to the end of the stack region */ +if (!isdefinedsymbol(__HEAP_SIZE)) { + define symbol __ICFEDIT_size_heap__ = 0x0400; +} else { + define symbol __ICFEDIT_size_heap__ = __HEAP_SIZE; +} +/**** End of ICF editor section. ###ICF###*/ + +/* By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core. + * More about CM0+ prebuilt images, see here: + * https://github.com/cypresssemiconductorco/psoc6cm0p + */ +/* The size of the Cortex-M0+ application image */ +define symbol FLASH_CM0P_SIZE = 0x2000; + +define memory mem with size = 4G; +define region IROM1_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__]; +define region IROM2_region = mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__]; +define region IROM3_region = mem:[from __ICFEDIT_region_IROM3_start__ to __ICFEDIT_region_IROM3_end__]; +define region IROM4_region = mem:[from __ICFEDIT_region_IROM4_start__ to __ICFEDIT_region_IROM4_end__]; +define region IROM5_region = mem:[from __ICFEDIT_region_IROM5_start__ to __ICFEDIT_region_IROM5_end__]; +define region IROM6_region = mem:[from __ICFEDIT_region_IROM6_start__ to __ICFEDIT_region_IROM6_end__]; +define region IROM7_region = mem:[from __ICFEDIT_region_IROM7_start__ to __ICFEDIT_region_IROM7_end__]; +define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFEDIT_region_IROM8_end__]; +define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__]; +define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { }; +define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { }; +define block HSTACK {block HEAP, block PROC_STACK, last block CSTACK}; +define block CM0P_RO with size = FLASH_CM0P_SIZE { readonly section .cy_m0p_image }; +define block RO {first section .intvec, readonly}; + +define block cy_xip { section .cy_xip }; + +/*-Initializations-*/ +initialize by copy { readwrite }; +do not initialize { section .noinit, section .intvec_ram }; + +/*-Placement-*/ + +/* Flash - Cortex-M0+ application image */ +place at start of IROM1_region { block CM0P_RO }; + +/* Flash - Cortex-M4 application */ +place in IROM1_region { block RO }; + +/* Used for the digital signature of the secure application and the Bootloader SDK application. */ +".cy_app_signature" : place at address (__ICFEDIT_region_IROM1_end__ - 0x200) { section .cy_app_signature }; + +/* Emulated EEPROM Flash area */ +".cy_em_eeprom" : place at start of IROM2_region { section .cy_em_eeprom }; + +/* Supervisory Flash - User Data */ +".cy_sflash_user_data" : place at start of IROM3_region { section .cy_sflash_user_data }; + +/* Supervisory Flash - NAR */ +".cy_sflash_nar" : place at start of IROM4_region { section .cy_sflash_nar }; + +/* Supervisory Flash - Public Key */ +".cy_sflash_public_key" : place at start of IROM5_region { section .cy_sflash_public_key }; + +/* Supervisory Flash - TOC2 */ +".cy_toc_part2" : place at start of IROM6_region { section .cy_toc_part2 }; + +/* Supervisory Flash - RTOC2 */ +".cy_rtoc_part2" : place at start of IROM7_region { section .cy_rtoc_part2 }; + +/* eFuse */ +".cy_efuse" : place at start of IROM8_region { section .cy_efuse }; + +/* Execute in Place (XIP). See the smif driver documentation for details. */ +"cy_xip" : place at start of EROM1_region { block cy_xip }; + +/* RAM */ +place at start of IRAM1_region { readwrite section .intvec_ram}; +place in IRAM1_region { readwrite }; +place at end of IRAM1_region { block HSTACK }; + +/* These sections are used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage. */ +".cymeta" : place at address mem : 0x90500000 { readonly section .cymeta }; + + +keep { section .cy_m0p_image, + section .cy_app_signature, + section .cy_em_eeprom, + section .cy_sflash_user_data, + section .cy_sflash_nar, + section .cy_sflash_public_key, + section .cy_toc_part2, + section .cy_rtoc_part2, + section .cy_efuse, + section .cy_xip, + section .cymeta, + }; + + +/* The following symbols used by the cymcuelftool. */ +/* Flash */ +define exported symbol __cy_memory_0_start = 0x10000000; +define exported symbol __cy_memory_0_length = 0x00200000; +define exported symbol __cy_memory_0_row_size = 0x200; + +/* Emulated EEPROM Flash area */ +define exported symbol __cy_memory_1_start = 0x14000000; +define exported symbol __cy_memory_1_length = 0x8000; +define exported symbol __cy_memory_1_row_size = 0x200; + +/* Supervisory Flash */ +define exported symbol __cy_memory_2_start = 0x16000000; +define exported symbol __cy_memory_2_length = 0x8000; +define exported symbol __cy_memory_2_row_size = 0x200; + +/* XIP */ +define exported symbol __cy_memory_3_start = 0x18000000; +define exported symbol __cy_memory_3_length = 0x08000000; +define exported symbol __cy_memory_3_row_size = 0x200; + +/* eFuse */ +define exported symbol __cy_memory_4_start = 0x90700000; +define exported symbol __cy_memory_4_length = 0x100000; +define exported symbol __cy_memory_4_row_size = 1; + +/* EOF */ diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/linker_scripts/link.ld b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/linker_scripts/link.ld new file mode 100644 index 0000000000..8520b06add --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/linker_scripts/link.ld @@ -0,0 +1,487 @@ +/***************************************************************************//** +* \file cy8c6xxa_cm4_dual.ld +* \version 2.91 +* +* Linker file for the GNU C compiler. +* +* The main purpose of the linker script is to describe how the sections in the +* input files should be mapped into the output file, and to control the memory +* layout of the output file. +* +* \note The entry point location is fixed and starts at 0x10000000. The valid +* application image should be placed there. +* +* \note The linker files included with the PDL template projects must be generic +* and handle all common use cases. Your project may not use every section +* defined in the linker files. In that case you may see warnings during the +* build process. In your project, you can simply comment out or remove the +* relevant code in the linker file. +* +******************************************************************************** +* \copyright +* Copyright 2016-2021 Cypress Semiconductor Corporation +* SPDX-License-Identifier: Apache-2.0 +* +* Licensed under the Apache License, Version 2.0 (the "License"); +* you may not use this file except in compliance with the License. +* You may obtain a copy of the License at +* +* http://www.apache.org/licenses/LICENSE-2.0 +* +* Unless required by applicable law or agreed to in writing, software +* distributed under the License is distributed on an "AS IS" BASIS, +* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +* See the License for the specific language governing permissions and +* limitations under the License. +*******************************************************************************/ + +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +SEARCH_DIR(.) +GROUP(-lgcc -lc -lnosys) +ENTRY(Reset_Handler) + +/* The size of the stack section at the end of CM4 SRAM */ +STACK_SIZE = 0x1000; + +/* By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core. +* More about CM0+ prebuilt images, see here: +* https://github.com/cypresssemiconductorco/psoc6cm0p +*/ +/* The size of the Cortex-M0+ application image at the start of FLASH */ +FLASH_CM0P_SIZE = 0x2000; + +/* Force symbol to be entered in the output file as an undefined symbol. Doing +* this may, for example, trigger linking of additional modules from standard +* libraries. You may list several symbols for each EXTERN, and you may use +* EXTERN multiple times. This command has the same effect as the -u command-line +* option. +*/ +EXTERN(Reset_Handler) + +/* The MEMORY section below describes the location and size of blocks of memory in the target. +* Use this section to specify the memory regions available for allocation. +*/ +MEMORY +{ + /* The ram and flash regions control RAM and flash memory allocation for the CM4 core. + * You can change the memory allocation by editing the 'ram' and 'flash' regions. + * Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use. + * Using this memory region for other purposes will lead to unexpected behavior. + * Your changes must be aligned with the corresponding memory regions for CM0+ core in 'xx_cm0plus.ld', + * where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.ld'. + */ + ram (rwx) : ORIGIN = 0x08002000, LENGTH = 0xFD800 + flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x200000 + + /* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash. + * You can assign sections to this memory region for only one of the cores. + * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region. + * Therefore, repurposing this memory region will prevent such middleware from operation. + */ + em_eeprom (rx) : ORIGIN = 0x14000000, LENGTH = 0x8000 /* 32 KB */ + + /* The following regions define device specific memory regions and must not be changed. */ + sflash_user_data (rx) : ORIGIN = 0x16000800, LENGTH = 0x800 /* Supervisory flash: User data */ + sflash_nar (rx) : ORIGIN = 0x16001A00, LENGTH = 0x200 /* Supervisory flash: Normal Access Restrictions (NAR) */ + sflash_public_key (rx) : ORIGIN = 0x16005A00, LENGTH = 0xC00 /* Supervisory flash: Public Key */ + sflash_toc_2 (rx) : ORIGIN = 0x16007C00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 */ + sflash_rtoc_2 (rx) : ORIGIN = 0x16007E00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 Copy */ + xip (rx) : ORIGIN = 0x18000000, LENGTH = 0x8000000 /* 128 MB */ + efuse (r) : ORIGIN = 0x90700000, LENGTH = 0x100000 /* 1 MB */ +} + +/* Library configurations */ +GROUP(libgcc.a libc.a libm.a libnosys.a) + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + * __Vectors_End + * __Vectors_Size + */ + + +SECTIONS +{ + /* Cortex-M0+ application flash image area */ + .cy_m0p_image ORIGIN(flash) : + { + . = ALIGN(4); + __cy_m0p_code_start = . ; + KEEP(*(.cy_m0p_image)) + __cy_m0p_code_end = . ; + } > flash + + /* Check if .cy_m0p_image size exceeds FLASH_CM0P_SIZE */ + ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4, increase FLASH_CM0P_SIZE") + + /* Cortex-M4 application flash area */ + .text ORIGIN(flash) + FLASH_CM0P_SIZE : + { + . = ALIGN(4); + __Vectors = . ; + KEEP(*(.vectors)) + . = ALIGN(4); + __Vectors_End = .; + __Vectors_Size = __Vectors_End - __Vectors; + __end__ = .; + + . = ALIGN(4); + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + . = ALIGN(4); + /* Read-only code (constants). */ + *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*) + KEEP(*(.eh_frame*)) + + /* section information for utest */ + . = ALIGN(4); + __rt_utest_tc_tab_start = .; + KEEP(*(UtestTcTab)) + __rt_utest_tc_tab_end = .; + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + . = ALIGN(4); + + /* section information for modules */ + . = ALIGN(4); + __rtmsymtab_start = .; + KEEP(*(RTMSymTab)) + __rtmsymtab_end = .; + + /* section information for initialization */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + __exidx_start = .; + + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > flash + __exidx_end = .; + + + /* To copy multiple ROM to RAM sections, + * uncomment .copy.table section and, + * define __STARTUP_COPY_MULTIPLE in startup_psoc6_02_cm4.S */ + .copy.table : + { + . = ALIGN(4); + __copy_table_start__ = .; + + /* Copy interrupt vectors from flash to RAM */ + LONG (__Vectors) /* From */ + LONG (__ram_vectors_start__) /* To */ + LONG (__Vectors_End - __Vectors) /* Size */ + + /* Copy data section to RAM */ + LONG (__etext) /* From */ + LONG (__data_start__) /* To */ + LONG (__data_end__ - __data_start__) /* Size */ + + __copy_table_end__ = .; + } > flash + + . = ALIGN(4); + .ctors : + { + PROVIDE(__ctors_start__ = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE(__ctors_end__ = .); + } > flash + + . = ALIGN(4); + .dtors : + { + PROVIDE(__dtors_start__ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(__dtors_end__ = .); + } > flash + + /* To clear multiple BSS sections, + * uncomment .zero.table section and, + * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_psoc6_02_cm4.S */ + .zero.table : + { + . = ALIGN(4); + __zero_table_start__ = .; + LONG (__bss_start__) + LONG (__bss_end__ - __bss_start__) + __zero_table_end__ = .; + } > flash + + __etext = . ; + + .ramVectors (NOLOAD) : ALIGN(8) + { + __ram_vectors_start__ = .; + KEEP(*(.ram_vectors)) + __ram_vectors_end__ = .; + } > ram + + + .data __ram_vectors_end__ : + { + . = ALIGN(4); + __data_start__ = .; + + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + + KEEP(*(.cy_ramfunc*)) + . = ALIGN(4); + + __data_end__ = .; + + } > ram AT>flash + + + /* Place variables in the section that should not be initialized during the + * device startup. + */ + .noinit (NOLOAD) : ALIGN(8) + { + KEEP(*(.noinit)) + } > ram + + + /* The uninitialized global or static variables are placed in this section. + * + * The NOLOAD attribute tells linker that .bss section does not consume + * any space in the image. The NOLOAD attribute changes the .bss type to + * NOBITS, and that makes linker to A) not allocate section in memory, and + * A) put information to clear the section with all zeros during application + * loading. + * + * Without the NOLOAD attribute, the .bss section might get PROGBITS type. + * This makes linker to A) allocate zeroed section in memory, and B) copy + * this section to RAM during application loading. + */ + .bss (NOLOAD): + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > ram + + + .heap (NOLOAD): + { + __HeapBase = .; + __end__ = .; + end = __end__; + KEEP(*(.heap*)) + . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; + __HeapLimit = .; + } > ram + + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (NOLOAD): + { + KEEP(*(.stack*)) + } > ram + + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(ram) + LENGTH(ram); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") + + + /* Used for the digital signature of the secure application and the Bootloader SDK application. + * The size of the section depends on the required data size. */ + .cy_app_signature ORIGIN(flash) + LENGTH(flash) - 256 : + { + KEEP(*(.cy_app_signature)) + } > flash + + + /* Emulated EEPROM Flash area */ + .cy_em_eeprom : + { + KEEP(*(.cy_em_eeprom)) + } > em_eeprom + + + /* Supervisory Flash: User data */ + .cy_sflash_user_data : + { + KEEP(*(.cy_sflash_user_data)) + } > sflash_user_data + + /* Supervisory Flash: Normal Access Restrictions (NAR) */ + .cy_sflash_nar : + { + KEEP(*(.cy_sflash_nar)) + } > sflash_nar + + + /* Supervisory Flash: Public Key */ + .cy_sflash_public_key : + { + KEEP(*(.cy_sflash_public_key)) + } > sflash_public_key + + + /* Supervisory Flash: Table of Content # 2 */ + .cy_toc_part2 : + { + KEEP(*(.cy_toc_part2)) + } > sflash_toc_2 + + + /* Supervisory Flash: Table of Content # 2 Copy */ + .cy_rtoc_part2 : + { + KEEP(*(.cy_rtoc_part2)) + } > sflash_rtoc_2 + + + /* Places the code in the Execute in Place (XIP) section. See the smif driver + * documentation for details. + */ + cy_xip : + { + __cy_xip_start = .; + KEEP(*(.cy_xip)) + __cy_xip_end = .; + } > xip + + + /* eFuse */ + .cy_efuse : + { + KEEP(*(.cy_efuse)) + } > efuse + + + /* These sections are used for additional metadata (silicon revision, + * Silicon/JTAG ID, etc.) storage. + */ + .cymeta 0x90500000 : { KEEP(*(.cymeta)) } :NONE +} + + +/* The following symbols used by the cymcuelftool. */ +/* Flash */ +__cy_memory_0_start = 0x10000000; +__cy_memory_0_length = 0x00200000; +__cy_memory_0_row_size = 0x200; + +/* Emulated EEPROM Flash area */ +__cy_memory_1_start = 0x14000000; +__cy_memory_1_length = 0x8000; +__cy_memory_1_row_size = 0x200; + +/* Supervisory Flash */ +__cy_memory_2_start = 0x16000000; +__cy_memory_2_length = 0x8000; +__cy_memory_2_row_size = 0x200; + +/* XIP */ +__cy_memory_3_start = 0x18000000; +__cy_memory_3_length = 0x08000000; +__cy_memory_3_row_size = 0x200; + +/* eFuse */ +__cy_memory_4_start = 0x90700000; +__cy_memory_4_length = 0x100000; +__cy_memory_4_row_size = 1; + +/* EOF */ diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/linker_scripts/link.sct b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/linker_scripts/link.sct new file mode 100644 index 0000000000..4c3b188cc9 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/linker_scripts/link.sct @@ -0,0 +1,277 @@ +#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m4 +; The first line specifies a preprocessor command that the linker invokes +; to pass a scatter file through a C preprocessor. + +;******************************************************************************* +;* \file cy8c6xxa_cm4_dual.sct +;* \version 2.91 +;* +;* Linker file for the ARMCC. +;* +;* The main purpose of the linker script is to describe how the sections in the +;* input files should be mapped into the output file, and to control the memory +;* layout of the output file. +;* +;* \note The entry point location is fixed and starts at 0x10000000. The valid +;* application image should be placed there. +;* +;* \note The linker files included with the PDL template projects must be +;* generic and handle all common use cases. Your project may not use every +;* section defined in the linker files. In that case you may see the warnings +;* during the build process: L6314W (no section matches pattern) and/or L6329W +;* (pattern only matches removed unused sections). In your project, you can +;* suppress the warning by passing the "--diag_suppress=L6314W,L6329W" option to +;* the linker, simply comment out or remove the relevant code in the linker +;* file. +;* +;******************************************************************************* +;* \copyright +;* Copyright 2016-2021 Cypress Semiconductor Corporation +;* SPDX-License-Identifier: Apache-2.0 +;* +;* Licensed under the Apache License, Version 2.0 (the "License"); +;* you may not use this file except in compliance with the License. +;* You may obtain a copy of the License at +;* +;* http://www.apache.org/licenses/LICENSE-2.0 +;* +;* Unless required by applicable law or agreed to in writing, software +;* distributed under the License is distributed on an "AS IS" BASIS, +;* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +;* See the License for the specific language governing permissions and +;* limitations under the License. +;******************************************************************************/ + +; The defines below describe the location and size of blocks of memory in the target. +; Use these defines to specify the memory regions available for allocation. + +; The following defines control RAM and flash memory allocation for the CM4 core. +; You can change the memory allocation by editing RAM and Flash defines. +; Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use. +; Using this memory region for other purposes will lead to unexpected behavior. +; Your changes must be aligned with the corresponding defines for CM0+ core in 'xx_cm0plus.scat', +; where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.scat'. +; RAM +#define RAM_START 0x08002000 +#define RAM_SIZE 0x000FD800 +; Flash +#define FLASH_START 0x10000000 +#define FLASH_SIZE 0x00200000 + +; The size of the stack section at the end of CM4 SRAM +#define STACK_SIZE 0x00001000 + +; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core. +; More about CM0+ prebuilt images, see here: +; https://github.com/cypresssemiconductorco/psoc6cm0p +; The size of the Cortex-M0+ application flash image +#define FLASH_CM0P_SIZE 0x2000 + +; The following defines describe a 32K flash region used for EEPROM emulation. +; This region can also be used as the general purpose flash. +; You can assign sections to this memory region for only one of the cores. +; Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region. +; Therefore, repurposing this memory region will prevent such middleware from operation. +#define EM_EEPROM_START 0x14000000 +#define EM_EEPROM_SIZE 0x8000 + +; The following defines describe device specific memory regions and must not be changed. +; Supervisory flash: User data +#define SFLASH_USER_DATA_START 0x16000800 +#define SFLASH_USER_DATA_SIZE 0x00000800 + +; Supervisory flash: Normal Access Restrictions (NAR) +#define SFLASH_NAR_START 0x16001A00 +#define SFLASH_NAR_SIZE 0x00000200 + +; Supervisory flash: Public Key +#define SFLASH_PUBLIC_KEY_START 0x16005A00 +#define SFLASH_PUBLIC_KEY_SIZE 0x00000C00 + +; Supervisory flash: Table of Content # 2 +#define SFLASH_TOC_2_START 0x16007C00 +#define SFLASH_TOC_2_SIZE 0x00000200 + +; Supervisory flash: Table of Content # 2 Copy +#define SFLASH_RTOC_2_START 0x16007E00 +#define SFLASH_RTOC_2_SIZE 0x00000200 + +; External memory +#define XIP_START 0x18000000 +#define XIP_SIZE 0x08000000 + +; eFuse +#define EFUSE_START 0x90700000 +#define EFUSE_SIZE 0x100000 + + +; Cortex-M0+ application flash image area +LR_IROM FLASH_START FLASH_CM0P_SIZE +{ + .cy_m0p_image +0 FLASH_CM0P_SIZE + { + * (.cy_m0p_image) + } +} + +; Cortex-M4 application flash area +LR_IROM1 (FLASH_START + FLASH_CM0P_SIZE) (FLASH_SIZE - FLASH_CM0P_SIZE) +{ + ER_FLASH_VECTORS +0 + { + * (RESET, +FIRST) + } + + ER_FLASH_CODE +0 FIXED + { + * (InRoot$$Sections) + * (+RO) + } + + ER_RAM_VECTORS RAM_START UNINIT + { + * (RESET_RAM, +FIRST) + } + + RW_RAM_DATA +0 + { + * (.cy_ramfunc) + * (+RW, +ZI) + } + + ; Place variables in the section that should not be initialized during the + ; device startup. + RW_IRAM1 +0 UNINIT + { + * (.noinit) + } + + ; Application heap area (HEAP) + ARM_LIB_HEAP +0 EMPTY ((RAM_START+RAM_SIZE)-AlignExpr(ImageLimit(RW_IRAM1), 8)-STACK_SIZE) + { + } + + ; Stack region growing down + ARM_LIB_STACK (RAM_START+RAM_SIZE) EMPTY -STACK_SIZE + { + } + + ; Used for the digital signature of the secure application and the + ; Bootloader SDK application. The size of the section depends on the required + ; data size. + .cy_app_signature (FLASH_START + FLASH_SIZE - 256) 256 + { + * (.cy_app_signature) + } +} + + +; Emulated EEPROM Flash area +LR_EM_EEPROM EM_EEPROM_START EM_EEPROM_SIZE +{ + .cy_em_eeprom +0 + { + * (.cy_em_eeprom) + } +} + +; Supervisory flash: User data +LR_SFLASH_USER_DATA SFLASH_USER_DATA_START SFLASH_USER_DATA_SIZE +{ + .cy_sflash_user_data +0 + { + * (.cy_sflash_user_data) + } +} + +; Supervisory flash: Normal Access Restrictions (NAR) +LR_SFLASH_NAR SFLASH_NAR_START SFLASH_NAR_SIZE +{ + .cy_sflash_nar +0 + { + * (.cy_sflash_nar) + } +} + +; Supervisory flash: Public Key +LR_SFLASH_PUBLIC_KEY SFLASH_PUBLIC_KEY_START SFLASH_PUBLIC_KEY_SIZE +{ + .cy_sflash_public_key +0 + { + * (.cy_sflash_public_key) + } +} + +; Supervisory flash: Table of Content # 2 +LR_SFLASH_TOC_2 SFLASH_TOC_2_START SFLASH_TOC_2_SIZE +{ + .cy_toc_part2 +0 + { + * (.cy_toc_part2) + } +} + +; Supervisory flash: Table of Content # 2 Copy +LR_SFLASH_RTOC_2 SFLASH_RTOC_2_START SFLASH_RTOC_2_SIZE +{ + .cy_rtoc_part2 +0 + { + * (.cy_rtoc_part2) + } +} + + +; Places the code in the Execute in Place (XIP) section. See the smif driver documentation for details. +LR_EROM XIP_START XIP_SIZE +{ + cy_xip +0 + { + * (.cy_xip) + } +} + + +; eFuse +LR_EFUSE EFUSE_START EFUSE_SIZE +{ + .cy_efuse +0 + { + * (.cy_efuse) + } +} + + +; The section is used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage. +CYMETA 0x90500000 +{ + .cymeta +0 { * (.cymeta) } +} + +/* The following symbols used by the cymcuelftool. */ +/* Flash */ +#define __cy_memory_0_start 0x10000000 +#define __cy_memory_0_length 0x00200000 +#define __cy_memory_0_row_size 0x200 + +/* Emulated EEPROM Flash area */ +#define __cy_memory_1_start 0x14000000 +#define __cy_memory_1_length 0x8000 +#define __cy_memory_1_row_size 0x200 + +/* Supervisory Flash */ +#define __cy_memory_2_start 0x16000000 +#define __cy_memory_2_length 0x8000 +#define __cy_memory_2_row_size 0x200 + +/* XIP */ +#define __cy_memory_3_start 0x18000000 +#define __cy_memory_3_length 0x08000000 +#define __cy_memory_3_row_size 0x200 + +/* eFuse */ +#define __cy_memory_4_start 0x90700000 +#define __cy_memory_4_length 0x100000 +#define __cy_memory_4_row_size 1 + + +/* [] END OF FILE */ diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/drv_rw007.c b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/drv_rw007.c new file mode 100644 index 0000000000..c4c5211c58 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/drv_rw007.c @@ -0,0 +1,67 @@ +#include +#include +#ifdef BSP_USING_RW007 +#include +#include +#include +#include + +extern void spi_wifi_isr(int vector); + +static void rw007_gpio_init(void) +{ + /* Configure IO */ + rt_pin_mode(IFX_RW007_RST_PIN, PIN_MODE_OUTPUT); + rt_pin_mode(IFX_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLDOWN); + + /* Reset rw007 and config mode */ + rt_pin_write(IFX_RW007_RST_PIN, PIN_LOW); + rt_thread_delay(rt_tick_from_millisecond(100)); + rt_pin_write(IFX_RW007_RST_PIN, PIN_HIGH); + + /* Wait rw007 ready(exit busy stat) */ + while (!rt_pin_read(IFX_RW007_INT_BUSY_PIN)) + { + rt_thread_delay(5); + } + + rt_thread_delay(rt_tick_from_millisecond(200)); + rt_pin_mode(IFX_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLUP); +} + +static struct rt_spi_device rw007_dev; + +int wifi_spi_device_init(void) +{ + char sn_version[32]; + uint32_t cs_pin = IFX_RW007_CS_PIN; + + rw007_gpio_init(); + rt_hw_spi_device_attach(IFX_RW007_SPI_BUS_NAME, "wspi", cs_pin); + rt_hw_wifi_init("wspi"); + + rt_wlan_set_mode(RT_WLAN_DEVICE_STA_NAME, RT_WLAN_STATION); + rt_wlan_set_mode(RT_WLAN_DEVICE_AP_NAME, RT_WLAN_AP); + + rw007_sn_get(sn_version); + rt_kprintf("\nrw007 sn: [%s]\n", sn_version); + rw007_version_get(sn_version); + rt_kprintf("rw007 ver: [%s]\n\n", sn_version); + + return 0; +} +INIT_APP_EXPORT(wifi_spi_device_init); + +static void int_wifi_irq(void *p) +{ + ((void)p); + spi_wifi_isr(0); +} + +void spi_wifi_hw_init(void) +{ + rt_pin_attach_irq(IFX_RW007_INT_BUSY_PIN, PIN_IRQ_MODE_FALLING, int_wifi_irq, 0); + rt_pin_irq_enable(IFX_RW007_INT_BUSY_PIN, RT_TRUE); +} + +#endif /* BSP_USING_RW007 */ diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/fal_cfg.h b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/fal_cfg.h new file mode 100644 index 0000000000..5714812ab2 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/fal_cfg.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2006-2022, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022-07-27 Rbb666 first version + */ + +#ifndef _FAL_CFG_H_ +#define _FAL_CFG_H_ + +#include +#include + +extern const struct fal_flash_dev ifx_onchip_flash_32k; +extern const struct fal_flash_dev ifx_onchip_flash_256k; + +/* flash device table */ +#define FAL_FLASH_DEV_TABLE \ + { \ + &ifx_onchip_flash_32k, \ + &ifx_onchip_flash_256k, \ + } +/* ====================== Partition Configuration ========================== */ +#ifdef FAL_PART_HAS_TABLE_CFG + +/* partition table */ +#define FAL_PART_TABLE \ + { \ + {FAL_PART_MAGIC_WROD, "param", "onchip_flash_32k", 0, IFX_EFLASH_SIZE, 0}, \ + {FAL_PART_MAGIC_WROD, "app", "onchip_flash_256k", 0, IFX_FLASH_SIZE, 0}, \ + } + +#endif /* FAL_PART_HAS_TABLE_CFG */ +#endif /* _FAL_CFG_H_ */ diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/slider_sample.c b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/slider_sample.c new file mode 100644 index 0000000000..6f2066dd6c --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/slider_sample.c @@ -0,0 +1,243 @@ +/* + * Copyright (c) 2006-2022, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022-07-28 Rbb666 first version + */ + +#include +#include "drv_common.h" + +#ifdef BSP_USING_SLIDER +#include "cycfg_capsense.h" + +#define CAPSENSE_INTR_PRIORITY (7u) +#define EZI2C_INTR_PRIORITY (6u) + +/* Allowed duty cycle for maximum brightness */ +#define LED_MAX_BRIGHTNESS (100u) + +/* Allowed duty cycle for minimum brightness*/ +#define LED_MIN_BRIGHTNESS (0u) + +#define GET_DUTY_CYCLE(x) (1 * 1000 * 1000 - x * 10 * 1000) + +typedef enum +{ + LED_OFF, + LED_ON +} led_state_t; + +typedef struct +{ + led_state_t state; + uint32_t brightness; +} led_data_t; + +static rt_sem_t trans_done_semphr = RT_NULL; + +#ifndef RT_USING_PWM + #error You need enable PWM to use this sample +#else + #define PWM_DEV_NAME "pwm0" + #define PWM_DEV_CHANNEL 3 + static struct rt_device_pwm *pwm_dev; +#endif + +static void capsense_isr(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + Cy_CapSense_InterruptHandler(CYBSP_CSD_HW, &cy_capsense_context); + + /* leave interrupt */ + rt_interrupt_leave(); +} + +void capsense_callback(cy_stc_active_scan_sns_t *ptrActiveScan) +{ + rt_sem_release(trans_done_semphr); +} + +static uint32_t initialize_capsense(void) +{ + uint32_t status = CYRET_SUCCESS; + + /* CapSense interrupt configuration parameters */ + static const cy_stc_sysint_t capSense_intr_config = + { + .intrSrc = csd_interrupt_IRQn, + .intrPriority = CAPSENSE_INTR_PRIORITY, + }; + + /* Capture the CSD HW block and initialize it to the default state. */ + status = Cy_CapSense_Init(&cy_capsense_context); + if (CYRET_SUCCESS != status) + { + return status; + } + + /* Initialize CapSense interrupt */ + cyhal_system_set_isr(csd_interrupt_IRQn, csd_interrupt_IRQn, CAPSENSE_INTR_PRIORITY, &capsense_isr); + NVIC_ClearPendingIRQ(capSense_intr_config.intrSrc); + NVIC_EnableIRQ(capSense_intr_config.intrSrc); + + /* Initialize the CapSense firmware modules. */ + status = Cy_CapSense_Enable(&cy_capsense_context); + if (CYRET_SUCCESS != status) + { + return status; + } + + /* Assign a callback function to indicate end of CapSense scan. */ + status = Cy_CapSense_RegisterCallback(CY_CAPSENSE_END_OF_SCAN_E, + capsense_callback, &cy_capsense_context); + if (CYRET_SUCCESS != status) + { + return status; + } + + return status; +} + +void Slider_Init(void) +{ + cy_rslt_t result; + + result = initialize_capsense(); + + if (CYRET_SUCCESS != result) + { + /* Halt the CPU if CapSense initialization failed */ + RT_ASSERT(0); + } + + /* Initiate first scan */ + Cy_CapSense_ScanAllWidgets(&cy_capsense_context); + + trans_done_semphr = rt_sem_create("slider_sem", 1, RT_IPC_FLAG_PRIO); + if (trans_done_semphr == RT_NULL) + { + rt_kprintf("create transform done semphr failed.\n"); + RT_ASSERT(0); + return; + } + +#ifdef BSP_USING_PWM0_PORT13 + /* Initiate PWM*/ + pwm_dev = (struct rt_device_pwm *)rt_device_find(PWM_DEV_NAME); + + if (pwm_dev == RT_NULL) + { + rt_kprintf("PWM init failed! can't find %s device!\n", PWM_DEV_NAME); + RT_ASSERT(0); + } + + /*default period:1ms pulse:0*/ + rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, 1 * 1000 * 1000, 1 * 1000 * 1000); + rt_pwm_enable(pwm_dev, PWM_DEV_CHANNEL); +#endif +} + +void update_led_state(led_data_t *ledData) +{ + if (ledData->brightness >= 0) + { + uint32_t brightness = (ledData->brightness < LED_MIN_BRIGHTNESS) ? LED_MIN_BRIGHTNESS : ledData->brightness; + + /* Drive the LED with brightness */ + rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, 1 * 1000 * 1000, GET_DUTY_CYCLE(brightness)); + } +} + +static void process_touch(void) +{ + cy_stc_capsense_touch_t *slider_touch_info; + uint16_t slider_pos; + uint8_t slider_touch_status; + bool led_update_req = false; + + static uint16_t slider_pos_prev; + static led_data_t led_data = {LED_ON, LED_MAX_BRIGHTNESS}; + + /* Get slider status */ + slider_touch_info = Cy_CapSense_GetTouchInfo( + CY_CAPSENSE_LINEARSLIDER0_WDGT_ID, &cy_capsense_context); + slider_touch_status = slider_touch_info->numPosition; + slider_pos = slider_touch_info->ptrPosition->x; + + /* Detect the new touch on slider */ + if ((RT_NULL != slider_touch_status) && + (slider_pos != slider_pos_prev)) + { + led_data.brightness = (slider_pos * 100) + / cy_capsense_context.ptrWdConfig[CY_CAPSENSE_LINEARSLIDER0_WDGT_ID].xResolution; + + led_update_req = true; + } + +#ifndef RT_USING_PWM +#error You need enable PWM to use this sample +#else + /* Update the LED state if requested */ + if (led_update_req) + { + update_led_state(&led_data); + } +#endif + slider_pos_prev = slider_pos; +} + +static void Slider_thread_entry(void *parameter) +{ + Slider_Init(); + + for (;;) + { + rt_sem_take(trans_done_semphr, RT_WAITING_FOREVER); + + /* Process all widgets */ + Cy_CapSense_ProcessAllWidgets(&cy_capsense_context); + + /* Process touch input */ + process_touch(); + + /* Establishes synchronized operation between the CapSense + * middleware and the CapSense Tuner tool. + */ + Cy_CapSense_RunTuner(&cy_capsense_context); + + /* Initiate next scan */ + Cy_CapSense_ScanAllWidgets(&cy_capsense_context); + + rt_thread_mdelay(50); + } +} + +int Slider_ctrl_sample(void) +{ + rt_err_t ret = RT_EOK; + + rt_thread_t thread = rt_thread_create("slider_th", + Slider_thread_entry, + RT_NULL, + 1024, + 25, + 10); + if (thread != RT_NULL) + { + rt_thread_startup(thread); + } + else + { + ret = RT_ERROR; + } + + return ret; +} +MSH_CMD_EXPORT(Slider_ctrl_sample, Slider sample to ctrl led); +#endif diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/spi_sample.c b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/spi_sample.c new file mode 100644 index 0000000000..004acefda1 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/board/ports/spi_sample.c @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2006-2022, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022-07-19 Rbbb666 first version + */ + +#include "board.h" + +#if defined(BSP_USING_SPI3_SAMPLE) +#include + +#define SPI_NAME "spi30" +static struct rt_spi_device *spi_dev = RT_NULL; + +/* attach spi5 device */ +static int rt_spi_device_init(void) +{ + struct rt_spi_configuration cfg; + + rt_hw_spi_device_attach("spi3", "spi30", NULL); + + cfg.data_width = 8; + cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_0 | RT_SPI_MSB | RT_SPI_NO_CS; + cfg.max_hz = 1 *1000 *1000; + + spi_dev = (struct rt_spi_device *)rt_device_find(SPI_NAME); + + if (RT_NULL == spi_dev) + { + rt_kprintf("spi sample run failed! can't find %s device!\n", SPI_NAME); + return RT_ERROR; + } + + rt_spi_configure(spi_dev, &cfg); + + return RT_EOK; +} +INIT_APP_EXPORT(rt_spi_device_init); + +/* spi5 loopback mode test case */ +static int spi_sample(int argc, char **argv) +{ + rt_uint8_t t_buf[8], r_buf[8]; + int i = 0; + static struct rt_spi_message msg1; + + if (argc != 9) + { + rt_kprintf("Please Usage:\n"); + rt_kprintf("spi_sample 1 2 3 4 5 6 7 8\n"); + return -RT_ERROR; + } + + for (i = 0; i < 8; i++) + { + t_buf[i] = atoi(argv[i+1]); + } + + msg1.send_buf = &t_buf; + msg1.recv_buf = &r_buf; + msg1.length = sizeof(t_buf); + msg1.cs_take = 1; + msg1.cs_release = 0; + msg1.next = RT_NULL; + + rt_spi_transfer_message(spi_dev, &msg1); + + rt_kprintf("spi rbuf : "); + for (i = 0; i < sizeof(t_buf); i++) + { + rt_kprintf("%x ", r_buf[i]); + } + + rt_kprintf("\nspi loopback mode test over!\n"); + + return RT_EOK; +} +MSH_CMD_EXPORT(spi_sample, spi loopback test); + +#endif /* BSP_USING_SPI3 */ diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/board.png b/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/board.png new file mode 100644 index 0000000000..2f88f25d5b Binary files /dev/null and b/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/board.png differ diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/mdk_package.png b/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/mdk_package.png new file mode 100644 index 0000000000..230574a87b Binary files /dev/null and b/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/mdk_package.png differ diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/studio1.png b/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/studio1.png new file mode 100644 index 0000000000..85c4bdc662 Binary files /dev/null and b/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/studio1.png differ diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/studio2.png b/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/studio2.png new file mode 100644 index 0000000000..0511a98f04 Binary files /dev/null and b/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/studio2.png differ diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/studio3-build.png b/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/studio3-build.png new file mode 100644 index 0000000000..5019c1d219 Binary files /dev/null and b/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/studio3-build.png differ diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/studio4-download.png b/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/studio4-download.png new file mode 100644 index 0000000000..526e134dc7 Binary files /dev/null and b/bsp/cypress/psoc6-cy8ckit-062S2-43012/figures/studio4-download.png differ diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/makefile.targets b/bsp/cypress/psoc6-cy8ckit-062S2-43012/makefile.targets new file mode 100644 index 0000000000..a5e80b985b --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/makefile.targets @@ -0,0 +1,6 @@ +clean2: + -$(RM) $(CC_DEPS)$(C++_DEPS)$(C_UPPER_DEPS)$(CXX_DEPS)$(SECONDARY_FLASH)$(SECONDARY_SIZE)$(ASM_DEPS)$(S_UPPER_DEPS)$(C_DEPS)$(CPP_DEPS) + -$(RM) $(OBJS) *.elf + -@echo ' ' + +*.elf: $(wildcard ../board/linker_scripts/link.ld) diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/project.uvoptx b/bsp/cypress/psoc6-cy8ckit-062S2-43012/project.uvoptx new file mode 100644 index 0000000000..a2338a7b0a --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/project.uvoptx @@ -0,0 +1,184 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
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cy_syspm.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_syspm.c + + + + + cyhal_lptimer.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_lptimer.c + + + + + cyhal_irq_psoc.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_irq_psoc.c + + + + + cy_mcwdt.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_mcwdt.c + + + + + cy_sysclk.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_sysclk.c + + + + + psoc6_01_cm0p_sleep.c + 1 + ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_01_cm0p_sleep.c + + + + + cyhal_syspm.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_syspm.c + + + + + cycfg_pins.c + 1 + ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_pins.c + + + + + cyhal_uart.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_uart.c + + + + + cy_systick.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_systick.c + + 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..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_ipc_pipe.c + + + + + + + diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/project.uvprojx b/bsp/cypress/psoc6-cy8ckit-062S2-43012/project.uvprojx new file mode 100644 index 0000000000..863895e5c7 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/project.uvprojx @@ -0,0 +1,1042 @@ + + + 2.1 +
### uVision Project, (C) Keil Software
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0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rtthread + 1 + 0 + 0 + 1 + 1 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x8000000 + 0x100000 + + + 1 + 0x10000000 + 0x200000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 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cy_ipc_sema.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_ipc_sema.c + + + + + cyhal_utils_psoc.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_utils_psoc.c + + + + + cyhal_utils.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_utils.c + + + + + cy_ipc_drv.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_ipc_drv.c + + + + + cyhal_hwmgr.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_hwmgr.c + + + + + cy_syslib.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_syslib.c + + + + + cycfg_system.c + 1 + ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_system.c + + + + + cycfg_peripherals.c + 1 + ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_peripherals.c + + + + + cy_syspm.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_syspm.c + + + + + cyhal_lptimer.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_lptimer.c + + + + + cyhal_irq_psoc.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_irq_psoc.c + + + + + cy_mcwdt.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_mcwdt.c + + + + + cy_sysclk.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_sysclk.c + + + + + cyhal_syspm.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_syspm.c + + + + + psoc6_04_cm0p_sleep.c + 1 + ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_04_cm0p_sleep.c + + + + + cycfg_pins.c + 1 + ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_pins.c + + + + + cyhal_uart.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_uart.c + + + + + cy_systick.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_systick.c + + + + + cycfg.c + 1 + ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg.c + + + + + cyhal_interconnect.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_interconnect.c + + + + + cy_trigmux.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_trigmux.c + + + + + psoc6_02_cm0p_sleep.c + 1 + ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_02_cm0p_sleep.c + + + + + cy_device.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\devices\COMPONENT_CAT1A\source\cy_device.c + + + + + cycfg_routing.c + 1 + ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_routing.c + + + + + lib_cy_capsense.lib + 4 + ..\libraries\IFX_PSOC6_HAL\lib\cy_capsense.lib + + + + + cycfg_clocks.c + 1 + ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_clocks.c + + + + + cy_ipc_pipe.c + 1 + ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_ipc_pipe.c + + + + + psoc6_01_cm0p_sleep.c + 1 + ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_01_cm0p_sleep.c + + + + + + + + + + + + diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/rtconfig.h b/bsp/cypress/psoc6-cy8ckit-062S2-43012/rtconfig.h new file mode 100644 index 0000000000..f708915474 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/rtconfig.h @@ -0,0 +1,212 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_HOOK_USING_FUNC_PTR +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 +#define RT_USING_TIMER_SOFT +#define RT_TIMER_THREAD_PRIO 4 +#define RT_TIMER_THREAD_STACK_SIZE 512 + +/* kservice optimization */ + +#define RT_KSERVICE_USING_STDLIB +#define RT_DEBUG + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_SMALL_MEM_AS_HEAP +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart5" +#define RT_VER_NUM 0x40101 +#define ARCH_ARM +#define RT_USING_CPU_FFS +#define ARCH_ARM_CORTEX_M +#define ARCH_ARM_CORTEX_M4 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 +#define RT_USING_MSH +#define RT_USING_FINSH +#define FINSH_USING_MSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_CMD_SIZE 80 +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION +#define FINSH_ARG_MAX 10 + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using USB */ + + +/* C/C++ and POSIX layer */ + +#define RT_LIBC_DEFAULT_TIMEZONE 8 + +/* POSIX (Portable Operating System Interface) layer */ + + +/* Interprocess Communication (IPC) */ + + +/* Socket is in the 'Network' category */ + + +/* Network */ + + +/* Utilities */ + + +/* RT-Thread Utestcases */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + +/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ + + +/* XML: Extensible Markup Language */ + + +/* multimedia packages */ + +/* LVGL: powerful and easy-to-use embedded GUI library */ + + +/* u8g2: a monochrome graphic library */ + + +/* PainterEngine: A cross-platform graphics application framework written in C language */ + + +/* tools packages */ + + +/* system packages */ + +/* enhanced kernel services */ + + +/* acceleration: Assembly language or algorithmic acceleration packages */ + + +/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + + +/* Micrium: Micrium software products porting for RT-Thread */ + + +/* peripheral libraries and drivers */ + + +/* Kendryte SDK */ + + +/* AI packages */ + + +/* miscellaneous packages */ + +/* project laboratory */ + +/* samples: kernel and components samples */ + + +/* entertainment: terminal games and other interesting software packages */ + + +/* Privated Packages of RealThread */ + + +/* Network Utilities */ + + +/* RT-Thread Smart */ + +#define SOC_FAMILY_IFX +#define SOC_SERIES_IFX_PSOC6 + +/* Hardware Drivers Config */ + +#define SOC_IFX_PSOC6_43012 + +/* Onboard Peripheral Drivers */ + +#define BSP_USING_USB_TO_USART + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART5 + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/rtconfig.py b/bsp/cypress/psoc6-cy8ckit-062S2-43012/rtconfig.py new file mode 100644 index 0000000000..25e6679827 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/rtconfig.py @@ -0,0 +1,135 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m4' +CROSS_TOOL='gcc' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armclang' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iccarm' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.3' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.ld' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + CXX = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M4.fp ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'armclang': + # toolchains + CC = 'armclang' + CXX = 'armclang' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M4.fp ' + CFLAGS = ' --target=arm-arm-none-eabi -mcpu=cortex-m4 ' + CFLAGS += ' -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 ' + CFLAGS += ' -mfloat-abi=hard -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar ' + CFLAGS += ' -gdwarf-3 -ffunction-sections ' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers ' + LFLAGS += ' --list rt-thread.map ' + LFLAGS += r' --strict --scatter "board\linker_scripts\link.sct" ' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCLANG/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCLANG/lib' + + EXEC_PATH += '/ARM/ARMCLANG/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O1' # armclang recommend + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/template.uvoptx b/bsp/cypress/psoc6-cy8ckit-062S2-43012/template.uvoptx new file mode 100644 index 0000000000..a2338a7b0a --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/template.uvoptx @@ -0,0 +1,184 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp; *.cc; *.cxx + 0 + + + + 0 + 0 + + + + rtthread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 10 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O206 -S8 -C0 -P00000002 -N00("") -D00(00000000) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD8026400 -FC8000 -FN5 -FF0CY8C6xxA_SFLASH_TOC2.FLM -FS016007C00 -FL0400 -FP0($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_TOC2.FLM) -FF1CY8C6xxA_SFLASH_PKEY.FLM -FS116005A00 -FL1C00 -FP1($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_PKEY.FLM) -FF2CY8C6xxA_SFLASH_USER.FLM -FS216000800 -FL2800 -FP2($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_USER.FLM) -FF3CY8C6xxA_WFLASH.FLM -FS314000000 -FL38000 -FP3($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_WFLASH.FLM) -FF4CY8C6xxA_sect256KB.FLM -FS410000000 -FL4200000 -FP4($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_sect256KB.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 ) -FN5 -FC8000 -FD08026400 -FF0CY8C6xxA_SFLASH_TOC2 -FF1CY8C6xxA_SFLASH_PKEY -FF2CY8C6xxA_SFLASH_USER -FF3CY8C6xxA_WFLASH -FF4CY8C6xxA_sect256KB -FL0400 -FL1C00 -FL2800 -FL38000 -FL4200000 -FS016007C00 -FS116005A00 -FS216000800 -FS314000000 -FS410000000 -FP0($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_TOC2.FLM) -FP1($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_PKEY.FLM) -FP2($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_USER.FLM) -FP3($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_WFLASH.FLM) -FP4($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_sect256KB.FLM) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 1 + 0 + 2 + 10000000 + + + + + diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/template.uvproj b/bsp/cypress/psoc6-cy8ckit-062S2-43012/template.uvproj new file mode 100644 index 0000000000..c07f4e4fd7 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/template.uvproj @@ -0,0 +1,407 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + rtthread + 0x4 + ARM-ADS + + + STM32F407VG + STMicroelectronics + IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2 + + "Startup\ST\STM32F4xx\startup_stm32f40_41xxx.s" ("STM32F40/41xxx Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000) + 6103 + stm32f4xx.h + + + + + + + -DSTM32F40_41xxx + + + SFD\ST\STM32F4xx\STM32F40x.sfr + 0 + 0 + + + + ST\STM32F4xx\ + ST\STM32F4xx\ + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rtthread + 1 + 0 + 0 + 1 + 0 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -MPU -REMAP + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 0 + 1 + 0 + + 0 + 11 + + + + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 1 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x10000000 + 0x10000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + .\board\linker_scripts\link.sct + + + + + + + + + + + + diff --git a/bsp/cypress/psoc6-cy8ckit-062S2-43012/template.uvprojx b/bsp/cypress/psoc6-cy8ckit-062S2-43012/template.uvprojx new file mode 100644 index 0000000000..6fe94ac0c9 --- /dev/null +++ b/bsp/cypress/psoc6-cy8ckit-062S2-43012/template.uvprojx @@ -0,0 +1,391 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + rtthread + 0x4 + ARM-ADS + 6160000::V6.16::ARMCLANG + 1 + + + CY8C624ABZI-S2D44:Cortex-M4 + Cypress + Cypress.PSoC6_DFP.1.2.0 + https://github.com/cypresssemiconductorco/cmsis-packs/raw/master/PSoC6_DFP/ + IRAM(0x08000000,0x100000) IROM(0x10000000,0x200000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD08026400 -FC8000 -FN5 -FF0CY8C6xxA_SFLASH_TOC2 -FS016007C00 -FL0400 -FF1CY8C6xxA_SFLASH_PKEY -FS116005A00 -FL1C00 -FF2CY8C6xxA_SFLASH_USER -FS216000800 -FL2800 -FF3CY8C6xxA_WFLASH -FS314000000 -FL38000 -FF4CY8C6xxA_sect256KB -FS410000000 -FL4200000 -FP0($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_TOC2.FLM) -FP1($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_PKEY.FLM) -FP2($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_USER.FLM) -FP3($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_WFLASH.FLM) -FP4($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_sect256KB.FLM)) + 0 + + + + + + + + + + + $$Device:CY8C624ABZI-S2D44$SVD\psoc6_02.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rtthread + 1 + 0 + 0 + 1 + 1 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x8000000 + 0x100000 + + + 1 + 0x10000000 + 0x200000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x10000000 + 0x200000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 2 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 3 + 0 + 0 + 1 + 0 + 0 + 3 + 1 + 1 + 1 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 3 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x10000000 + 0x08000000 + + .\board\linker_scripts\link.sct + + + + + + + + + + + + + + + + + + diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/.config b/bsp/cypress/psoc6-cy8cproto-4343w/.config deleted file mode 100644 index 624e3f07d1..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/.config +++ /dev/null @@ -1,764 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# RT-Thread Configuration -# - -# -# RT-Thread Kernel -# -CONFIG_RT_NAME_MAX=8 -# CONFIG_RT_USING_ARCH_DATA_TYPE is not set -# CONFIG_RT_USING_SMP is not set -CONFIG_RT_ALIGN_SIZE=4 -# CONFIG_RT_THREAD_PRIORITY_8 is not set -CONFIG_RT_THREAD_PRIORITY_32=y -# CONFIG_RT_THREAD_PRIORITY_256 is not set -CONFIG_RT_THREAD_PRIORITY_MAX=32 -CONFIG_RT_TICK_PER_SECOND=1000 -CONFIG_RT_USING_OVERFLOW_CHECK=y -CONFIG_RT_USING_HOOK=y -CONFIG_RT_HOOK_USING_FUNC_PTR=y -CONFIG_RT_USING_IDLE_HOOK=y -CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 -CONFIG_IDLE_THREAD_STACK_SIZE=256 -CONFIG_RT_USING_TIMER_SOFT=y -CONFIG_RT_TIMER_THREAD_PRIO=4 -CONFIG_RT_TIMER_THREAD_STACK_SIZE=512 - -# -# kservice optimization -# -CONFIG_RT_KSERVICE_USING_STDLIB=y -# CONFIG_RT_KSERVICE_USING_STDLIB_MEMORY is not set -# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set -# CONFIG_RT_USING_TINY_FFS is not set -# CONFIG_RT_KPRINTF_USING_LONGLONG is not set -CONFIG_RT_DEBUG=y -# CONFIG_RT_DEBUG_COLOR is not set -# CONFIG_RT_DEBUG_INIT_CONFIG is not set -# CONFIG_RT_DEBUG_THREAD_CONFIG is not set -# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set -# CONFIG_RT_DEBUG_IPC_CONFIG is not set -# CONFIG_RT_DEBUG_TIMER_CONFIG is not set -# CONFIG_RT_DEBUG_IRQ_CONFIG is not set -# CONFIG_RT_DEBUG_MEM_CONFIG is not set -# CONFIG_RT_DEBUG_SLAB_CONFIG is not set -# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set -# CONFIG_RT_DEBUG_MODULE_CONFIG is not set - -# -# Inter-Thread communication -# -CONFIG_RT_USING_SEMAPHORE=y -CONFIG_RT_USING_MUTEX=y -CONFIG_RT_USING_EVENT=y -CONFIG_RT_USING_MAILBOX=y -CONFIG_RT_USING_MESSAGEQUEUE=y -# CONFIG_RT_USING_SIGNALS is not set - -# -# Memory Management -# -CONFIG_RT_USING_MEMPOOL=y -CONFIG_RT_USING_SMALL_MEM=y -# CONFIG_RT_USING_SLAB is not set -# CONFIG_RT_USING_MEMHEAP is not set -CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y -# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set -# CONFIG_RT_USING_SLAB_AS_HEAP is not set -# CONFIG_RT_USING_USERHEAP is not set -# CONFIG_RT_USING_NOHEAP is not set -# CONFIG_RT_USING_MEMTRACE is not set -# CONFIG_RT_USING_HEAP_ISR is not set -CONFIG_RT_USING_HEAP=y - -# -# Kernel Device Object -# -CONFIG_RT_USING_DEVICE=y -# CONFIG_RT_USING_DEVICE_OPS is not set -# CONFIG_RT_USING_INTERRUPT_INFO is not set -CONFIG_RT_USING_CONSOLE=y -CONFIG_RT_CONSOLEBUF_SIZE=128 -CONFIG_RT_CONSOLE_DEVICE_NAME="uart5" -CONFIG_RT_VER_NUM=0x40101 -CONFIG_ARCH_ARM=y -CONFIG_RT_USING_CPU_FFS=y -CONFIG_ARCH_ARM_CORTEX_M=y -CONFIG_ARCH_ARM_CORTEX_M4=y -# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set - -# -# RT-Thread Components -# -CONFIG_RT_USING_COMPONENTS_INIT=y -CONFIG_RT_USING_USER_MAIN=y -CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 -CONFIG_RT_MAIN_THREAD_PRIORITY=10 -# CONFIG_RT_USING_LEGACY is not set -CONFIG_RT_USING_MSH=y -CONFIG_RT_USING_FINSH=y -CONFIG_FINSH_USING_MSH=y -CONFIG_FINSH_THREAD_NAME="tshell" -CONFIG_FINSH_THREAD_PRIORITY=20 -CONFIG_FINSH_THREAD_STACK_SIZE=4096 -CONFIG_FINSH_USING_HISTORY=y -CONFIG_FINSH_HISTORY_LINES=5 -CONFIG_FINSH_USING_SYMTAB=y -CONFIG_FINSH_CMD_SIZE=80 -CONFIG_MSH_USING_BUILT_IN_COMMANDS=y -CONFIG_FINSH_USING_DESCRIPTION=y -# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set -# CONFIG_FINSH_USING_AUTH is not set -CONFIG_FINSH_ARG_MAX=10 -# CONFIG_RT_USING_DFS is not set -# CONFIG_RT_USING_FAL is not set -# CONFIG_RT_USING_LWP is not set - -# -# Device Drivers -# -CONFIG_RT_USING_DEVICE_IPC=y -# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set -CONFIG_RT_USING_SERIAL=y -CONFIG_RT_USING_SERIAL_V1=y -# CONFIG_RT_USING_SERIAL_V2 is not set -CONFIG_RT_SERIAL_USING_DMA=y -CONFIG_RT_SERIAL_RB_BUFSZ=64 -# CONFIG_RT_USING_CAN is not set -# CONFIG_RT_USING_HWTIMER is not set -# CONFIG_RT_USING_CPUTIME is not set -# CONFIG_RT_USING_I2C is not set -# CONFIG_RT_USING_PHY is not set -CONFIG_RT_USING_PIN=y -# CONFIG_RT_USING_ADC is not set -# CONFIG_RT_USING_DAC is not set -# CONFIG_RT_USING_PWM is not set -# CONFIG_RT_USING_MTD_NOR is not set -# CONFIG_RT_USING_MTD_NAND is not set -# CONFIG_RT_USING_PM is not set -# CONFIG_RT_USING_RTC is not set -# CONFIG_RT_USING_SDIO is not set -# CONFIG_RT_USING_SPI is not set -# CONFIG_RT_USING_WDT is not set -# CONFIG_RT_USING_AUDIO is not set -# CONFIG_RT_USING_SENSOR is not set -# CONFIG_RT_USING_TOUCH is not set -# CONFIG_RT_USING_HWCRYPTO is not set -# CONFIG_RT_USING_PULSE_ENCODER is not set -# CONFIG_RT_USING_INPUT_CAPTURE is not set -# CONFIG_RT_USING_WIFI is not set - -# -# Using USB -# -# CONFIG_RT_USING_USB is not set -# CONFIG_RT_USING_USB_HOST is not set -# CONFIG_RT_USING_USB_DEVICE is not set - -# -# C/C++ and POSIX layer -# -CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 - -# -# POSIX (Portable Operating System Interface) layer -# -# CONFIG_RT_USING_POSIX_FS is not set -# CONFIG_RT_USING_POSIX_DELAY is not set -# CONFIG_RT_USING_POSIX_CLOCK is not set -# CONFIG_RT_USING_POSIX_TIMER is not set -# CONFIG_RT_USING_PTHREADS is not set -# CONFIG_RT_USING_MODULE is not set - -# -# Interprocess Communication (IPC) -# -# CONFIG_RT_USING_POSIX_PIPE is not set -# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set -# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set - -# -# Socket is in the 'Network' category -# -# CONFIG_RT_USING_CPLUSPLUS is not set - -# -# Network -# -# CONFIG_RT_USING_SAL is not set -# CONFIG_RT_USING_NETDEV is not set -# CONFIG_RT_USING_LWIP is not set -# CONFIG_RT_USING_AT is not set - -# -# Utilities -# -# CONFIG_RT_USING_RYM is not set -# CONFIG_RT_USING_ULOG is not set -# CONFIG_RT_USING_UTEST is not set -# CONFIG_RT_USING_VAR_EXPORT is not set -# CONFIG_RT_USING_RT_LINK is not set -# CONFIG_RT_USING_VBUS is not set - -# -# RT-Thread Utestcases -# -# CONFIG_RT_USING_UTESTCASES is not set - -# -# RT-Thread online packages -# - -# -# IoT - internet of things -# -# CONFIG_PKG_USING_LWIP is not set -# CONFIG_PKG_USING_LORAWAN_DRIVER is not set -# CONFIG_PKG_USING_PAHOMQTT is not set -# CONFIG_PKG_USING_UMQTT is not set -# CONFIG_PKG_USING_WEBCLIENT is not set -# CONFIG_PKG_USING_WEBNET is not set -# CONFIG_PKG_USING_MONGOOSE is not set -# CONFIG_PKG_USING_MYMQTT is not set -# CONFIG_PKG_USING_KAWAII_MQTT is not set -# CONFIG_PKG_USING_BC28_MQTT is not set -# CONFIG_PKG_USING_WEBTERMINAL is not set -# CONFIG_PKG_USING_LIBMODBUS is not set -# CONFIG_PKG_USING_FREEMODBUS is not set -# CONFIG_PKG_USING_NANOPB is not set - -# -# Wi-Fi -# - -# -# Marvell WiFi -# -# CONFIG_PKG_USING_WLANMARVELL is not set - -# -# Wiced WiFi -# -# CONFIG_PKG_USING_WLAN_WICED is not set -# CONFIG_PKG_USING_RW007 is not set -# CONFIG_PKG_USING_COAP is not set -# CONFIG_PKG_USING_NOPOLL is not set -# CONFIG_PKG_USING_NETUTILS is not set -# CONFIG_PKG_USING_CMUX is not set -# CONFIG_PKG_USING_PPP_DEVICE is not set -# CONFIG_PKG_USING_AT_DEVICE is not set -# CONFIG_PKG_USING_ATSRV_SOCKET is not set -# CONFIG_PKG_USING_WIZNET is not set -# CONFIG_PKG_USING_ZB_COORDINATOR is not set - -# -# IoT Cloud -# -# CONFIG_PKG_USING_ONENET is not set -# CONFIG_PKG_USING_GAGENT_CLOUD is not set -# CONFIG_PKG_USING_ALI_IOTKIT is not set -# CONFIG_PKG_USING_AZURE is not set -# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set -# CONFIG_PKG_USING_JIOT-C-SDK is not set -# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set -# CONFIG_PKG_USING_JOYLINK is not set -# CONFIG_PKG_USING_EZ_IOT_OS is not set -# CONFIG_PKG_USING_IOTSHARP_SDK is not set -# CONFIG_PKG_USING_NIMBLE is not set -# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set -# CONFIG_PKG_USING_OTA_DOWNLOADER is not set -# CONFIG_PKG_USING_IPMSG is not set -# CONFIG_PKG_USING_LSSDP is not set -# CONFIG_PKG_USING_AIRKISS_OPEN is not set -# CONFIG_PKG_USING_LIBRWS is not set -# CONFIG_PKG_USING_TCPSERVER is not set -# CONFIG_PKG_USING_PROTOBUF_C is not set -# CONFIG_PKG_USING_DLT645 is not set -# CONFIG_PKG_USING_QXWZ is not set -# CONFIG_PKG_USING_SMTP_CLIENT is not set -# CONFIG_PKG_USING_ABUP_FOTA is not set -# CONFIG_PKG_USING_LIBCURL2RTT is not set -# CONFIG_PKG_USING_CAPNP is not set -# CONFIG_PKG_USING_AGILE_TELNET is not set -# CONFIG_PKG_USING_NMEALIB is not set -# CONFIG_PKG_USING_PDULIB is not set -# CONFIG_PKG_USING_BTSTACK is not set -# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set -# CONFIG_PKG_USING_WAYZ_IOTKIT is not set -# CONFIG_PKG_USING_MAVLINK is not set -# CONFIG_PKG_USING_BSAL is not set -# CONFIG_PKG_USING_AGILE_MODBUS is not set -# CONFIG_PKG_USING_AGILE_FTP is not set -# CONFIG_PKG_USING_EMBEDDEDPROTO is not set -# CONFIG_PKG_USING_RT_LINK_HW is not set -# CONFIG_PKG_USING_LORA_PKT_FWD is not set -# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set -# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set -# CONFIG_PKG_USING_HM is not set -# CONFIG_PKG_USING_SMALL_MODBUS is not set -# CONFIG_PKG_USING_NET_SERVER is not set -# CONFIG_PKG_USING_ZFTP is not set - -# -# security packages -# -# CONFIG_PKG_USING_MBEDTLS is not set -# CONFIG_PKG_USING_LIBSODIUM is not set -# CONFIG_PKG_USING_LIBHYDROGEN is not set -# CONFIG_PKG_USING_TINYCRYPT is not set -# CONFIG_PKG_USING_TFM is not set -# CONFIG_PKG_USING_YD_CRYPTO is not set - -# -# language packages -# - -# -# JSON: JavaScript Object Notation, a lightweight data-interchange format -# -# CONFIG_PKG_USING_CJSON is not set -# CONFIG_PKG_USING_LJSON is not set -# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set -# CONFIG_PKG_USING_RAPIDJSON is not set -# CONFIG_PKG_USING_JSMN is not set -# CONFIG_PKG_USING_AGILE_JSMN is not set -# CONFIG_PKG_USING_PARSON is not set - -# -# XML: Extensible Markup Language -# -# CONFIG_PKG_USING_SIMPLE_XML is not set -# CONFIG_PKG_USING_EZXML is not set -# CONFIG_PKG_USING_LUATOS_SOC is not set -# CONFIG_PKG_USING_LUA is not set -# CONFIG_PKG_USING_JERRYSCRIPT is not set -# CONFIG_PKG_USING_MICROPYTHON is not set -# CONFIG_PKG_USING_PIKASCRIPT is not set -# CONFIG_PKG_USING_RTT_RUST is not set - -# -# multimedia packages -# - -# -# LVGL: powerful and easy-to-use embedded GUI library -# -# CONFIG_PKG_USING_LVGL is not set -# CONFIG_PKG_USING_LITTLEVGL2RTT is not set -# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set -# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set - -# -# u8g2: a monochrome graphic library -# -# CONFIG_PKG_USING_U8G2_OFFICIAL is not set -# CONFIG_PKG_USING_U8G2 is not set -# CONFIG_PKG_USING_OPENMV is not set -# CONFIG_PKG_USING_MUPDF is not set -# CONFIG_PKG_USING_STEMWIN is not set -# CONFIG_PKG_USING_WAVPLAYER is not set -# CONFIG_PKG_USING_TJPGD is not set -# CONFIG_PKG_USING_PDFGEN is not set -# CONFIG_PKG_USING_HELIX is not set -# CONFIG_PKG_USING_AZUREGUIX is not set -# CONFIG_PKG_USING_TOUCHGFX2RTT is not set -# CONFIG_PKG_USING_NUEMWIN is not set -# CONFIG_PKG_USING_MP3PLAYER is not set -# CONFIG_PKG_USING_TINYJPEG is not set -# CONFIG_PKG_USING_UGUI is not set - -# -# PainterEngine: A cross-platform graphics application framework written in C language -# -# CONFIG_PKG_USING_PAINTERENGINE is not set -# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set -# CONFIG_PKG_USING_MCURSES is not set -# CONFIG_PKG_USING_TERMBOX is not set -# CONFIG_PKG_USING_VT100 is not set -# CONFIG_PKG_USING_QRCODE is not set -# CONFIG_PKG_USING_GUIENGINE is not set -# CONFIG_PKG_USING_PERSIMMON is not set - -# -# tools packages -# -# CONFIG_PKG_USING_CMBACKTRACE is not set -# CONFIG_PKG_USING_EASYFLASH is not set -# CONFIG_PKG_USING_EASYLOGGER is not set -# CONFIG_PKG_USING_SYSTEMVIEW is not set -# CONFIG_PKG_USING_SEGGER_RTT is not set -# CONFIG_PKG_USING_RDB is not set -# CONFIG_PKG_USING_ULOG_EASYFLASH is not set -# CONFIG_PKG_USING_ULOG_FILE is not set -# CONFIG_PKG_USING_LOGMGR is not set -# CONFIG_PKG_USING_ADBD is not set -# CONFIG_PKG_USING_COREMARK is not set -# CONFIG_PKG_USING_DHRYSTONE is not set -# CONFIG_PKG_USING_MEMORYPERF is not set -# CONFIG_PKG_USING_NR_MICRO_SHELL is not set -# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set -# CONFIG_PKG_USING_LUNAR_CALENDAR is not set -# CONFIG_PKG_USING_BS8116A is not set -# CONFIG_PKG_USING_GPS_RMC is not set -# CONFIG_PKG_USING_URLENCODE is not set -# CONFIG_PKG_USING_UMCN is not set -# CONFIG_PKG_USING_LWRB2RTT is not set -# CONFIG_PKG_USING_CPU_USAGE is not set -# CONFIG_PKG_USING_GBK2UTF8 is not set -# CONFIG_PKG_USING_VCONSOLE is not set -# CONFIG_PKG_USING_KDB is not set -# CONFIG_PKG_USING_WAMR is not set -# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set -# CONFIG_PKG_USING_LWLOG is not set -# CONFIG_PKG_USING_ANV_TRACE is not set -# CONFIG_PKG_USING_ANV_MEMLEAK is not set -# CONFIG_PKG_USING_ANV_TESTSUIT is not set -# CONFIG_PKG_USING_ANV_BENCH is not set -# CONFIG_PKG_USING_DEVMEM is not set -# CONFIG_PKG_USING_REGEX is not set -# CONFIG_PKG_USING_MEM_SANDBOX is not set -# CONFIG_PKG_USING_SOLAR_TERMS is not set -# CONFIG_PKG_USING_GAN_ZHI is not set -# CONFIG_PKG_USING_FDT is not set -# CONFIG_PKG_USING_CBOX is not set -# CONFIG_PKG_USING_SNOWFLAKE is not set -# CONFIG_PKG_USING_HASH_MATCH is not set -# CONFIG_PKG_USING_FIRE_PID_CURVE is not set -# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set - -# -# system packages -# - -# -# enhanced kernel services -# -# CONFIG_PKG_USING_RT_MEMCPY_CM is not set -# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set -# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set - -# -# acceleration: Assembly language or algorithmic acceleration packages -# -# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set -# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set -# CONFIG_PKG_USING_QFPLIB_M3 is not set - -# -# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard -# -# CONFIG_PKG_USING_CMSIS_5 is not set -# CONFIG_PKG_USING_CMSIS_RTOS1 is not set -# CONFIG_PKG_USING_CMSIS_RTOS2 is not set - -# -# Micrium: Micrium software products porting for RT-Thread -# -# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set -# CONFIG_PKG_USING_UCOSII_WRAPPER is not set -# CONFIG_PKG_USING_UC_CRC is not set -# CONFIG_PKG_USING_UC_CLK is not set -# CONFIG_PKG_USING_UC_COMMON is not set -# CONFIG_PKG_USING_UC_MODBUS is not set -# CONFIG_PKG_USING_RTDUINO is not set -# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set -# CONFIG_PKG_USING_CAIRO is not set -# CONFIG_PKG_USING_PIXMAN is not set -# CONFIG_PKG_USING_PARTITION is not set -# CONFIG_PKG_USING_PERF_COUNTER is not set -# CONFIG_PKG_USING_FLASHDB is not set -# CONFIG_PKG_USING_SQLITE is not set -# CONFIG_PKG_USING_RTI is not set -# CONFIG_PKG_USING_DFS_YAFFS is not set -# CONFIG_PKG_USING_LITTLEFS is not set -# CONFIG_PKG_USING_DFS_JFFS2 is not set -# CONFIG_PKG_USING_DFS_UFFS is not set -# CONFIG_PKG_USING_LWEXT4 is not set -# CONFIG_PKG_USING_THREAD_POOL is not set -# CONFIG_PKG_USING_ROBOTS is not set -# CONFIG_PKG_USING_EV is not set -# CONFIG_PKG_USING_SYSWATCH is not set -# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set -# CONFIG_PKG_USING_PLCCORE is not set -# CONFIG_PKG_USING_RAMDISK is not set -# CONFIG_PKG_USING_MININI is not set -# CONFIG_PKG_USING_QBOOT is not set -# CONFIG_PKG_USING_PPOOL is not set -# CONFIG_PKG_USING_OPENAMP is not set -# CONFIG_PKG_USING_LPM is not set -# CONFIG_PKG_USING_TLSF is not set -# CONFIG_PKG_USING_EVENT_RECORDER is not set -# CONFIG_PKG_USING_ARM_2D is not set -# CONFIG_PKG_USING_MCUBOOT is not set -# CONFIG_PKG_USING_TINYUSB is not set -# CONFIG_PKG_USING_CHERRYUSB is not set -# CONFIG_PKG_USING_KMULTI_RTIMER is not set -# CONFIG_PKG_USING_TFDB is not set -# CONFIG_PKG_USING_QPC is not set - -# -# peripheral libraries and drivers -# -# CONFIG_PKG_USING_SENSORS_DRIVERS is not set -# CONFIG_PKG_USING_REALTEK_AMEBA is not set -# CONFIG_PKG_USING_SHT2X is not set -# CONFIG_PKG_USING_SHT3X is not set -# CONFIG_PKG_USING_ADT74XX is not set -# CONFIG_PKG_USING_AS7341 is not set -# CONFIG_PKG_USING_STM32_SDIO is not set -# CONFIG_PKG_USING_ESP_IDF is not set -# CONFIG_PKG_USING_ICM20608 is not set -# CONFIG_PKG_USING_BUTTON is not set -# CONFIG_PKG_USING_PCF8574 is not set -# CONFIG_PKG_USING_SX12XX is not set -# CONFIG_PKG_USING_SIGNAL_LED is not set -# CONFIG_PKG_USING_LEDBLINK is not set -# CONFIG_PKG_USING_LITTLED is not set -# CONFIG_PKG_USING_LKDGUI is not set -# CONFIG_PKG_USING_NRF5X_SDK is not set -# CONFIG_PKG_USING_NRFX is not set -# CONFIG_PKG_USING_WM_LIBRARIES is not set - -# -# Kendryte SDK -# -# CONFIG_PKG_USING_K210_SDK is not set -# CONFIG_PKG_USING_KENDRYTE_SDK is not set -# CONFIG_PKG_USING_INFRARED is not set -# CONFIG_PKG_USING_MULTI_INFRARED is not set -# CONFIG_PKG_USING_AGILE_BUTTON is not set -# CONFIG_PKG_USING_AGILE_LED is not set -# CONFIG_PKG_USING_AT24CXX is not set -# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set -# CONFIG_PKG_USING_AD7746 is not set -# CONFIG_PKG_USING_PCA9685 is not set -# CONFIG_PKG_USING_I2C_TOOLS is not set -# CONFIG_PKG_USING_NRF24L01 is not set -# CONFIG_PKG_USING_TOUCH_DRIVERS is not set -# CONFIG_PKG_USING_MAX17048 is not set -# CONFIG_PKG_USING_RPLIDAR is not set -# CONFIG_PKG_USING_AS608 is not set -# CONFIG_PKG_USING_RC522 is not set -# CONFIG_PKG_USING_WS2812B is not set -# CONFIG_PKG_USING_EMBARC_BSP is not set -# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set -# CONFIG_PKG_USING_MULTI_RTIMER is not set -# CONFIG_PKG_USING_MAX7219 is not set -# CONFIG_PKG_USING_BEEP is not set -# CONFIG_PKG_USING_EASYBLINK is not set -# CONFIG_PKG_USING_PMS_SERIES is not set -# CONFIG_PKG_USING_CAN_YMODEM is not set -# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set -# CONFIG_PKG_USING_QLED is not set -# CONFIG_PKG_USING_PAJ7620 is not set -# CONFIG_PKG_USING_AGILE_CONSOLE is not set -# CONFIG_PKG_USING_LD3320 is not set -# CONFIG_PKG_USING_WK2124 is not set -# CONFIG_PKG_USING_LY68L6400 is not set -# CONFIG_PKG_USING_DM9051 is not set -# CONFIG_PKG_USING_SSD1306 is not set -# CONFIG_PKG_USING_QKEY is not set -# CONFIG_PKG_USING_RS485 is not set -# CONFIG_PKG_USING_RS232 is not set -# CONFIG_PKG_USING_NES is not set -# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set -# CONFIG_PKG_USING_VDEVICE is not set -# CONFIG_PKG_USING_SGM706 is not set -# CONFIG_PKG_USING_STM32WB55_SDK is not set -# CONFIG_PKG_USING_RDA58XX is not set -# CONFIG_PKG_USING_LIBNFC is not set -# CONFIG_PKG_USING_MFOC is not set -# CONFIG_PKG_USING_TMC51XX is not set -# CONFIG_PKG_USING_TCA9534 is not set -# CONFIG_PKG_USING_KOBUKI is not set -# CONFIG_PKG_USING_ROSSERIAL is not set -# CONFIG_PKG_USING_MICRO_ROS is not set -# CONFIG_PKG_USING_MCP23008 is not set -# CONFIG_PKG_USING_BLUETRUM_SDK is not set -# CONFIG_PKG_USING_MISAKA_AT24CXX is not set -# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set -# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set -# CONFIG_PKG_USING_BL_MCU_SDK is not set -# CONFIG_PKG_USING_SOFT_SERIAL is not set -# CONFIG_PKG_USING_MB85RS16 is not set -# CONFIG_PKG_USING_CW2015 is not set -# CONFIG_PKG_USING_RFM300 is not set -# CONFIG_PKG_USING_IO_INPUT_FILTER is not set -# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set - -# -# AI packages -# -# CONFIG_PKG_USING_LIBANN is not set -# CONFIG_PKG_USING_NNOM is not set -# CONFIG_PKG_USING_ONNX_BACKEND is not set -# CONFIG_PKG_USING_ONNX_PARSER is not set -# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set -# CONFIG_PKG_USING_ELAPACK is not set -# CONFIG_PKG_USING_ULAPACK is not set -# CONFIG_PKG_USING_QUEST is not set -# CONFIG_PKG_USING_NAXOS is not set - -# -# miscellaneous packages -# - -# -# project laboratory -# - -# -# samples: kernel and components samples -# -# CONFIG_PKG_USING_KERNEL_SAMPLES is not set -# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set -# CONFIG_PKG_USING_NETWORK_SAMPLES is not set -# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set - -# -# entertainment: terminal games and other interesting software packages -# -# CONFIG_PKG_USING_CMATRIX is not set -# CONFIG_PKG_USING_SL is not set -# CONFIG_PKG_USING_CAL is not set -# CONFIG_PKG_USING_ACLOCK is not set -# CONFIG_PKG_USING_THREES is not set -# CONFIG_PKG_USING_2048 is not set -# CONFIG_PKG_USING_SNAKE is not set -# CONFIG_PKG_USING_TETRIS is not set -# CONFIG_PKG_USING_DONUT is not set -# CONFIG_PKG_USING_COWSAY is not set -# CONFIG_PKG_USING_LIBCSV is not set -# CONFIG_PKG_USING_OPTPARSE is not set -# CONFIG_PKG_USING_FASTLZ is not set -# CONFIG_PKG_USING_MINILZO is not set -# CONFIG_PKG_USING_QUICKLZ is not set -# CONFIG_PKG_USING_LZMA is not set -# CONFIG_PKG_USING_MULTIBUTTON is not set -# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set -# CONFIG_PKG_USING_CANFESTIVAL is not set -# CONFIG_PKG_USING_ZLIB is not set -# CONFIG_PKG_USING_MINIZIP is not set -# CONFIG_PKG_USING_HEATSHRINK is not set -# CONFIG_PKG_USING_DSTR is not set -# CONFIG_PKG_USING_TINYFRAME is not set -# CONFIG_PKG_USING_KENDRYTE_DEMO is not set -# CONFIG_PKG_USING_DIGITALCTRL is not set -# CONFIG_PKG_USING_UPACKER is not set -# CONFIG_PKG_USING_UPARAM is not set -# CONFIG_PKG_USING_HELLO is not set -# CONFIG_PKG_USING_VI is not set -# CONFIG_PKG_USING_KI is not set -# CONFIG_PKG_USING_ARMv7M_DWT is not set -# CONFIG_PKG_USING_UKAL is not set -# CONFIG_PKG_USING_CRCLIB is not set -# CONFIG_PKG_USING_LWGPS is not set -# CONFIG_PKG_USING_STATE_MACHINE is not set -# CONFIG_PKG_USING_DESIGN_PATTERN is not set -# CONFIG_PKG_USING_CONTROLLER is not set -# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set -# CONFIG_PKG_USING_MFBD is not set -# CONFIG_PKG_USING_SLCAN2RTT is not set -# CONFIG_PKG_USING_SOEM is not set -# CONFIG_PKG_USING_QPARAM is not set - -# -# Privated Packages of RealThread -# -# CONFIG_PKG_USING_CODEC is not set -# CONFIG_PKG_USING_PLAYER is not set -# CONFIG_PKG_USING_MPLAYER is not set -# CONFIG_PKG_USING_PERSIMMON_SRC is not set -# CONFIG_PKG_USING_JS_PERSIMMON is not set -# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set - -# -# Network Utilities -# -# CONFIG_PKG_USING_WICED is not set -# CONFIG_PKG_USING_CLOUDSDK is not set -# CONFIG_PKG_USING_POWER_MANAGER is not set -# CONFIG_PKG_USING_RT_OTA is not set -# CONFIG_PKG_USING_RTINSIGHT is not set -# CONFIG_PKG_USING_SMARTCONFIG is not set -# CONFIG_PKG_USING_RTX is not set -# CONFIG_RT_USING_TESTCASE is not set -# CONFIG_PKG_USING_NGHTTP2 is not set -# CONFIG_PKG_USING_AVS is not set -# CONFIG_PKG_USING_ALI_LINKKIT is not set -# CONFIG_PKG_USING_STS is not set -# CONFIG_PKG_USING_DLMS is not set -# CONFIG_PKG_USING_AUDIO_FRAMEWORK is not set -# CONFIG_PKG_USING_ZBAR is not set -# CONFIG_PKG_USING_MCF is not set -# CONFIG_PKG_USING_URPC is not set -# CONFIG_PKG_USING_DCM is not set -# CONFIG_PKG_USING_EMQ is not set -# CONFIG_PKG_USING_CFGM is not set -# CONFIG_PKG_USING_RT_CMSIS_DAP is not set -# CONFIG_PKG_USING_SMODULE is not set -# CONFIG_PKG_USING_SNFD is not set -# CONFIG_PKG_USING_UDBD is not set -# CONFIG_PKG_USING_BENCHMARK is not set -# CONFIG_PKG_USING_UBJSON is not set -# CONFIG_PKG_USING_DATATYPE is not set -# CONFIG_PKG_USING_FASTFS is not set -# CONFIG_PKG_USING_RIL is not set -# CONFIG_PKG_USING_WATCH_DCM_SVC is not set -# CONFIG_PKG_USING_WATCH_APP_FWK is not set -# CONFIG_PKG_USING_GUI_TEST is not set -# CONFIG_PKG_USING_PMEM is not set -# CONFIG_PKG_USING_LWRDP is not set -# CONFIG_PKG_USING_MASAN is not set -# CONFIG_PKG_USING_BSDIFF_LIB is not set -# CONFIG_PKG_USING_PRC_DIFF is not set - -# -# RT-Thread Smart -# -# CONFIG_PKG_USING_UKERNEL is not set -# CONFIG_PKG_USING_TRACE_AGENT is not set -CONFIG_SOC_FAMILY_IFX=y -CONFIG_SOC_SERIES_IFX_PSOC6=y - -# -# Hardware Drivers Config -# -CONFIG_SOC_IFX_PSOC6_43012=y - -# -# Onboard Peripheral Drivers -# -CONFIG_BSP_USING_USB_TO_USART=y - -# -# On-chip Peripheral Drivers -# -CONFIG_BSP_USING_GPIO=y -CONFIG_BSP_USING_UART=y -# CONFIG_BSP_USING_UART0 is not set -# CONFIG_BSP_USING_UART1 is not set -# CONFIG_BSP_USING_UART2 is not set -# CONFIG_BSP_USING_UART3 is not set -# CONFIG_BSP_USING_UART4 is not set -CONFIG_BSP_USING_UART5=y -# CONFIG_BSP_USING_PWM is not set -# CONFIG_BSP_USING_SPI is not set -# CONFIG_BSP_USING_ADC is not set -# CONFIG_BSP_USING_SDMMC is not set -# CONFIG_BSP_USING_QSPI_FLASH is not set -# CONFIG_BSP_USING_HW_I2C is not set -# CONFIG_BSP_USING_I2C is not set -# CONFIG_BSP_USING_USBD is not set -# CONFIG_BSP_USING_RTC is not set -# CONFIG_BSP_USING_ON_CHIP_FLASH is not set -# CONFIG_BSP_USING_WDT is not set -# CONFIG_BSP_USING_DAC is not set -# CONFIG_BSP_USING_TIM is not set - -# -# Board extended module Drivers -# -# CONFIG_BSP_USING_SLIDER is not set -# CONFIG_BSP_USING_RW007 is not set diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/.cproject b/bsp/cypress/psoc6-cy8cproto-4343w/.cproject deleted file mode 100644 index 52796a8a5d..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/.cproject +++ /dev/null @@ -1,240 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/.gitignore b/bsp/cypress/psoc6-cy8cproto-4343w/.gitignore deleted file mode 100644 index 7221bde019..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/.gitignore +++ /dev/null @@ -1,42 +0,0 @@ -*.pyc -*.map -*.dblite -*.elf -*.bin -*.hex -*.axf -*.exe -*.pdb -*.idb -*.ilk -*.old -build -Debug -documentation/html -packages/ -*~ -*.o -*.obj -*.out -*.bak -*.dep -*.lib -*.i -*.d -.DS_Stor* -.config 3 -.config 4 -.config 5 -Midea-X1 -*.uimg -GPATH -GRTAGS -GTAGS -.vscode -JLinkLog.txt -JLinkSettings.ini -DebugConfig/ -RTE/ -settings/ -*.uvguix* -cconfig.h diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/.project b/bsp/cypress/psoc6-cy8cproto-4343w/.project deleted file mode 100644 index f7b356f1f9..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/.project +++ /dev/null @@ -1,28 +0,0 @@ - - - dist_ide_project - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - com.cypress.studio.app.cymodusnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/.settings/dist_ide_project.DAPLink.Debug.rttlaunch b/bsp/cypress/psoc6-cy8cproto-4343w/.settings/dist_ide_project.DAPLink.Debug.rttlaunch deleted file mode 100644 index 8c8040b3ad..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/.settings/dist_ide_project.DAPLink.Debug.rttlaunch +++ /dev/null @@ -1,65 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/.settings/dist_ide_project.OpenOCD.Debug.rttlaunch b/bsp/cypress/psoc6-cy8cproto-4343w/.settings/dist_ide_project.OpenOCD.Debug.rttlaunch deleted file mode 100644 index 2b3931d2f9..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/.settings/dist_ide_project.OpenOCD.Debug.rttlaunch +++ /dev/null @@ -1,58 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/Kconfig b/bsp/cypress/psoc6-cy8cproto-4343w/Kconfig deleted file mode 100644 index 8cbc7b71a8..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/Kconfig +++ /dev/null @@ -1,21 +0,0 @@ -mainmenu "RT-Thread Configuration" - -config BSP_DIR - string - option env="BSP_ROOT" - default "." - -config RTT_DIR - string - option env="RTT_ROOT" - default "../../.." - -config PKGS_DIR - string - option env="PKGS_ROOT" - default "packages" - -source "$RTT_DIR/Kconfig" -source "$PKGS_DIR/Kconfig" -source "../libraries/Kconfig" -source "board/Kconfig" diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/LICENSE b/bsp/cypress/psoc6-cy8cproto-4343w/LICENSE deleted file mode 100644 index 91c81ad20b..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/LICENSE +++ /dev/null @@ -1,210 +0,0 @@ -CYPRESS END USER LICENSE AGREEMENT - -PLEASE READ THIS END USER LICENSE AGREEMENT ("Agreement") CAREFULLY BEFORE -DOWNLOADING, INSTALLING, COPYING, OR USING THIS SOFTWARE AND ACCOMPANYING -DOCUMENTATION. BY DOWNLOADING, INSTALLING, COPYING OR USING THE SOFTWARE, -YOU ARE AGREEING TO BE BOUND BY THIS AGREEMENT. IF YOU DO NOT AGREE TO ALL -OF THE TERMS OF THIS AGREEMENT, PROMPTLY RETURN AND DO NOT USE THE SOFTWARE. -IF YOU HAVE PURCHASED THIS LICENSE TO THE SOFTWARE, YOUR RIGHT TO RETURN THE -SOFTWARE EXPIRES 30 DAYS AFTER YOUR PURCHASE AND APPLIES ONLY TO THE ORIGINAL -PURCHASER. - -1. Definitions. - - "Software" means this software and any accompanying documentation, - including any upgrades, updates, bug fixes or modified versions provided - to you by Cypress. - - "Source Code" means software in human-readable form. - - "Binary Code" means the software in binary code form such as object code or - an executable. - - "Development Tools" means software that is intended to be installed on a - personal computer and used to create programming code for Firmware, - Drivers, or Host Applications. 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Any notice to Cypress -will be deemed effective when actually received and must be sent to Cypress -Semiconductor Corporation, ATTN: Chief Legal Officer, 198 Champion Court, San -Jose, CA 95134 USA. diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/README.md b/bsp/cypress/psoc6-cy8cproto-4343w/README.md deleted file mode 100644 index ea40bb837e..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/README.md +++ /dev/null @@ -1,119 +0,0 @@ -# Cypress Psoc6-CY8CKIT-062S2-43012 说明 - -## 简介 - -本文档为 `RT-Thread` 为 `PSoC6 CY8CKIT-062S2-43012`开发板提供的 BSP (板级支持包) 说明。 - -主要内容如下： - -- 开发板资源介绍 -- BSP 快速上手 -- 进阶使用方法 - -通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 `RT-Thread` 驱动更多板载资源。 - -## 开发板介绍 - -`PSoC6 CY8CKIT-062S2-43012` 是赛普拉斯推出的一款32位双核CPU子系统（ ARM Cortex-M4 和 ARM Cortex-M0）的开发板，具有单周期乘法的150-MHz Arm Cortex-M4F CPU (浮点和存储器保护单元)，100-MHz Cortex M0+ CPU，带单周期乘法和MPU，可以充分发挥 PSoC6 双核芯片性能。 - -开发板外观详细信息：[CY8CPROTO-062-4343W - Infineon Technologies](https://www.infineon.com/cms/en/product/evaluation-boards/cy8cproto-062-4343w/) - -该开发板核心 **板载资源** 如下： - -- MCU：CY8C624ABZI-S2D44，Cortex-M4主频 150MHz，Cortex-M0主频 100MHz，2MB Flash 和 1MB SRAM - MCU手册更多详细信息请参考文档 [PSoC 6 MCU: CY8C62x8, CY8C62xA Datasheet (infineon.com)](https://www.infineon.com/dgdl/Infineon-PSOC_6_MCU_CY8C62X8_CY8C62XA-DataSheet-v17_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee7d03a70b1) -- 板载资源：microSD card , 64-Mb Quad-SPI NOR flash， CYW43012 Wi-Fi + Bluetooth Combo Chip -- 开发环境：ModusToolbox 2.0/MDK V5 - PSoC® Creator™ 下载链接 [ModusToolbox™ Software - Infineon Technologies](https://www.infineon.com/cms/en/design-support/tools/sdk/modustoolbox-software/) -- 开发板：CY8CKIT-062-BLE PSoC 6 BLE Pioneer Kit - 开发板更多详细信息请参考文档 https://www.cypress.com/file/390496/download - -## 外设支持 - -本 BSP 目前对外设的支持情况如下： - -| **片上外设** | **支持情况** | **备注** | -| :----------: | :----------: | :-----------: | -| USB 转串口 | 支持 | UART5 | -| GPIO | 支持 | — | -| UART | 支持 | UART0-5 | -| I2C | 支持 | 软件+硬件 I2C | -| RTC | 支持 | — | -| WDT | 支持 | — | -| PWM | 支持 | — | -| SPI | 支持 | — | -| HardTimer | 支持 | — | -| DAC | 支持 | IDAC | -| Flash | 支持 | 片内 Falsh | -| Touch | 支持 | 触摸滑条 | -| SDIO | 暂不支持 | — | -| USB Device | 暂不支持 | — | -| USB Host | 暂不支持 | — | - -## 快速上手 - -本 BSP 是以 `MDK V5` 和 `RT-Thread Studio` 为开发环境（编译器：ARMClang / GCC），接下来介绍如何将系统运行起来。 - -### 使用 MDK V5 开发 - -#### 硬件连接 - -使用数据线连接开发板到 PC。 - -#### 编译下载 - -1、配置工程： - -首先打开 MDK ，若没有安装 `Cypress-PSoC6` 的芯片支持包会提示在线安装，根据提示安装即可。若受网络问题，可以进入 [keil](https://www.keil.com/dd2/pack) 官网下载安装包，离线安装。 - -![mdk_package](./figures/mdk_package.png) - -2、 编译此工程：在安装好芯片支持包后，在 `MDK`工程中进行编译。 - -3、下载此工程： - -工程默认配置使用板载 `DAP-LINK` 使用 `SWD` 方式下载程序，使用数据线连接开发板，编译之后直接点击下载按钮即可。 - -### 使用 RT-Thread Studio 开发 - -#### 导入工程 - -* 首先打开 `RT-Thread Studio` 开发工具，点加左上角文件—>导入—> RT-Thread Studio项目到工作空间中。 - -![](./figures/studio1.png) - -* 接着选择 `PSoC6 CY8CKIT-062S2-43012` 开发板支持包的目录，进行导入。 - -![](./figures/studio2.png) - -#### 编译下载 - -* 点击 IDE 左上角的构建选项进行工程的编译。 - -![](./figures/studio3-build.png) - -* 当编译无错误警告时，点击 `Debug` 或 `Download` 选项进行调试/下载。 - - 注：若点击下载并下载成功后串口终端无显示信息，请手动按下复位按键进行重启运行。 - - ![](./figures/studio4-download.png) - -## 运行结果 - -下载程序成功之后，系统会自动运行。打开终端工具串口助手，选择波特率为 115200。复位设备后，LED 将会以 500HZ 的频率闪烁，而且在终端上可以看到 `RT-Thread` 的输出信息： - -注：推荐使用串口调试助手如：`MobaXterm` - -``` - \ | / -- RT - Thread Operating System - / | \ 4.1.1 build Jul 25 2022 18:03:35 - 2006 - 2022 Copyright by RT-Thread team -msh > -``` - -## 联系人 - -维护人: - -- [Rbb666](https://github.com/Rbb666) \ No newline at end of file diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/SConscript b/bsp/cypress/psoc6-cy8cproto-4343w/SConscript deleted file mode 100644 index 20f7689c53..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/SConscript +++ /dev/null @@ -1,15 +0,0 @@ -# for module compiling -import os -Import('RTT_ROOT') -from building import * - -cwd = GetCurrentDir() -objs = [] -list = os.listdir(cwd) - -for d in list: - path = os.path.join(cwd, d) - if os.path.isfile(os.path.join(path, 'SConscript')): - objs = objs + SConscript(os.path.join(d, 'SConscript')) - -Return('objs') diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/SConstruct b/bsp/cypress/psoc6-cy8cproto-4343w/SConstruct deleted file mode 100644 index ed03635714..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/SConstruct +++ /dev/null @@ -1,60 +0,0 @@ -import os -import sys -import rtconfig - -if os.getenv('RTT_ROOT'): - RTT_ROOT = os.getenv('RTT_ROOT') -else: - RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') - -sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] -try: - from building import * -except: - print('Cannot found RT-Thread root directory, please check RTT_ROOT') - print(RTT_ROOT) - exit(-1) - -TARGET = 'rt-thread.' + rtconfig.TARGET_EXT - -DefaultEnvironment(tools=[]) -env = Environment(tools = ['mingw'], - AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, - CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS, - AR = rtconfig.AR, ARFLAGS = '-rc', - CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, - LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) -env.PrependENVPath('PATH', rtconfig.EXEC_PATH) - -if rtconfig.PLATFORM in ['iccarm']: - env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) - env.Replace(ARFLAGS = ['']) - env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map') - -Export('RTT_ROOT') -Export('rtconfig') - -SDK_ROOT = os.path.abspath('./') - -if os.path.exists(SDK_ROOT + '/libraries'): - libraries_path_prefix = SDK_ROOT + '/libraries' -else: - libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' - -SDK_LIB = libraries_path_prefix -Export('SDK_LIB') - -# prepare building environment -objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) - -IFX_library = 'IFX_PSOC6_HAL' -rtconfig.BSP_LIBRARY_TYPE = IFX_library - -# include libraries -objs.extend(SConscript(os.path.join(libraries_path_prefix, IFX_library, 'SConscript'))) - -# include drivers -objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript'))) - -# make a building -DoBuilding(TARGET, objs) diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/applications/SConscript b/bsp/cypress/psoc6-cy8cproto-4343w/applications/SConscript deleted file mode 100644 index fe708e67c8..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/applications/SConscript +++ /dev/null @@ -1,16 +0,0 @@ -import rtconfig -from building import * -import os - -cwd = GetCurrentDir() -path = [cwd] -src = Glob('*.c') - -group = DefineGroup('Applications', src, depend = [''], CPPPATH = path) - -list = os.listdir(cwd) -for item in list: - if os.path.isfile(os.path.join(cwd, item, 'SConscript')): - group = group + SConscript(os.path.join(item, 'SConscript')) - -Return('group') \ No newline at end of file diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/applications/main.c b/bsp/cypress/psoc6-cy8cproto-4343w/applications/main.c deleted file mode 100644 index e3e21c2ec8..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/applications/main.c +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2022-06-29 Rbb666 first version - */ - -#include -#include - -#include "drv_gpio.h" - -#define LED_PIN GET_PIN(13, 7) - -int main(void) -{ - rt_pin_mode(LED_PIN, PIN_MODE_OUTPUT); - - for (;;) - { - rt_pin_write(LED_PIN, PIN_HIGH); - rt_thread_mdelay(500); - rt_pin_write(LED_PIN, PIN_LOW); - rt_thread_mdelay(500); - } -} diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/board/Kconfig b/bsp/cypress/psoc6-cy8cproto-4343w/board/Kconfig deleted file mode 100644 index 6264b8b300..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/board/Kconfig +++ /dev/null @@ -1,323 +0,0 @@ -menu "Hardware Drivers Config" - -config SOC_IFX_PSOC6_43012 - bool - select SOC_SERIES_IFX_PSOC6 - select RT_USING_COMPONENTS_INIT - select RT_USING_USER_MAIN - default y - -menu "Onboard Peripheral Drivers" - - config BSP_USING_USB_TO_USART - bool "Enable USB TO USART (uart5)" - select BSP_USING_UART - select BSP_USING_UART5 - default y -endmenu - -menu "On-chip Peripheral Drivers" - - config BSP_USING_GPIO - bool "Enable GPIO" - select RT_USING_PIN - default y - - menuconfig BSP_USING_UART - bool "Enable UART" - default y - select RT_USING_SERIAL - if BSP_USING_UART - config BSP_USING_UART0 - bool "Enable UART0" - default n - config BSP_USING_UART1 - bool "Enable UART1" - default n - config BSP_USING_UART2 - bool "Enable UART2" - default n - config BSP_USING_UART3 - bool "Enable UART3" - default n - config BSP_USING_UART4 - bool "Enable UART4" - default n - config BSP_USING_UART5 - bool "Enable UART5" - default y - endif - - menuconfig BSP_USING_PWM - bool "Enable PWM" - default n - select RT_USING_PWM - if BSP_USING_PWM - menuconfig BSP_USING_PWM0 - bool "Enable timer0 output pwm" - default n - if BSP_USING_PWM0 - menuconfig BSP_USING_PWM0_CH3 - bool "Enable PWM0 channel3" - default n - if BSP_USING_PWM0_CH3 - config BSP_USING_PWM0_PORT13 - bool "Enable PWM0-PORT13 output pwm" - default n - endif - menuconfig BSP_USING_PWM0_CH7 - bool "Enable PWM0 channel7" - default n - if BSP_USING_PWM0_CH7 - config BSP_USING_PWM0_PORT2 - bool "Enable PWM0-PORT2 output pwm" - default n - endif - if BSP_USING_PWM0_CH7 - config BSP_USING_PWM0_PORT5 - bool "Enable PWM0-PORT5 output pwm" - default n - endif - if BSP_USING_PWM0_CH7 - config BSP_USING_PWM0_PORT7 - bool "Enable PWM0-PORT7 output pwm" - default n - endif - if BSP_USING_PWM0_CH7 - config BSP_USING_PWM0_PORT9 - bool "Enable PWM0-PORT9 output pwm" - default n - endif - if BSP_USING_PWM0_CH7 - config BSP_USING_PWM0_PORT10 - bool "Enable PWM0-PORT10 output pwm" - default n - endif - if BSP_USING_PWM0_CH7 - config BSP_USING_PWM0_PORT12 - bool "Enable PWM0-PORT12 output pwm" - default n - endif - endif - endif - - menuconfig BSP_USING_SPI - bool "Enable SPI BUS" - select RT_USING_SPI - default n - if BSP_USING_SPI - menuconfig BSP_USING_SPI3 - bool "Enable SPI3 BUS" - default n - if BSP_USING_SPI3 - config BSP_USING_SPI3_SAMPLE - bool "Enable SPI3 BUS Sample" - default n - endif - endif - - menuconfig BSP_USING_ADC - bool "Enable ADC" - default n - select RT_USING_ADC - if BSP_USING_ADC - config BSP_USING_ADC1 - bool "Enable ADC1" - default n - endif - - config BSP_USING_SDMMC - bool "Enable SDMMC (sd card)" - default n - select RT_USING_SDIO - select RT_USING_DFS - select RT_USING_DFS_ELMFAT - if BSP_USING_SDMMC - config BSP_USING_SDIO1 - bool "Enable SDIO1 (sd card)" - default n - endif - - config BSP_USING_QSPI_FLASH - bool "Enable QSPI BUS" - select RT_USING_QSPI - select RT_USING_SFUD - select RT_SFUD_USING_QSPI - default n - - menuconfig BSP_USING_HW_I2C - bool "Enable Hardware I2C Bus" - default n - select RT_USING_I2C - select RT_USING_PIN - if BSP_USING_HW_I2C - config BSP_USING_HW_I2C3 - bool "Enable I2C3 Bus (User I2C)" - default n - if BSP_USING_HW_I2C3 - comment "Notice: P6_0 --> 48; P6_1 --> 49" - config BSP_I2C3_SCL_PIN - int "i2c3 SCL pin number" - range 1 113 - default 48 - config BSP_I2C3_SDA_PIN - int "i2c3 SDA pin number" - range 1 113 - default 49 - endif - config BSP_USING_HW_I2C6 - bool "Enable I2C6 Bus (User I2C)" - default n - if BSP_USING_HW_I2C6 - comment "Notice: P13_0 --> 48; P13_1 --> 49" - config BSP_I2C6_SCL_PIN - int "i2c6 SCL pin number" - range 1 113 - default 104 - config BSP_I2C6_SDA_PIN - int "i2c6 SDA pin number" - range 1 113 - default 105 - endif - endif - - menuconfig BSP_USING_I2C - bool "Enable Software I2C Bus" - default n - select RT_USING_I2C - select RT_USING_I2C_BITOPS - select RT_USING_PIN - if BSP_USING_I2C - config BSP_USING_I2C1 - bool "Enable I2C1 Bus (User I2C)" - default n - if BSP_USING_I2C1 - comment "Notice: P13_1 --> 105; P13_2 --> 106" - config BSP_I2C1_SCL_PIN - int "i2c1 SCL pin number" - range 1 113 - default 105 - config BSP_I2C1_SDA_PIN - int "i2c1 SDA pin number" - range 1 113 - default 106 - endif - endif - - config BSP_USING_USBD - bool "Enable USB Device" - select RT_USING_USB_DEVICE - default n - - menuconfig BSP_USING_RTC - bool "Enable RTC" - select RT_USING_RTC - default n - if BSP_USING_RTC - choice - prompt "Select clock source" - default BSP_RTC_USING_LSE - - config BSP_RTC_USING_LSE - bool "RTC USING LSE" - - config BSP_RTC_USING_LSI - bool "RTC USING LSI" - endchoice - endif - - config BSP_USING_ON_CHIP_FLASH - bool "Enable on-chip FLASH" - default n - - config BSP_USING_WDT - bool "Enable Watchdog Timer" - select RT_USING_WDT - default n - - menuconfig BSP_USING_DAC - bool "Enable DAC" - default n - select RT_USING_DAC - if BSP_USING_DAC - config BSP_USING_DAC1 - bool "Enable DAC1" - default n - config BSP_USING_DAC2 - bool "Enable DAC2" - default n - endif - - menuconfig BSP_USING_TIM - bool "Enable timer" - default n - select RT_USING_HWTIMER - if BSP_USING_TIM - config BSP_USING_TIM1 - bool "Enable TIM1" - default n - config BSP_USING_TIM2 - bool "Enable TIM2" - default n - endif -endmenu - -menu "Board extended module Drivers" - - config BSP_USING_SLIDER - bool "Enable Slider Demo" - select BSP_USING_PWM - select BSP_USING_PWM0 - select BSP_USING_PWM0_CH3 - select BSP_USING_PWM0_PORT13 - default n - - menuconfig BSP_USING_RW007 - bool "Enable RW007" - default n - select PKG_USING_RW007 - select BSP_USING_SPI - select RW007_NOT_USE_EXAMPLE_DRIVERS - - if BSP_USING_RW007 - comment "Notice: P5_7 --> 47; P6_2 -->50; P6_5 --> 53; P12_0 --> 96" - config IFX_RW007_SPI_BUS_NAME - string "RW007 BUS NAME" - default "spi3" - - config IFX_RW007_WIFI_SSID - string "Wi-Fi SSID" - default "realthread_VIP" - - config IFX_RW007_WIFI_PASSWORD - string "Wi-Fi Password" - default "your wifi password" - - config IFX_RW007_CS_PIN - int "(INT)CS pin index" - range 1 113 - default 96 - - config IFX_RW007_BOOT0_PIN - int "(INT)BOOT0 pin index (same as spi clk pin)" - range 1 113 - default 50 - - config IFX_RW007_BOOT1_PIN - int "(INT)BOOT1 pin index (same as spi cs pin)" - range 1 113 - default 96 - - config IFX_RW007_INT_BUSY_PIN - int "(INT)INT/BUSY pin index" - range 1 113 - default 47 - - config IFX_RW007_RST_PIN - int "(INT)RESET pin index" - range 1 113 - default 53 - endif -endmenu - -endmenu diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/board/SConscript b/bsp/cypress/psoc6-cy8cproto-4343w/board/SConscript deleted file mode 100644 index a6cdd0eedc..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/board/SConscript +++ /dev/null @@ -1,44 +0,0 @@ -import os -import rtconfig -from building import * - -Import('SDK_LIB') - -objs = [] -cwd = GetCurrentDir() -list = os.listdir(cwd) - -# add general drivers -src = Split(''' -board.c -''') - -if GetDepend(['BSP_USING_SPI3_SAMPLE']): - src += Glob('ports/spi_sample.c') - -if GetDepend(['BSP_USING_RW007']): - src += Glob('ports/drv_rw007.c') - -if GetDepend(['BSP_USING_SLIDER']): - src += Glob('ports/slider_sample.c') - -path = [cwd] -path += [cwd + '/ports'] - -startup_path_prefix = SDK_LIB - -if rtconfig.PLATFORM in ['gcc']: - src += [startup_path_prefix + - '/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/startup_psoc6_02_cm4.S'] - src += [startup_path_prefix + - '/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S'] -elif rtconfig.PLATFORM in ['armcc', 'armclang']: - src += [startup_path_prefix + - '/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_02_cm4.S'] - src += [startup_path_prefix + - '/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/TOOLCHAIN_ARM/cy_syslib_mdk.S'] - -CPPDEFINES = ['CY8C624ABZI_S2D44', 'IFX_PSOC6_43012', 'CY_USING_HAL', 'COMPONENT_CAT1A', 'COMPONENT_CAT1', 'COMPONENT_BSP_DESIGN_MODUS'] -group = DefineGroup('Drivers', src, depend=[''], CPPPATH=path, CPPDEFINES=CPPDEFINES) - -Return('group') \ No newline at end of file diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/board/board.c b/bsp/cypress/psoc6-cy8cproto-4343w/board/board.c deleted file mode 100644 index 98ed84a6c2..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/board/board.c +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2022-06-29 Rbb666 first version - */ - -#include "board.h" - -void cy_bsp_all_init(void) -{ - cy_rslt_t result; - - /* Initialize the device and board peripherals */ - result = cybsp_init(); - - /* Board init failed. Stop program execution */ - if (result != CY_RSLT_SUCCESS) - { - CY_ASSERT(0); - } -} diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/board/board.h b/bsp/cypress/psoc6-cy8cproto-4343w/board/board.h deleted file mode 100644 index 257de99ee8..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/board/board.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2022-06-29 Rbb666 first version - * 2022-07-26 Rbb666 Add Flash Config - */ - -#ifndef __BOARD_H__ -#define __BOARD_H__ - -#include -#include "drv_common.h" -#include "drv_gpio.h" - -#include "cy_result.h" -#include "cybsp_types.h" -#include "cyhal.h" -#include "cybsp.h" - -#ifdef BSP_USING_USBD - #include "cy_usb_dev.h" - #include "cy_usb_dev_hid.h" - #include "cycfg_usbdev.h" -#endif - -/*FLASH CONFIG*/ -#define IFX_FLASH_START_ADRESS ((uint32_t)0x10000000) -#define IFX_FLASH_PAGE_SIZE (256 * 1024) -#define IFX_FLASH_SIZE (2 * 1024 * 1024) -#define IFX_FLASH_END_ADDRESS ((uint32_t)(IFX_FLASH_START_ADRESS + IFX_FLASH_SIZE)) - -/*EFLASH CONFIG*/ -#define IFX_EFLASH_START_ADRESS ((uint32_t)0x14000000) -#define IFX_EFLASH_PAGE_SIZE (32 * 1024) -#define IFX_EFLASH_SIZE (32 * 1024) -#define IFX_EFLASH_END_ADDRESS ((uint32_t)(IFX_EFLASH_START_ADRESS + IFX_EFLASH_SIZE)) - -/*SRAM CONFIG*/ -#define IFX_SRAM_SIZE (1014) -#define IFX_SRAM_END (0x08002000 + IFX_SRAM_SIZE * 1024) - -#ifdef __ARMCC_VERSION - extern int Image$$RW_IRAM1$$ZI$$Limit; - #define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) - #define HEAP_END IFX_SRAM_END -#elif __ICCARM__ - #pragma section="HEAP" - #define HEAP_BEGIN (__segment_end("HEAP")) -#else - extern unsigned int __end__; - extern unsigned int __HeapLimit; - #define HEAP_BEGIN (void*)&__end__ - #define HEAP_END (void*)&__HeapLimit -#endif - -void cy_bsp_all_init(void); - -#endif - diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/board/linker_scripts/link.icf b/bsp/cypress/psoc6-cy8cproto-4343w/board/linker_scripts/link.icf deleted file mode 100644 index fb4071c60d..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/board/linker_scripts/link.icf +++ /dev/null @@ -1,247 +0,0 @@ -/******************************************************************************* -* \file cy8c6xxa_cm4_dual.icf -* \version 2.91 -* -* Linker file for the IAR compiler. -* -* The main purpose of the linker script is to describe how the sections in the -* input files should be mapped into the output file, and to control the memory -* layout of the output file. -* -* \note The entry point is fixed and starts at 0x10000000. The valid application -* image should be placed there. -* -* \note The linker files included with the PDL template projects must be generic -* and handle all common use cases. Your project may not use every section -* defined in the linker files. In that case you may see warnings during the -* build process. In your project, you can simply comment out or remove the -* relevant code in the linker file. -* -******************************************************************************** -* \copyright -* Copyright 2016-2021 Cypress Semiconductor Corporation -* SPDX-License-Identifier: Apache-2.0 -* -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* http://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -*******************************************************************************/ - -/*###ICF### Section handled by ICF editor, don't touch! ****/ -/*-Editor annotation file-*/ -/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_4.xml" */ -/*-Specials-*/ -define symbol __ICFEDIT_intvec_start__ = 0x00000000; - -/* The symbols below define the location and size of blocks of memory in the target. - * Use these symbols to specify the memory regions available for allocation. - */ - -/* The following symbols control RAM and flash memory allocation for the CM4 core. - * You can change the memory allocation by editing RAM and Flash symbols. - * Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use. - * Using this memory region for other purposes will lead to unexpected behavior. - * Your changes must be aligned with the corresponding symbols for CM0+ core in 'xx_cm0plus.icf', - * where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.icf'. - */ -/* RAM */ -define symbol __ICFEDIT_region_IRAM1_start__ = 0x08002000; -define symbol __ICFEDIT_region_IRAM1_end__ = 0x080FF7FF; - -/* Flash */ -define symbol __ICFEDIT_region_IROM1_start__ = 0x10000000; -define symbol __ICFEDIT_region_IROM1_end__ = 0x101FFFFF; - -/* The following symbols define a 32K flash region used for EEPROM emulation. - * This region can also be used as the general purpose flash. - * You can assign sections to this memory region for only one of the cores. - * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region. - * Therefore, repurposing this memory region will prevent such middleware from operation. - */ -define symbol __ICFEDIT_region_IROM2_start__ = 0x14000000; -define symbol __ICFEDIT_region_IROM2_end__ = 0x14007FFF; - -/* The following symbols define device specific memory regions and must not be changed. */ -/* Supervisory FLASH - User Data */ -define symbol __ICFEDIT_region_IROM3_start__ = 0x16000800; -define symbol __ICFEDIT_region_IROM3_end__ = 0x16000FFF; - -/* Supervisory FLASH - Normal Access Restrictions (NAR) */ -define symbol __ICFEDIT_region_IROM4_start__ = 0x16001A00; -define symbol __ICFEDIT_region_IROM4_end__ = 0x16001BFF; - -/* Supervisory FLASH - Public Key */ -define symbol __ICFEDIT_region_IROM5_start__ = 0x16005A00; -define symbol __ICFEDIT_region_IROM5_end__ = 0x160065FF; - -/* Supervisory FLASH - Table of Content # 2 */ -define symbol __ICFEDIT_region_IROM6_start__ = 0x16007C00; -define symbol __ICFEDIT_region_IROM6_end__ = 0x16007DFF; - -/* Supervisory FLASH - Table of Content # 2 Copy */ -define symbol __ICFEDIT_region_IROM7_start__ = 0x16007E00; -define symbol __ICFEDIT_region_IROM7_end__ = 0x16007FFF; - -/* eFuse */ -define symbol __ICFEDIT_region_IROM8_start__ = 0x90700000; -define symbol __ICFEDIT_region_IROM8_end__ = 0x907FFFFF; - -/* XIP */ -define symbol __ICFEDIT_region_EROM1_start__ = 0x18000000; -define symbol __ICFEDIT_region_EROM1_end__ = 0x1FFFFFFF; - -define symbol __ICFEDIT_region_EROM2_start__ = 0x0; -define symbol __ICFEDIT_region_EROM2_end__ = 0x0; -define symbol __ICFEDIT_region_EROM3_start__ = 0x0; -define symbol __ICFEDIT_region_EROM3_end__ = 0x0; - - -define symbol __ICFEDIT_region_IRAM2_start__ = 0x0; -define symbol __ICFEDIT_region_IRAM2_end__ = 0x0; -define symbol __ICFEDIT_region_ERAM1_start__ = 0x0; -define symbol __ICFEDIT_region_ERAM1_end__ = 0x0; -define symbol __ICFEDIT_region_ERAM2_start__ = 0x0; -define symbol __ICFEDIT_region_ERAM2_end__ = 0x0; -define symbol __ICFEDIT_region_ERAM3_start__ = 0x0; -define symbol __ICFEDIT_region_ERAM3_end__ = 0x0; -/*-Sizes-*/ -if (!isdefinedsymbol(__STACK_SIZE)) { - define symbol __ICFEDIT_size_cstack__ = 0x1000; -} else { - define symbol __ICFEDIT_size_cstack__ = __STACK_SIZE; -} -define symbol __ICFEDIT_size_proc_stack__ = 0x0; - -/* Defines the minimum heap size. The actual heap size will be expanded to the end of the stack region */ -if (!isdefinedsymbol(__HEAP_SIZE)) { - define symbol __ICFEDIT_size_heap__ = 0x0400; -} else { - define symbol __ICFEDIT_size_heap__ = __HEAP_SIZE; -} -/**** End of ICF editor section. ###ICF###*/ - -/* By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core. - * More about CM0+ prebuilt images, see here: - * https://github.com/cypresssemiconductorco/psoc6cm0p - */ -/* The size of the Cortex-M0+ application image */ -define symbol FLASH_CM0P_SIZE = 0x2000; - -define memory mem with size = 4G; -define region IROM1_region = mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__]; -define region IROM2_region = mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__]; -define region IROM3_region = mem:[from __ICFEDIT_region_IROM3_start__ to __ICFEDIT_region_IROM3_end__]; -define region IROM4_region = mem:[from __ICFEDIT_region_IROM4_start__ to __ICFEDIT_region_IROM4_end__]; -define region IROM5_region = mem:[from __ICFEDIT_region_IROM5_start__ to __ICFEDIT_region_IROM5_end__]; -define region IROM6_region = mem:[from __ICFEDIT_region_IROM6_start__ to __ICFEDIT_region_IROM6_end__]; -define region IROM7_region = mem:[from __ICFEDIT_region_IROM7_start__ to __ICFEDIT_region_IROM7_end__]; -define region IROM8_region = mem:[from __ICFEDIT_region_IROM8_start__ to __ICFEDIT_region_IROM8_end__]; -define region EROM1_region = mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__]; -define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__]; - -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; -define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { }; -define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { }; -define block HSTACK {block HEAP, block PROC_STACK, last block CSTACK}; -define block CM0P_RO with size = FLASH_CM0P_SIZE { readonly section .cy_m0p_image }; -define block RO {first section .intvec, readonly}; - -define block cy_xip { section .cy_xip }; - -/*-Initializations-*/ -initialize by copy { readwrite }; -do not initialize { section .noinit, section .intvec_ram }; - -/*-Placement-*/ - -/* Flash - Cortex-M0+ application image */ -place at start of IROM1_region { block CM0P_RO }; - -/* Flash - Cortex-M4 application */ -place in IROM1_region { block RO }; - -/* Used for the digital signature of the secure application and the Bootloader SDK application. */ -".cy_app_signature" : place at address (__ICFEDIT_region_IROM1_end__ - 0x200) { section .cy_app_signature }; - -/* Emulated EEPROM Flash area */ -".cy_em_eeprom" : place at start of IROM2_region { section .cy_em_eeprom }; - -/* Supervisory Flash - User Data */ -".cy_sflash_user_data" : place at start of IROM3_region { section .cy_sflash_user_data }; - -/* Supervisory Flash - NAR */ -".cy_sflash_nar" : place at start of IROM4_region { section .cy_sflash_nar }; - -/* Supervisory Flash - Public Key */ -".cy_sflash_public_key" : place at start of IROM5_region { section .cy_sflash_public_key }; - -/* Supervisory Flash - TOC2 */ -".cy_toc_part2" : place at start of IROM6_region { section .cy_toc_part2 }; - -/* Supervisory Flash - RTOC2 */ -".cy_rtoc_part2" : place at start of IROM7_region { section .cy_rtoc_part2 }; - -/* eFuse */ -".cy_efuse" : place at start of IROM8_region { section .cy_efuse }; - -/* Execute in Place (XIP). See the smif driver documentation for details. */ -"cy_xip" : place at start of EROM1_region { block cy_xip }; - -/* RAM */ -place at start of IRAM1_region { readwrite section .intvec_ram}; -place in IRAM1_region { readwrite }; -place at end of IRAM1_region { block HSTACK }; - -/* These sections are used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage. */ -".cymeta" : place at address mem : 0x90500000 { readonly section .cymeta }; - - -keep { section .cy_m0p_image, - section .cy_app_signature, - section .cy_em_eeprom, - section .cy_sflash_user_data, - section .cy_sflash_nar, - section .cy_sflash_public_key, - section .cy_toc_part2, - section .cy_rtoc_part2, - section .cy_efuse, - section .cy_xip, - section .cymeta, - }; - - -/* The following symbols used by the cymcuelftool. */ -/* Flash */ -define exported symbol __cy_memory_0_start = 0x10000000; -define exported symbol __cy_memory_0_length = 0x00200000; -define exported symbol __cy_memory_0_row_size = 0x200; - -/* Emulated EEPROM Flash area */ -define exported symbol __cy_memory_1_start = 0x14000000; -define exported symbol __cy_memory_1_length = 0x8000; -define exported symbol __cy_memory_1_row_size = 0x200; - -/* Supervisory Flash */ -define exported symbol __cy_memory_2_start = 0x16000000; -define exported symbol __cy_memory_2_length = 0x8000; -define exported symbol __cy_memory_2_row_size = 0x200; - -/* XIP */ -define exported symbol __cy_memory_3_start = 0x18000000; -define exported symbol __cy_memory_3_length = 0x08000000; -define exported symbol __cy_memory_3_row_size = 0x200; - -/* eFuse */ -define exported symbol __cy_memory_4_start = 0x90700000; -define exported symbol __cy_memory_4_length = 0x100000; -define exported symbol __cy_memory_4_row_size = 1; - -/* EOF */ diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/board/linker_scripts/link.ld b/bsp/cypress/psoc6-cy8cproto-4343w/board/linker_scripts/link.ld deleted file mode 100644 index 8520b06add..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/board/linker_scripts/link.ld +++ /dev/null @@ -1,487 +0,0 @@ -/***************************************************************************//** -* \file cy8c6xxa_cm4_dual.ld -* \version 2.91 -* -* Linker file for the GNU C compiler. -* -* The main purpose of the linker script is to describe how the sections in the -* input files should be mapped into the output file, and to control the memory -* layout of the output file. -* -* \note The entry point location is fixed and starts at 0x10000000. The valid -* application image should be placed there. -* -* \note The linker files included with the PDL template projects must be generic -* and handle all common use cases. Your project may not use every section -* defined in the linker files. In that case you may see warnings during the -* build process. In your project, you can simply comment out or remove the -* relevant code in the linker file. -* -******************************************************************************** -* \copyright -* Copyright 2016-2021 Cypress Semiconductor Corporation -* SPDX-License-Identifier: Apache-2.0 -* -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* http://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -*******************************************************************************/ - -OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -SEARCH_DIR(.) -GROUP(-lgcc -lc -lnosys) -ENTRY(Reset_Handler) - -/* The size of the stack section at the end of CM4 SRAM */ -STACK_SIZE = 0x1000; - -/* By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core. -* More about CM0+ prebuilt images, see here: -* https://github.com/cypresssemiconductorco/psoc6cm0p -*/ -/* The size of the Cortex-M0+ application image at the start of FLASH */ -FLASH_CM0P_SIZE = 0x2000; - -/* Force symbol to be entered in the output file as an undefined symbol. Doing -* this may, for example, trigger linking of additional modules from standard -* libraries. You may list several symbols for each EXTERN, and you may use -* EXTERN multiple times. This command has the same effect as the -u command-line -* option. -*/ -EXTERN(Reset_Handler) - -/* The MEMORY section below describes the location and size of blocks of memory in the target. -* Use this section to specify the memory regions available for allocation. -*/ -MEMORY -{ - /* The ram and flash regions control RAM and flash memory allocation for the CM4 core. - * You can change the memory allocation by editing the 'ram' and 'flash' regions. - * Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use. - * Using this memory region for other purposes will lead to unexpected behavior. - * Your changes must be aligned with the corresponding memory regions for CM0+ core in 'xx_cm0plus.ld', - * where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.ld'. - */ - ram (rwx) : ORIGIN = 0x08002000, LENGTH = 0xFD800 - flash (rx) : ORIGIN = 0x10000000, LENGTH = 0x200000 - - /* This is a 32K flash region used for EEPROM emulation. This region can also be used as the general purpose flash. - * You can assign sections to this memory region for only one of the cores. - * Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region. - * Therefore, repurposing this memory region will prevent such middleware from operation. - */ - em_eeprom (rx) : ORIGIN = 0x14000000, LENGTH = 0x8000 /* 32 KB */ - - /* The following regions define device specific memory regions and must not be changed. */ - sflash_user_data (rx) : ORIGIN = 0x16000800, LENGTH = 0x800 /* Supervisory flash: User data */ - sflash_nar (rx) : ORIGIN = 0x16001A00, LENGTH = 0x200 /* Supervisory flash: Normal Access Restrictions (NAR) */ - sflash_public_key (rx) : ORIGIN = 0x16005A00, LENGTH = 0xC00 /* Supervisory flash: Public Key */ - sflash_toc_2 (rx) : ORIGIN = 0x16007C00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 */ - sflash_rtoc_2 (rx) : ORIGIN = 0x16007E00, LENGTH = 0x200 /* Supervisory flash: Table of Content # 2 Copy */ - xip (rx) : ORIGIN = 0x18000000, LENGTH = 0x8000000 /* 128 MB */ - efuse (r) : ORIGIN = 0x90700000, LENGTH = 0x100000 /* 1 MB */ -} - -/* Library configurations */ -GROUP(libgcc.a libc.a libm.a libnosys.a) - -/* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions FLASH and RAM. - * It references following symbols, which must be defined in code: - * Reset_Handler : Entry of reset handler - * - * It defines following symbols, which code can use without definition: - * __exidx_start - * __exidx_end - * __copy_table_start__ - * __copy_table_end__ - * __zero_table_start__ - * __zero_table_end__ - * __etext - * __data_start__ - * __preinit_array_start - * __preinit_array_end - * __init_array_start - * __init_array_end - * __fini_array_start - * __fini_array_end - * __data_end__ - * __bss_start__ - * __bss_end__ - * __end__ - * end - * __HeapLimit - * __StackLimit - * __StackTop - * __stack - * __Vectors_End - * __Vectors_Size - */ - - -SECTIONS -{ - /* Cortex-M0+ application flash image area */ - .cy_m0p_image ORIGIN(flash) : - { - . = ALIGN(4); - __cy_m0p_code_start = . ; - KEEP(*(.cy_m0p_image)) - __cy_m0p_code_end = . ; - } > flash - - /* Check if .cy_m0p_image size exceeds FLASH_CM0P_SIZE */ - ASSERT(__cy_m0p_code_end <= ORIGIN(flash) + FLASH_CM0P_SIZE, "CM0+ flash image overflows with CM4, increase FLASH_CM0P_SIZE") - - /* Cortex-M4 application flash area */ - .text ORIGIN(flash) + FLASH_CM0P_SIZE : - { - . = ALIGN(4); - __Vectors = . ; - KEEP(*(.vectors)) - . = ALIGN(4); - __Vectors_End = .; - __Vectors_Size = __Vectors_End - __Vectors; - __end__ = .; - - . = ALIGN(4); - *(.text*) - - KEEP(*(.init)) - KEEP(*(.fini)) - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - . = ALIGN(4); - /* Read-only code (constants). */ - *(.rodata .rodata.* .constdata .constdata.* .conststring .conststring.*) - KEEP(*(.eh_frame*)) - - /* section information for utest */ - . = ALIGN(4); - __rt_utest_tc_tab_start = .; - KEEP(*(UtestTcTab)) - __rt_utest_tc_tab_end = .; - - /* section information for finsh shell */ - . = ALIGN(4); - __fsymtab_start = .; - KEEP(*(FSymTab)) - __fsymtab_end = .; - . = ALIGN(4); - __vsymtab_start = .; - KEEP(*(VSymTab)) - __vsymtab_end = .; - . = ALIGN(4); - - /* section information for modules */ - . = ALIGN(4); - __rtmsymtab_start = .; - KEEP(*(RTMSymTab)) - __rtmsymtab_end = .; - - /* section information for initialization */ - . = ALIGN(4); - __rt_init_start = .; - KEEP(*(SORT(.rti_fn*))) - __rt_init_end = .; - - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - __exidx_start = .; - - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > flash - __exidx_end = .; - - - /* To copy multiple ROM to RAM sections, - * uncomment .copy.table section and, - * define __STARTUP_COPY_MULTIPLE in startup_psoc6_02_cm4.S */ - .copy.table : - { - . = ALIGN(4); - __copy_table_start__ = .; - - /* Copy interrupt vectors from flash to RAM */ - LONG (__Vectors) /* From */ - LONG (__ram_vectors_start__) /* To */ - LONG (__Vectors_End - __Vectors) /* Size */ - - /* Copy data section to RAM */ - LONG (__etext) /* From */ - LONG (__data_start__) /* To */ - LONG (__data_end__ - __data_start__) /* Size */ - - __copy_table_end__ = .; - } > flash - - . = ALIGN(4); - .ctors : - { - PROVIDE(__ctors_start__ = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - PROVIDE(__ctors_end__ = .); - } > flash - - . = ALIGN(4); - .dtors : - { - PROVIDE(__dtors_start__ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(__dtors_end__ = .); - } > flash - - /* To clear multiple BSS sections, - * uncomment .zero.table section and, - * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_psoc6_02_cm4.S */ - .zero.table : - { - . = ALIGN(4); - __zero_table_start__ = .; - LONG (__bss_start__) - LONG (__bss_end__ - __bss_start__) - __zero_table_end__ = .; - } > flash - - __etext = . ; - - .ramVectors (NOLOAD) : ALIGN(8) - { - __ram_vectors_start__ = .; - KEEP(*(.ram_vectors)) - __ram_vectors_end__ = .; - } > ram - - - .data __ram_vectors_end__ : - { - . = ALIGN(4); - __data_start__ = .; - - *(vtable) - *(.data*) - - . = ALIGN(4); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(4); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - . = ALIGN(4); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - KEEP(*(.jcr*)) - . = ALIGN(4); - - KEEP(*(.cy_ramfunc*)) - . = ALIGN(4); - - __data_end__ = .; - - } > ram AT>flash - - - /* Place variables in the section that should not be initialized during the - * device startup. - */ - .noinit (NOLOAD) : ALIGN(8) - { - KEEP(*(.noinit)) - } > ram - - - /* The uninitialized global or static variables are placed in this section. - * - * The NOLOAD attribute tells linker that .bss section does not consume - * any space in the image. The NOLOAD attribute changes the .bss type to - * NOBITS, and that makes linker to A) not allocate section in memory, and - * A) put information to clear the section with all zeros during application - * loading. - * - * Without the NOLOAD attribute, the .bss section might get PROGBITS type. - * This makes linker to A) allocate zeroed section in memory, and B) copy - * this section to RAM during application loading. - */ - .bss (NOLOAD): - { - . = ALIGN(4); - __bss_start__ = .; - *(.bss*) - *(COMMON) - . = ALIGN(4); - __bss_end__ = .; - } > ram - - - .heap (NOLOAD): - { - __HeapBase = .; - __end__ = .; - end = __end__; - KEEP(*(.heap*)) - . = ORIGIN(ram) + LENGTH(ram) - STACK_SIZE; - __HeapLimit = .; - } > ram - - - /* .stack_dummy section doesn't contains any symbols. It is only - * used for linker to calculate size of stack sections, and assign - * values to stack symbols later */ - .stack_dummy (NOLOAD): - { - KEEP(*(.stack*)) - } > ram - - - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(ram) + LENGTH(ram); - __StackLimit = __StackTop - SIZEOF(.stack_dummy); - PROVIDE(__stack = __StackTop); - - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") - - - /* Used for the digital signature of the secure application and the Bootloader SDK application. - * The size of the section depends on the required data size. */ - .cy_app_signature ORIGIN(flash) + LENGTH(flash) - 256 : - { - KEEP(*(.cy_app_signature)) - } > flash - - - /* Emulated EEPROM Flash area */ - .cy_em_eeprom : - { - KEEP(*(.cy_em_eeprom)) - } > em_eeprom - - - /* Supervisory Flash: User data */ - .cy_sflash_user_data : - { - KEEP(*(.cy_sflash_user_data)) - } > sflash_user_data - - /* Supervisory Flash: Normal Access Restrictions (NAR) */ - .cy_sflash_nar : - { - KEEP(*(.cy_sflash_nar)) - } > sflash_nar - - - /* Supervisory Flash: Public Key */ - .cy_sflash_public_key : - { - KEEP(*(.cy_sflash_public_key)) - } > sflash_public_key - - - /* Supervisory Flash: Table of Content # 2 */ - .cy_toc_part2 : - { - KEEP(*(.cy_toc_part2)) - } > sflash_toc_2 - - - /* Supervisory Flash: Table of Content # 2 Copy */ - .cy_rtoc_part2 : - { - KEEP(*(.cy_rtoc_part2)) - } > sflash_rtoc_2 - - - /* Places the code in the Execute in Place (XIP) section. See the smif driver - * documentation for details. - */ - cy_xip : - { - __cy_xip_start = .; - KEEP(*(.cy_xip)) - __cy_xip_end = .; - } > xip - - - /* eFuse */ - .cy_efuse : - { - KEEP(*(.cy_efuse)) - } > efuse - - - /* These sections are used for additional metadata (silicon revision, - * Silicon/JTAG ID, etc.) storage. - */ - .cymeta 0x90500000 : { KEEP(*(.cymeta)) } :NONE -} - - -/* The following symbols used by the cymcuelftool. */ -/* Flash */ -__cy_memory_0_start = 0x10000000; -__cy_memory_0_length = 0x00200000; -__cy_memory_0_row_size = 0x200; - -/* Emulated EEPROM Flash area */ -__cy_memory_1_start = 0x14000000; -__cy_memory_1_length = 0x8000; -__cy_memory_1_row_size = 0x200; - -/* Supervisory Flash */ -__cy_memory_2_start = 0x16000000; -__cy_memory_2_length = 0x8000; -__cy_memory_2_row_size = 0x200; - -/* XIP */ -__cy_memory_3_start = 0x18000000; -__cy_memory_3_length = 0x08000000; -__cy_memory_3_row_size = 0x200; - -/* eFuse */ -__cy_memory_4_start = 0x90700000; -__cy_memory_4_length = 0x100000; -__cy_memory_4_row_size = 1; - -/* EOF */ diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/board/linker_scripts/link.sct b/bsp/cypress/psoc6-cy8cproto-4343w/board/linker_scripts/link.sct deleted file mode 100644 index 4c3b188cc9..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/board/linker_scripts/link.sct +++ /dev/null @@ -1,277 +0,0 @@ -#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m4 -; The first line specifies a preprocessor command that the linker invokes -; to pass a scatter file through a C preprocessor. - -;******************************************************************************* -;* \file cy8c6xxa_cm4_dual.sct -;* \version 2.91 -;* -;* Linker file for the ARMCC. -;* -;* The main purpose of the linker script is to describe how the sections in the -;* input files should be mapped into the output file, and to control the memory -;* layout of the output file. -;* -;* \note The entry point location is fixed and starts at 0x10000000. The valid -;* application image should be placed there. -;* -;* \note The linker files included with the PDL template projects must be -;* generic and handle all common use cases. Your project may not use every -;* section defined in the linker files. In that case you may see the warnings -;* during the build process: L6314W (no section matches pattern) and/or L6329W -;* (pattern only matches removed unused sections). In your project, you can -;* suppress the warning by passing the "--diag_suppress=L6314W,L6329W" option to -;* the linker, simply comment out or remove the relevant code in the linker -;* file. -;* -;******************************************************************************* -;* \copyright -;* Copyright 2016-2021 Cypress Semiconductor Corporation -;* SPDX-License-Identifier: Apache-2.0 -;* -;* Licensed under the Apache License, Version 2.0 (the "License"); -;* you may not use this file except in compliance with the License. -;* You may obtain a copy of the License at -;* -;* http://www.apache.org/licenses/LICENSE-2.0 -;* -;* Unless required by applicable law or agreed to in writing, software -;* distributed under the License is distributed on an "AS IS" BASIS, -;* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -;* See the License for the specific language governing permissions and -;* limitations under the License. -;******************************************************************************/ - -; The defines below describe the location and size of blocks of memory in the target. -; Use these defines to specify the memory regions available for allocation. - -; The following defines control RAM and flash memory allocation for the CM4 core. -; You can change the memory allocation by editing RAM and Flash defines. -; Note that 2 KB of RAM (at the end of the SRAM) are reserved for system use. -; Using this memory region for other purposes will lead to unexpected behavior. -; Your changes must be aligned with the corresponding defines for CM0+ core in 'xx_cm0plus.scat', -; where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.scat'. -; RAM -#define RAM_START 0x08002000 -#define RAM_SIZE 0x000FD800 -; Flash -#define FLASH_START 0x10000000 -#define FLASH_SIZE 0x00200000 - -; The size of the stack section at the end of CM4 SRAM -#define STACK_SIZE 0x00001000 - -; By default, the COMPONENT_CM0P_SLEEP prebuilt image is used for the CM0p core. -; More about CM0+ prebuilt images, see here: -; https://github.com/cypresssemiconductorco/psoc6cm0p -; The size of the Cortex-M0+ application flash image -#define FLASH_CM0P_SIZE 0x2000 - -; The following defines describe a 32K flash region used for EEPROM emulation. -; This region can also be used as the general purpose flash. -; You can assign sections to this memory region for only one of the cores. -; Note some middleware (e.g. BLE, Emulated EEPROM) can place their data into this memory region. -; Therefore, repurposing this memory region will prevent such middleware from operation. -#define EM_EEPROM_START 0x14000000 -#define EM_EEPROM_SIZE 0x8000 - -; The following defines describe device specific memory regions and must not be changed. -; Supervisory flash: User data -#define SFLASH_USER_DATA_START 0x16000800 -#define SFLASH_USER_DATA_SIZE 0x00000800 - -; Supervisory flash: Normal Access Restrictions (NAR) -#define SFLASH_NAR_START 0x16001A00 -#define SFLASH_NAR_SIZE 0x00000200 - -; Supervisory flash: Public Key -#define SFLASH_PUBLIC_KEY_START 0x16005A00 -#define SFLASH_PUBLIC_KEY_SIZE 0x00000C00 - -; Supervisory flash: Table of Content # 2 -#define SFLASH_TOC_2_START 0x16007C00 -#define SFLASH_TOC_2_SIZE 0x00000200 - -; Supervisory flash: Table of Content # 2 Copy -#define SFLASH_RTOC_2_START 0x16007E00 -#define SFLASH_RTOC_2_SIZE 0x00000200 - -; External memory -#define XIP_START 0x18000000 -#define XIP_SIZE 0x08000000 - -; eFuse -#define EFUSE_START 0x90700000 -#define EFUSE_SIZE 0x100000 - - -; Cortex-M0+ application flash image area -LR_IROM FLASH_START FLASH_CM0P_SIZE -{ - .cy_m0p_image +0 FLASH_CM0P_SIZE - { - * (.cy_m0p_image) - } -} - -; Cortex-M4 application flash area -LR_IROM1 (FLASH_START + FLASH_CM0P_SIZE) (FLASH_SIZE - FLASH_CM0P_SIZE) -{ - ER_FLASH_VECTORS +0 - { - * (RESET, +FIRST) - } - - ER_FLASH_CODE +0 FIXED - { - * (InRoot$$Sections) - * (+RO) - } - - ER_RAM_VECTORS RAM_START UNINIT - { - * (RESET_RAM, +FIRST) - } - - RW_RAM_DATA +0 - { - * (.cy_ramfunc) - * (+RW, +ZI) - } - - ; Place variables in the section that should not be initialized during the - ; device startup. - RW_IRAM1 +0 UNINIT - { - * (.noinit) - } - - ; Application heap area (HEAP) - ARM_LIB_HEAP +0 EMPTY ((RAM_START+RAM_SIZE)-AlignExpr(ImageLimit(RW_IRAM1), 8)-STACK_SIZE) - { - } - - ; Stack region growing down - ARM_LIB_STACK (RAM_START+RAM_SIZE) EMPTY -STACK_SIZE - { - } - - ; Used for the digital signature of the secure application and the - ; Bootloader SDK application. The size of the section depends on the required - ; data size. - .cy_app_signature (FLASH_START + FLASH_SIZE - 256) 256 - { - * (.cy_app_signature) - } -} - - -; Emulated EEPROM Flash area -LR_EM_EEPROM EM_EEPROM_START EM_EEPROM_SIZE -{ - .cy_em_eeprom +0 - { - * (.cy_em_eeprom) - } -} - -; Supervisory flash: User data -LR_SFLASH_USER_DATA SFLASH_USER_DATA_START SFLASH_USER_DATA_SIZE -{ - .cy_sflash_user_data +0 - { - * (.cy_sflash_user_data) - } -} - -; Supervisory flash: Normal Access Restrictions (NAR) -LR_SFLASH_NAR SFLASH_NAR_START SFLASH_NAR_SIZE -{ - .cy_sflash_nar +0 - { - * (.cy_sflash_nar) - } -} - -; Supervisory flash: Public Key -LR_SFLASH_PUBLIC_KEY SFLASH_PUBLIC_KEY_START SFLASH_PUBLIC_KEY_SIZE -{ - .cy_sflash_public_key +0 - { - * (.cy_sflash_public_key) - } -} - -; Supervisory flash: Table of Content # 2 -LR_SFLASH_TOC_2 SFLASH_TOC_2_START SFLASH_TOC_2_SIZE -{ - .cy_toc_part2 +0 - { - * (.cy_toc_part2) - } -} - -; Supervisory flash: Table of Content # 2 Copy -LR_SFLASH_RTOC_2 SFLASH_RTOC_2_START SFLASH_RTOC_2_SIZE -{ - .cy_rtoc_part2 +0 - { - * (.cy_rtoc_part2) - } -} - - -; Places the code in the Execute in Place (XIP) section. See the smif driver documentation for details. -LR_EROM XIP_START XIP_SIZE -{ - cy_xip +0 - { - * (.cy_xip) - } -} - - -; eFuse -LR_EFUSE EFUSE_START EFUSE_SIZE -{ - .cy_efuse +0 - { - * (.cy_efuse) - } -} - - -; The section is used for additional metadata (silicon revision, Silicon/JTAG ID, etc.) storage. -CYMETA 0x90500000 -{ - .cymeta +0 { * (.cymeta) } -} - -/* The following symbols used by the cymcuelftool. */ -/* Flash */ -#define __cy_memory_0_start 0x10000000 -#define __cy_memory_0_length 0x00200000 -#define __cy_memory_0_row_size 0x200 - -/* Emulated EEPROM Flash area */ -#define __cy_memory_1_start 0x14000000 -#define __cy_memory_1_length 0x8000 -#define __cy_memory_1_row_size 0x200 - -/* Supervisory Flash */ -#define __cy_memory_2_start 0x16000000 -#define __cy_memory_2_length 0x8000 -#define __cy_memory_2_row_size 0x200 - -/* XIP */ -#define __cy_memory_3_start 0x18000000 -#define __cy_memory_3_length 0x08000000 -#define __cy_memory_3_row_size 0x200 - -/* eFuse */ -#define __cy_memory_4_start 0x90700000 -#define __cy_memory_4_length 0x100000 -#define __cy_memory_4_row_size 1 - - -/* [] END OF FILE */ diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/board/ports/drv_rw007.c b/bsp/cypress/psoc6-cy8cproto-4343w/board/ports/drv_rw007.c deleted file mode 100644 index c4c5211c58..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/board/ports/drv_rw007.c +++ /dev/null @@ -1,67 +0,0 @@ -#include -#include -#ifdef BSP_USING_RW007 -#include -#include -#include -#include - -extern void spi_wifi_isr(int vector); - -static void rw007_gpio_init(void) -{ - /* Configure IO */ - rt_pin_mode(IFX_RW007_RST_PIN, PIN_MODE_OUTPUT); - rt_pin_mode(IFX_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLDOWN); - - /* Reset rw007 and config mode */ - rt_pin_write(IFX_RW007_RST_PIN, PIN_LOW); - rt_thread_delay(rt_tick_from_millisecond(100)); - rt_pin_write(IFX_RW007_RST_PIN, PIN_HIGH); - - /* Wait rw007 ready(exit busy stat) */ - while (!rt_pin_read(IFX_RW007_INT_BUSY_PIN)) - { - rt_thread_delay(5); - } - - rt_thread_delay(rt_tick_from_millisecond(200)); - rt_pin_mode(IFX_RW007_INT_BUSY_PIN, PIN_MODE_INPUT_PULLUP); -} - -static struct rt_spi_device rw007_dev; - -int wifi_spi_device_init(void) -{ - char sn_version[32]; - uint32_t cs_pin = IFX_RW007_CS_PIN; - - rw007_gpio_init(); - rt_hw_spi_device_attach(IFX_RW007_SPI_BUS_NAME, "wspi", cs_pin); - rt_hw_wifi_init("wspi"); - - rt_wlan_set_mode(RT_WLAN_DEVICE_STA_NAME, RT_WLAN_STATION); - rt_wlan_set_mode(RT_WLAN_DEVICE_AP_NAME, RT_WLAN_AP); - - rw007_sn_get(sn_version); - rt_kprintf("\nrw007 sn: [%s]\n", sn_version); - rw007_version_get(sn_version); - rt_kprintf("rw007 ver: [%s]\n\n", sn_version); - - return 0; -} -INIT_APP_EXPORT(wifi_spi_device_init); - -static void int_wifi_irq(void *p) -{ - ((void)p); - spi_wifi_isr(0); -} - -void spi_wifi_hw_init(void) -{ - rt_pin_attach_irq(IFX_RW007_INT_BUSY_PIN, PIN_IRQ_MODE_FALLING, int_wifi_irq, 0); - rt_pin_irq_enable(IFX_RW007_INT_BUSY_PIN, RT_TRUE); -} - -#endif /* BSP_USING_RW007 */ diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/board/ports/fal_cfg.h b/bsp/cypress/psoc6-cy8cproto-4343w/board/ports/fal_cfg.h deleted file mode 100644 index 5714812ab2..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/board/ports/fal_cfg.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2022-07-27 Rbb666 first version - */ - -#ifndef _FAL_CFG_H_ -#define _FAL_CFG_H_ - -#include -#include - -extern const struct fal_flash_dev ifx_onchip_flash_32k; -extern const struct fal_flash_dev ifx_onchip_flash_256k; - -/* flash device table */ -#define FAL_FLASH_DEV_TABLE \ - { \ - &ifx_onchip_flash_32k, \ - &ifx_onchip_flash_256k, \ - } -/* ====================== Partition Configuration ========================== */ -#ifdef FAL_PART_HAS_TABLE_CFG - -/* partition table */ -#define FAL_PART_TABLE \ - { \ - {FAL_PART_MAGIC_WROD, "param", "onchip_flash_32k", 0, IFX_EFLASH_SIZE, 0}, \ - {FAL_PART_MAGIC_WROD, "app", "onchip_flash_256k", 0, IFX_FLASH_SIZE, 0}, \ - } - -#endif /* FAL_PART_HAS_TABLE_CFG */ -#endif /* _FAL_CFG_H_ */ diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/board/ports/slider_sample.c b/bsp/cypress/psoc6-cy8cproto-4343w/board/ports/slider_sample.c deleted file mode 100644 index 6f2066dd6c..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/board/ports/slider_sample.c +++ /dev/null @@ -1,243 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2022-07-28 Rbb666 first version - */ - -#include -#include "drv_common.h" - -#ifdef BSP_USING_SLIDER -#include "cycfg_capsense.h" - -#define CAPSENSE_INTR_PRIORITY (7u) -#define EZI2C_INTR_PRIORITY (6u) - -/* Allowed duty cycle for maximum brightness */ -#define LED_MAX_BRIGHTNESS (100u) - -/* Allowed duty cycle for minimum brightness*/ -#define LED_MIN_BRIGHTNESS (0u) - -#define GET_DUTY_CYCLE(x) (1 * 1000 * 1000 - x * 10 * 1000) - -typedef enum -{ - LED_OFF, - LED_ON -} led_state_t; - -typedef struct -{ - led_state_t state; - uint32_t brightness; -} led_data_t; - -static rt_sem_t trans_done_semphr = RT_NULL; - -#ifndef RT_USING_PWM - #error You need enable PWM to use this sample -#else - #define PWM_DEV_NAME "pwm0" - #define PWM_DEV_CHANNEL 3 - static struct rt_device_pwm *pwm_dev; -#endif - -static void capsense_isr(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - Cy_CapSense_InterruptHandler(CYBSP_CSD_HW, &cy_capsense_context); - - /* leave interrupt */ - rt_interrupt_leave(); -} - -void capsense_callback(cy_stc_active_scan_sns_t *ptrActiveScan) -{ - rt_sem_release(trans_done_semphr); -} - -static uint32_t initialize_capsense(void) -{ - uint32_t status = CYRET_SUCCESS; - - /* CapSense interrupt configuration parameters */ - static const cy_stc_sysint_t capSense_intr_config = - { - .intrSrc = csd_interrupt_IRQn, - .intrPriority = CAPSENSE_INTR_PRIORITY, - }; - - /* Capture the CSD HW block and initialize it to the default state. */ - status = Cy_CapSense_Init(&cy_capsense_context); - if (CYRET_SUCCESS != status) - { - return status; - } - - /* Initialize CapSense interrupt */ - cyhal_system_set_isr(csd_interrupt_IRQn, csd_interrupt_IRQn, CAPSENSE_INTR_PRIORITY, &capsense_isr); - NVIC_ClearPendingIRQ(capSense_intr_config.intrSrc); - NVIC_EnableIRQ(capSense_intr_config.intrSrc); - - /* Initialize the CapSense firmware modules. */ - status = Cy_CapSense_Enable(&cy_capsense_context); - if (CYRET_SUCCESS != status) - { - return status; - } - - /* Assign a callback function to indicate end of CapSense scan. */ - status = Cy_CapSense_RegisterCallback(CY_CAPSENSE_END_OF_SCAN_E, - capsense_callback, &cy_capsense_context); - if (CYRET_SUCCESS != status) - { - return status; - } - - return status; -} - -void Slider_Init(void) -{ - cy_rslt_t result; - - result = initialize_capsense(); - - if (CYRET_SUCCESS != result) - { - /* Halt the CPU if CapSense initialization failed */ - RT_ASSERT(0); - } - - /* Initiate first scan */ - Cy_CapSense_ScanAllWidgets(&cy_capsense_context); - - trans_done_semphr = rt_sem_create("slider_sem", 1, RT_IPC_FLAG_PRIO); - if (trans_done_semphr == RT_NULL) - { - rt_kprintf("create transform done semphr failed.\n"); - RT_ASSERT(0); - return; - } - -#ifdef BSP_USING_PWM0_PORT13 - /* Initiate PWM*/ - pwm_dev = (struct rt_device_pwm *)rt_device_find(PWM_DEV_NAME); - - if (pwm_dev == RT_NULL) - { - rt_kprintf("PWM init failed! can't find %s device!\n", PWM_DEV_NAME); - RT_ASSERT(0); - } - - /*default period:1ms pulse:0*/ - rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, 1 * 1000 * 1000, 1 * 1000 * 1000); - rt_pwm_enable(pwm_dev, PWM_DEV_CHANNEL); -#endif -} - -void update_led_state(led_data_t *ledData) -{ - if (ledData->brightness >= 0) - { - uint32_t brightness = (ledData->brightness < LED_MIN_BRIGHTNESS) ? LED_MIN_BRIGHTNESS : ledData->brightness; - - /* Drive the LED with brightness */ - rt_pwm_set(pwm_dev, PWM_DEV_CHANNEL, 1 * 1000 * 1000, GET_DUTY_CYCLE(brightness)); - } -} - -static void process_touch(void) -{ - cy_stc_capsense_touch_t *slider_touch_info; - uint16_t slider_pos; - uint8_t slider_touch_status; - bool led_update_req = false; - - static uint16_t slider_pos_prev; - static led_data_t led_data = {LED_ON, LED_MAX_BRIGHTNESS}; - - /* Get slider status */ - slider_touch_info = Cy_CapSense_GetTouchInfo( - CY_CAPSENSE_LINEARSLIDER0_WDGT_ID, &cy_capsense_context); - slider_touch_status = slider_touch_info->numPosition; - slider_pos = slider_touch_info->ptrPosition->x; - - /* Detect the new touch on slider */ - if ((RT_NULL != slider_touch_status) && - (slider_pos != slider_pos_prev)) - { - led_data.brightness = (slider_pos * 100) - / cy_capsense_context.ptrWdConfig[CY_CAPSENSE_LINEARSLIDER0_WDGT_ID].xResolution; - - led_update_req = true; - } - -#ifndef RT_USING_PWM -#error You need enable PWM to use this sample -#else - /* Update the LED state if requested */ - if (led_update_req) - { - update_led_state(&led_data); - } -#endif - slider_pos_prev = slider_pos; -} - -static void Slider_thread_entry(void *parameter) -{ - Slider_Init(); - - for (;;) - { - rt_sem_take(trans_done_semphr, RT_WAITING_FOREVER); - - /* Process all widgets */ - Cy_CapSense_ProcessAllWidgets(&cy_capsense_context); - - /* Process touch input */ - process_touch(); - - /* Establishes synchronized operation between the CapSense - * middleware and the CapSense Tuner tool. - */ - Cy_CapSense_RunTuner(&cy_capsense_context); - - /* Initiate next scan */ - Cy_CapSense_ScanAllWidgets(&cy_capsense_context); - - rt_thread_mdelay(50); - } -} - -int Slider_ctrl_sample(void) -{ - rt_err_t ret = RT_EOK; - - rt_thread_t thread = rt_thread_create("slider_th", - Slider_thread_entry, - RT_NULL, - 1024, - 25, - 10); - if (thread != RT_NULL) - { - rt_thread_startup(thread); - } - else - { - ret = RT_ERROR; - } - - return ret; -} -MSH_CMD_EXPORT(Slider_ctrl_sample, Slider sample to ctrl led); -#endif diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/board/ports/spi_sample.c b/bsp/cypress/psoc6-cy8cproto-4343w/board/ports/spi_sample.c deleted file mode 100644 index 004acefda1..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/board/ports/spi_sample.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2022-07-19 Rbbb666 first version - */ - -#include "board.h" - -#if defined(BSP_USING_SPI3_SAMPLE) -#include - -#define SPI_NAME "spi30" -static struct rt_spi_device *spi_dev = RT_NULL; - -/* attach spi5 device */ -static int rt_spi_device_init(void) -{ - struct rt_spi_configuration cfg; - - rt_hw_spi_device_attach("spi3", "spi30", NULL); - - cfg.data_width = 8; - cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_0 | RT_SPI_MSB | RT_SPI_NO_CS; - cfg.max_hz = 1 *1000 *1000; - - spi_dev = (struct rt_spi_device *)rt_device_find(SPI_NAME); - - if (RT_NULL == spi_dev) - { - rt_kprintf("spi sample run failed! can't find %s device!\n", SPI_NAME); - return RT_ERROR; - } - - rt_spi_configure(spi_dev, &cfg); - - return RT_EOK; -} -INIT_APP_EXPORT(rt_spi_device_init); - -/* spi5 loopback mode test case */ -static int spi_sample(int argc, char **argv) -{ - rt_uint8_t t_buf[8], r_buf[8]; - int i = 0; - static struct rt_spi_message msg1; - - if (argc != 9) - { - rt_kprintf("Please Usage:\n"); - rt_kprintf("spi_sample 1 2 3 4 5 6 7 8\n"); - return -RT_ERROR; - } - - for (i = 0; i < 8; i++) - { - t_buf[i] = atoi(argv[i+1]); - } - - msg1.send_buf = &t_buf; - msg1.recv_buf = &r_buf; - msg1.length = sizeof(t_buf); - msg1.cs_take = 1; - msg1.cs_release = 0; - msg1.next = RT_NULL; - - rt_spi_transfer_message(spi_dev, &msg1); - - rt_kprintf("spi rbuf : "); - for (i = 0; i < sizeof(t_buf); i++) - { - rt_kprintf("%x ", r_buf[i]); - } - - rt_kprintf("\nspi loopback mode test over!\n"); - - return RT_EOK; -} -MSH_CMD_EXPORT(spi_sample, spi loopback test); - -#endif /* BSP_USING_SPI3 */ diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/figures/board.png b/bsp/cypress/psoc6-cy8cproto-4343w/figures/board.png deleted file mode 100644 index 2f88f25d5b..0000000000 Binary files a/bsp/cypress/psoc6-cy8cproto-4343w/figures/board.png and /dev/null differ diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/figures/mdk_package.png b/bsp/cypress/psoc6-cy8cproto-4343w/figures/mdk_package.png deleted file mode 100644 index 230574a87b..0000000000 Binary files a/bsp/cypress/psoc6-cy8cproto-4343w/figures/mdk_package.png and /dev/null differ diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/figures/studio1.png b/bsp/cypress/psoc6-cy8cproto-4343w/figures/studio1.png deleted file mode 100644 index 85c4bdc662..0000000000 Binary files a/bsp/cypress/psoc6-cy8cproto-4343w/figures/studio1.png and /dev/null differ diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/figures/studio2.png b/bsp/cypress/psoc6-cy8cproto-4343w/figures/studio2.png deleted file mode 100644 index 1ce0690138..0000000000 Binary files a/bsp/cypress/psoc6-cy8cproto-4343w/figures/studio2.png and /dev/null differ diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/figures/studio3-build.png b/bsp/cypress/psoc6-cy8cproto-4343w/figures/studio3-build.png deleted file mode 100644 index 5019c1d219..0000000000 Binary files a/bsp/cypress/psoc6-cy8cproto-4343w/figures/studio3-build.png and /dev/null differ diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/figures/studio4-download.png b/bsp/cypress/psoc6-cy8cproto-4343w/figures/studio4-download.png deleted file mode 100644 index 526e134dc7..0000000000 Binary files a/bsp/cypress/psoc6-cy8cproto-4343w/figures/studio4-download.png and /dev/null differ diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/makefile.targets b/bsp/cypress/psoc6-cy8cproto-4343w/makefile.targets deleted file mode 100644 index a5e80b985b..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/makefile.targets +++ /dev/null @@ -1,6 +0,0 @@ -clean2: - -$(RM) $(CC_DEPS)$(C++_DEPS)$(C_UPPER_DEPS)$(CXX_DEPS)$(SECONDARY_FLASH)$(SECONDARY_SIZE)$(ASM_DEPS)$(S_UPPER_DEPS)$(C_DEPS)$(CPP_DEPS) - -$(RM) $(OBJS) *.elf - -@echo ' ' - -*.elf: $(wildcard ../board/linker_scripts/link.ld) diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/project.uvoptx b/bsp/cypress/psoc6-cy8cproto-4343w/project.uvoptx deleted file mode 100644 index a2338a7b0a..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/project.uvoptx +++ /dev/null @@ -1,184 +0,0 @@ - - - - 1.0 - -
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### uVision Project, (C) Keil Software
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- - - - cy_syslib_mdk.S - 2 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\TOOLCHAIN_ARM\cy_syslib_mdk.S - - - - - board.c - 1 - board\board.c - - - - - drv_common.c - 1 - ..\libraries\HAL_Drivers\drv_common.c - - - - - drv_gpio.c - 1 - ..\libraries\HAL_Drivers\drv_gpio.c - - - - - drv_uart.c - 1 - ..\libraries\HAL_Drivers\drv_uart.c - - - - - Finsh - - - shell.c - 1 - ..\..\..\components\finsh\shell.c - - - - - msh.c - 1 - ..\..\..\components\finsh\msh.c - - - - - msh_parse.c - 1 - ..\..\..\components\finsh\msh_parse.c - - - - - cmd.c - 1 - ..\..\..\components\finsh\cmd.c - - - - - Kernel - - - clock.c - 1 - ..\..\..\src\clock.c - - - - - components.c - 1 - ..\..\..\src\components.c - - - - - device.c - 1 - ..\..\..\src\device.c - - - - - idle.c - 1 - ..\..\..\src\idle.c - - - - - ipc.c - 1 - ..\..\..\src\ipc.c - - - - - irq.c - 1 - ..\..\..\src\irq.c - - - - - kservice.c - 1 - ..\..\..\src\kservice.c - - - - - mem.c - 1 - ..\..\..\src\mem.c - - - - - mempool.c - 1 - ..\..\..\src\mempool.c - - - - - object.c - 1 - ..\..\..\src\object.c - - - - - scheduler.c - 1 - ..\..\..\src\scheduler.c - - - - - thread.c - 1 - ..\..\..\src\thread.c - - - - - timer.c - 1 - ..\..\..\src\timer.c - - - - - Libraries - - - psoc6_03_cm0p_sleep.c - 1 - ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_03_cm0p_sleep.c - - - - - cy_sysint.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_sysint.c - - - - - cyhal_triggers_psoc6_02.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\COMPONENT_CAT1A\source\triggers\cyhal_triggers_psoc6_02.c - - - - - cy_retarget_io.c - 1 - ..\libraries\IFX_PSOC6_HAL\retarget-io\cy_retarget_io.c - - - - - cy_scb_i2c.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_scb_i2c.c - - - - - cy_gpio.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_gpio.c - - - - - cyhal_scb_common.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_scb_common.c - - - - - system_psoc6_cm4.c - 1 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_CM4\system_psoc6_cm4.c - - - - - cyhal_clock.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_clock.c - - - - - cy_scb_uart.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_scb_uart.c - - - - - cyhal_psoc6_02_124_bga.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\COMPONENT_CAT1A\source\pin_packages\cyhal_psoc6_02_124_bga.c - - - - - cybsp.c - 1 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\cybsp.c - - - - - cy_scb_common.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_scb_common.c - - - - - cy_prot.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_prot.c - - - - - cyhal_gpio.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_gpio.c - - - - - cyhal_system.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_system.c - - - - - cy_ipc_sema.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_ipc_sema.c - - - - - cyhal_utils_psoc.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_utils_psoc.c - - - - - cyhal_utils.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_utils.c - - - - - cy_ipc_drv.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_ipc_drv.c - - - - - cyhal_hwmgr.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_hwmgr.c - - - - - cy_syslib.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_syslib.c - - - - - cycfg_system.c - 1 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_system.c - - - - - cycfg_peripherals.c - 1 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_peripherals.c - - - - - cy_syspm.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_syspm.c - - - - - cyhal_lptimer.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_lptimer.c - - - - - cyhal_irq_psoc.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_irq_psoc.c - - - - - cy_mcwdt.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_mcwdt.c - - - - - cy_sysclk.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_sysclk.c - - - - - cyhal_syspm.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_syspm.c - - - - - psoc6_04_cm0p_sleep.c - 1 - ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_04_cm0p_sleep.c - - - - - cycfg_pins.c - 1 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_pins.c - - - - - cyhal_uart.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_uart.c - - - - - cy_systick.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_systick.c - - - - - cycfg.c - 1 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg.c - - - - - cyhal_interconnect.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-hal-cat1\source\cyhal_interconnect.c - - - - - cy_trigmux.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_trigmux.c - - - - - psoc6_02_cm0p_sleep.c - 1 - ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_02_cm0p_sleep.c - - - - - cy_device.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\devices\COMPONENT_CAT1A\source\cy_device.c - - - - - cycfg_routing.c - 1 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_routing.c - - - - - lib_cy_capsense.lib - 4 - ..\libraries\IFX_PSOC6_HAL\lib\cy_capsense.lib - - - - - cycfg_clocks.c - 1 - ..\libraries\IFX_PSOC6_HAL\TARGET_CY8CKIT-062S2-43012\COMPONENT_BSP_DESIGN_MODUS\GeneratedSource\cycfg_clocks.c - - - - - cy_ipc_pipe.c - 1 - ..\libraries\IFX_PSOC6_HAL\mtb-pdl-cat1\drivers\source\cy_ipc_pipe.c - - - - - psoc6_01_cm0p_sleep.c - 1 - ..\libraries\IFX_PSOC6_HAL\psoc6cm0p\COMPONENT_CM0P_SLEEP\psoc6_01_cm0p_sleep.c - - - - - - - - - - - - diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/rtconfig.h b/bsp/cypress/psoc6-cy8cproto-4343w/rtconfig.h deleted file mode 100644 index f708915474..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/rtconfig.h +++ /dev/null @@ -1,212 +0,0 @@ -#ifndef RT_CONFIG_H__ -#define RT_CONFIG_H__ - -/* Automatically generated file; DO NOT EDIT. */ -/* RT-Thread Configuration */ - -/* RT-Thread Kernel */ - -#define RT_NAME_MAX 8 -#define RT_ALIGN_SIZE 4 -#define RT_THREAD_PRIORITY_32 -#define RT_THREAD_PRIORITY_MAX 32 -#define RT_TICK_PER_SECOND 1000 -#define RT_USING_OVERFLOW_CHECK -#define RT_USING_HOOK -#define RT_HOOK_USING_FUNC_PTR -#define RT_USING_IDLE_HOOK -#define RT_IDLE_HOOK_LIST_SIZE 4 -#define IDLE_THREAD_STACK_SIZE 256 -#define RT_USING_TIMER_SOFT -#define RT_TIMER_THREAD_PRIO 4 -#define RT_TIMER_THREAD_STACK_SIZE 512 - -/* kservice optimization */ - -#define RT_KSERVICE_USING_STDLIB -#define RT_DEBUG - -/* Inter-Thread communication */ - -#define RT_USING_SEMAPHORE -#define RT_USING_MUTEX -#define RT_USING_EVENT -#define RT_USING_MAILBOX -#define RT_USING_MESSAGEQUEUE - -/* Memory Management */ - -#define RT_USING_MEMPOOL -#define RT_USING_SMALL_MEM -#define RT_USING_SMALL_MEM_AS_HEAP -#define RT_USING_HEAP - -/* Kernel Device Object */ - -#define RT_USING_DEVICE -#define RT_USING_CONSOLE -#define RT_CONSOLEBUF_SIZE 128 -#define RT_CONSOLE_DEVICE_NAME "uart5" -#define RT_VER_NUM 0x40101 -#define ARCH_ARM -#define RT_USING_CPU_FFS -#define ARCH_ARM_CORTEX_M -#define ARCH_ARM_CORTEX_M4 - -/* RT-Thread Components */ - -#define RT_USING_COMPONENTS_INIT -#define RT_USING_USER_MAIN -#define RT_MAIN_THREAD_STACK_SIZE 2048 -#define RT_MAIN_THREAD_PRIORITY 10 -#define RT_USING_MSH -#define RT_USING_FINSH -#define FINSH_USING_MSH -#define FINSH_THREAD_NAME "tshell" -#define FINSH_THREAD_PRIORITY 20 -#define FINSH_THREAD_STACK_SIZE 4096 -#define FINSH_USING_HISTORY -#define FINSH_HISTORY_LINES 5 -#define FINSH_USING_SYMTAB -#define FINSH_CMD_SIZE 80 -#define MSH_USING_BUILT_IN_COMMANDS -#define FINSH_USING_DESCRIPTION -#define FINSH_ARG_MAX 10 - -/* Device Drivers */ - -#define RT_USING_DEVICE_IPC -#define RT_USING_SERIAL -#define RT_USING_SERIAL_V1 -#define RT_SERIAL_USING_DMA -#define RT_SERIAL_RB_BUFSZ 64 -#define RT_USING_PIN - -/* Using USB */ - - -/* C/C++ and POSIX layer */ - -#define RT_LIBC_DEFAULT_TIMEZONE 8 - -/* POSIX (Portable Operating System Interface) layer */ - - -/* Interprocess Communication (IPC) */ - - -/* Socket is in the 'Network' category */ - - -/* Network */ - - -/* Utilities */ - - -/* RT-Thread Utestcases */ - - -/* RT-Thread online packages */ - -/* IoT - internet of things */ - - -/* Wi-Fi */ - -/* Marvell WiFi */ - - -/* Wiced WiFi */ - - -/* IoT Cloud */ - - -/* security packages */ - - -/* language packages */ - -/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ - - -/* XML: Extensible Markup Language */ - - -/* multimedia packages */ - -/* LVGL: powerful and easy-to-use embedded GUI library */ - - -/* u8g2: a monochrome graphic library */ - - -/* PainterEngine: A cross-platform graphics application framework written in C language */ - - -/* tools packages */ - - -/* system packages */ - -/* enhanced kernel services */ - - -/* acceleration: Assembly language or algorithmic acceleration packages */ - - -/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ - - -/* Micrium: Micrium software products porting for RT-Thread */ - - -/* peripheral libraries and drivers */ - - -/* Kendryte SDK */ - - -/* AI packages */ - - -/* miscellaneous packages */ - -/* project laboratory */ - -/* samples: kernel and components samples */ - - -/* entertainment: terminal games and other interesting software packages */ - - -/* Privated Packages of RealThread */ - - -/* Network Utilities */ - - -/* RT-Thread Smart */ - -#define SOC_FAMILY_IFX -#define SOC_SERIES_IFX_PSOC6 - -/* Hardware Drivers Config */ - -#define SOC_IFX_PSOC6_43012 - -/* Onboard Peripheral Drivers */ - -#define BSP_USING_USB_TO_USART - -/* On-chip Peripheral Drivers */ - -#define BSP_USING_GPIO -#define BSP_USING_UART -#define BSP_USING_UART5 - -/* Board extended module Drivers */ - - -#endif diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/rtconfig.py b/bsp/cypress/psoc6-cy8cproto-4343w/rtconfig.py deleted file mode 100644 index 25e6679827..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/rtconfig.py +++ /dev/null @@ -1,135 +0,0 @@ -import os - -# toolchains options -ARCH='arm' -CPU='cortex-m4' -CROSS_TOOL='gcc' - -# bsp lib config -BSP_LIBRARY_TYPE = None - -if os.getenv('RTT_CC'): - CROSS_TOOL = os.getenv('RTT_CC') -if os.getenv('RTT_ROOT'): - RTT_ROOT = os.getenv('RTT_ROOT') - -# cross_tool provides the cross compiler -# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR -if CROSS_TOOL == 'gcc': - PLATFORM = 'gcc' - EXEC_PATH = r'C:\Users\XXYYZZ' -elif CROSS_TOOL == 'keil': - PLATFORM = 'armclang' - EXEC_PATH = r'C:/Keil_v5' -elif CROSS_TOOL == 'iar': - PLATFORM = 'iccarm' - EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.3' - -if os.getenv('RTT_EXEC_PATH'): - EXEC_PATH = os.getenv('RTT_EXEC_PATH') - -BUILD = 'debug' - -if PLATFORM == 'gcc': - # toolchains - PREFIX = 'arm-none-eabi-' - CC = PREFIX + 'gcc' - AS = PREFIX + 'gcc' - AR = PREFIX + 'ar' - CXX = PREFIX + 'g++' - LINK = PREFIX + 'gcc' - TARGET_EXT = 'elf' - SIZE = PREFIX + 'size' - OBJDUMP = PREFIX + 'objdump' - OBJCPY = PREFIX + 'objcopy' - - DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections' - CFLAGS = DEVICE + ' -Dgcc' - AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' - LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.ld' - - CPATH = '' - LPATH = '' - - if BUILD == 'debug': - CFLAGS += ' -O0 -gdwarf-2 -g' - AFLAGS += ' -gdwarf-2' - else: - CFLAGS += ' -O2' - - CXXFLAGS = CFLAGS - - POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' - -elif PLATFORM == 'armcc': - # toolchains - CC = 'armcc' - CXX = 'armcc' - AS = 'armasm' - AR = 'armar' - LINK = 'armlink' - TARGET_EXT = 'axf' - - DEVICE = ' --cpu Cortex-M4.fp ' - CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' - AFLAGS = DEVICE + ' --apcs=interwork ' - LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict' - CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' - LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' - - CFLAGS += ' -D__MICROLIB ' - AFLAGS += ' --pd "__MICROLIB SETA 1" ' - LFLAGS += ' --library_type=microlib ' - EXEC_PATH += '/ARM/ARMCC/bin/' - - if BUILD == 'debug': - CFLAGS += ' -g -O0' - AFLAGS += ' -g' - else: - CFLAGS += ' -O2' - - CXXFLAGS = CFLAGS - CFLAGS += ' -std=c99' - - POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' - -elif PLATFORM == 'armclang': - # toolchains - CC = 'armclang' - CXX = 'armclang' - AS = 'armasm' - AR = 'armar' - LINK = 'armlink' - TARGET_EXT = 'axf' - - DEVICE = ' --cpu Cortex-M4.fp ' - CFLAGS = ' --target=arm-arm-none-eabi -mcpu=cortex-m4 ' - CFLAGS += ' -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 ' - CFLAGS += ' -mfloat-abi=hard -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar ' - CFLAGS += ' -gdwarf-3 -ffunction-sections ' - AFLAGS = DEVICE + ' --apcs=interwork ' - LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers ' - LFLAGS += ' --list rt-thread.map ' - LFLAGS += r' --strict --scatter "board\linker_scripts\link.sct" ' - CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCLANG/include' - LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCLANG/lib' - - EXEC_PATH += '/ARM/ARMCLANG/bin/' - - if BUILD == 'debug': - CFLAGS += ' -g -O1' # armclang recommend - AFLAGS += ' -g' - else: - CFLAGS += ' -O2' - - CXXFLAGS = CFLAGS - CFLAGS += ' -std=c99' - - POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' - -def dist_handle(BSP_ROOT, dist_dir): - import sys - cwd_path = os.getcwd() - sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) - from sdk_dist import dist_do_building - dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/template.uvoptx b/bsp/cypress/psoc6-cy8cproto-4343w/template.uvoptx deleted file mode 100644 index a2338a7b0a..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/template.uvoptx +++ /dev/null @@ -1,184 +0,0 @@ - - - - 1.0 - -
### uVision Project, (C) Keil Software
- - - *.c - *.s*; *.src; *.a* - *.obj; *.o - *.lib - *.txt; *.h; *.inc; *.md - *.plm - *.cpp; *.cc; *.cxx - 0 - - - - 0 - 0 - - - - rtthread - 0x4 - ARM-ADS - - 12000000 - - 1 - 1 - 0 - 1 - 0 - - - 1 - 65535 - 0 - 0 - 0 - - - 79 - 66 - 8 - .\build\keil\List\ - - - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 0 - 0 - 0 - 0 - - - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - - - 0 - 0 - 1 - - 10 - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 1 - 1 - 0 - 0 - 1 - 0 - 0 - 3 - - - - - - - - - - - BIN\CMSIS_AGDI.dll - - - - 0 - CMSIS_AGDI - -X"Any" -UAny -O206 -S8 -C0 -P00000002 -N00("") -D00(00000000) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD8026400 -FC8000 -FN5 -FF0CY8C6xxA_SFLASH_TOC2.FLM -FS016007C00 -FL0400 -FP0($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_TOC2.FLM) -FF1CY8C6xxA_SFLASH_PKEY.FLM -FS116005A00 -FL1C00 -FP1($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_PKEY.FLM) -FF2CY8C6xxA_SFLASH_USER.FLM -FS216000800 -FL2800 -FP2($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_USER.FLM) -FF3CY8C6xxA_WFLASH.FLM -FS314000000 -FL38000 -FP3($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_WFLASH.FLM) -FF4CY8C6xxA_sect256KB.FLM -FS410000000 -FL4200000 -FP4($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_sect256KB.FLM) - - - 0 - UL2CM3 - UL2CM3(-S0 -C0 -P0 ) -FN5 -FC8000 -FD08026400 -FF0CY8C6xxA_SFLASH_TOC2 -FF1CY8C6xxA_SFLASH_PKEY -FF2CY8C6xxA_SFLASH_USER -FF3CY8C6xxA_WFLASH -FF4CY8C6xxA_sect256KB -FL0400 -FL1C00 -FL2800 -FL38000 -FL4200000 -FS016007C00 -FS116005A00 -FS216000800 -FS314000000 -FS410000000 -FP0($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_TOC2.FLM) -FP1($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_PKEY.FLM) -FP2($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_USER.FLM) -FP3($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_WFLASH.FLM) -FP4($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_sect256KB.FLM) - - - - - 0 - - - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - 0 - 0 - 0 - - - - - - - - - - 1 - 1 - 0 - 2 - 10000000 - - - - - diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/template.uvproj b/bsp/cypress/psoc6-cy8cproto-4343w/template.uvproj deleted file mode 100644 index c07f4e4fd7..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/template.uvproj +++ /dev/null @@ -1,407 +0,0 @@ - - - - 1.1 - -
### uVision Project, (C) Keil Software
- - - - rtthread - 0x4 - ARM-ADS - - - STM32F407VG - STMicroelectronics - IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2 - - "Startup\ST\STM32F4xx\startup_stm32f40_41xxx.s" ("STM32F40/41xxx Startup Code") - UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000) - 6103 - stm32f4xx.h - - - - - - - -DSTM32F40_41xxx - - - SFD\ST\STM32F4xx\STM32F40x.sfr - 0 - 0 - - - - ST\STM32F4xx\ - ST\STM32F4xx\ - - 0 - 0 - 0 - 0 - 1 - - .\build\keil\Obj\ - rtthread - 1 - 0 - 0 - 1 - 0 - .\build\keil\List\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - - - 1 - 0 - fromelf --bin !L --output rtthread.bin - - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - 1 - - - SARMCM3.DLL - -MPU -REMAP - DCM.DLL - -pCM4 - SARMCM3.DLL - -MPU - TCM.DLL - -pCM4 - - - - 1 - 0 - 0 - 0 - 16 - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - - - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 0 - 1 - 0 - - 0 - 11 - - - - - - - - - - - - - - STLink\ST-LINKIII-KEIL_SWO.dll - - - - - 1 - 0 - 0 - 1 - 1 - 4096 - - 1 - BIN\UL2CM3.DLL - "" () - - - - - 0 - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - "Cortex-M4" - - 0 - 0 - 0 - 1 - 1 - 0 - 0 - 2 - 1 - 0 - 8 - 0 - 0 - 0 - 3 - 3 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 1 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x20000000 - 0x20000 - - - 1 - 0x8000000 - 0x100000 - - - 0 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x8000000 - 0x100000 - - - 1 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x20000000 - 0x20000 - - - 0 - 0x10000000 - 0x10000 - - - - - - 1 - 1 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 0 - - - - - - - - - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - - - - - - - - - 0 - 0 - 0 - 0 - 1 - 0 - 0x08000000 - 0x20000000 - - .\board\linker_scripts\link.sct - - - - - - - - - - - - diff --git a/bsp/cypress/psoc6-cy8cproto-4343w/template.uvprojx b/bsp/cypress/psoc6-cy8cproto-4343w/template.uvprojx deleted file mode 100644 index 6fe94ac0c9..0000000000 --- a/bsp/cypress/psoc6-cy8cproto-4343w/template.uvprojx +++ /dev/null @@ -1,391 +0,0 @@ - - - - 2.1 - -
### uVision Project, (C) Keil Software
- - - - rtthread - 0x4 - ARM-ADS - 6160000::V6.16::ARMCLANG - 1 - - - CY8C624ABZI-S2D44:Cortex-M4 - Cypress - Cypress.PSoC6_DFP.1.2.0 - https://github.com/cypresssemiconductorco/cmsis-packs/raw/master/PSoC6_DFP/ - IRAM(0x08000000,0x100000) IROM(0x10000000,0x200000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE - - - UL2CM3(-S0 -C0 -P0 -FD08026400 -FC8000 -FN5 -FF0CY8C6xxA_SFLASH_TOC2 -FS016007C00 -FL0400 -FF1CY8C6xxA_SFLASH_PKEY -FS116005A00 -FL1C00 -FF2CY8C6xxA_SFLASH_USER -FS216000800 -FL2800 -FF3CY8C6xxA_WFLASH -FS314000000 -FL38000 -FF4CY8C6xxA_sect256KB -FS410000000 -FL4200000 -FP0($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_TOC2.FLM) -FP1($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_PKEY.FLM) -FP2($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_SFLASH_USER.FLM) -FP3($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_WFLASH.FLM) -FP4($$Device:CY8C624ABZI-S2D44$Flash\CY8C6xxA_sect256KB.FLM)) - 0 - - - - - - - - - - - $$Device:CY8C624ABZI-S2D44$SVD\psoc6_02.svd - 0 - 0 - - - - - - - 0 - 0 - 0 - 0 - 1 - - .\build\keil\Obj\ - rtthread - 1 - 0 - 0 - 1 - 1 - .\build\keil\List\ - 1 - 0 - 0 - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 0 - 0 - - - 0 - 0 - 0 - 0 - - - 1 - 0 - fromelf --bin !L --output rtthread.bin - - 0 - 0 - 0 - 0 - - 0 - - - - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 3 - - - 1 - - - SARMCM3.DLL - -REMAP -MPU - DCM.DLL - -pCM4 - SARMCM3.DLL - -MPU - TCM.DLL - -pCM4 - - - - 1 - 0 - 0 - 0 - 16 - - - - - 1 - 0 - 0 - 1 - 1 - 4096 - - 1 - BIN\UL2CM3.DLL - "" () - - - - - 0 - - - - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 1 - 1 - 0 - 1 - 1 - 0 - 0 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 1 - 0 - 0 - "Cortex-M4" - - 0 - 0 - 0 - 1 - 1 - 0 - 0 - 2 - 0 - 0 - 0 - 0 - 8 - 0 - 0 - 0 - 0 - 3 - 3 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 1 - 0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x8000000 - 0x100000 - - - 1 - 0x10000000 - 0x200000 - - - 0 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x0 - 0x0 - - - 1 - 0x10000000 - 0x200000 - - - 1 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x0 - 0x0 - - - 0 - 0x8000000 - 0x100000 - - - 0 - 0x0 - 0x0 - - - - - - 1 - 2 - 0 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 3 - 0 - 0 - 1 - 0 - 0 - 3 - 1 - 1 - 1 - 0 - 0 - 0 - - - - - - - - - 1 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 0 - 3 - - - - - - - - - 0 - 0 - 0 - 0 - 1 - 0 - 0x10000000 - 0x08000000 - - .\board\linker_scripts\link.sct - - - - - - - - - - - - - - - - - - -- cgit v1.3.1