From 9fa72d0b81c7f74c65c46c301bdbea18c11286cd Mon Sep 17 00:00:00 2001 From: "192.168.1.134" Date: Tue, 16 Nov 2021 14:05:09 +0800 Subject: fix: fix wrong clock input --- bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.c | 83 +++++------------------- bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.h | 2 +- 2 files changed, 19 insertions(+), 66 deletions(-) (limited to 'bsp') diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.c index ee2532d53b..1afea26878 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.c @@ -49,34 +49,6 @@ enum #ifdef BSP_USING_HW_TIM8 TIM8_INDEX, #endif - -#ifdef BSP_USING_HWTIM9 - TIM9_INDEX, -#endif - -#ifdef BSP_USING_HWTIM10 - TIM10_INDEX, -#endif - -#ifdef BSP_USING_HWTIM11 - TIM11_INDEX, -#endif - -#ifdef BSP_USING_HWTIM12 - TIM12_INDEX, -#endif - -#ifdef BSP_USING_HWTIM13 - TIM13_INDEX, -#endif - -#ifdef BSP_USING_HWTIM14 - TIM14_INDEX, -#endif - -#ifdef BSP_USING_HWTIM15 - TIM15_INDEX, -#endif }; struct n32_hwtimer @@ -120,34 +92,6 @@ static struct n32_hwtimer n32_hwtimer_obj[] = #ifdef BSP_USING_HWTIM8 TIM8_CONFIG, #endif - -#ifdef BSP_USING_HWTIM9 - TIM9_CONFIG, -#endif - -#ifdef BSP_USING_HWTIM10 - TIM10_CONFIG, -#endif - -#ifdef BSP_USING_HWTIM11 - TIM11_CONFIG, -#endif - -#ifdef BSP_USING_HWTIM12 - TIM12_CONFIG, -#endif - -#ifdef BSP_USING_HWTIM13 - TIM13_CONFIG, -#endif - -#ifdef BSP_USING_HWTIM14 - TIM14_CONFIG, -#endif - -#ifdef BSP_USING_HWTIM15 - TIM15_CONFIG, -#endif }; static void n32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) @@ -155,6 +99,8 @@ static void n32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) RCC_ClocksType RCC_ClockStruct; TIM_TimeBaseInitType TIM_TimeBaseStructure; NVIC_InitType NVIC_InitStructure; + uint32_t freq = 0; + uint32_t input_clock; uint32_t prescaler_value = 0; TIM_Module *tim = RT_NULL; struct n32_hwtimer *tim_device = RT_NULL; @@ -165,18 +111,22 @@ static void n32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) tim = (TIM_Module *)timer->parent.user_data; tim_device = (struct n32_hwtimer *)timer; + RT_ASSERT((tim == TIM2) || (tim == TIM3) || (tim == TIM4) || (tim == TIM5) + || (tim == TIM6) || (tim == TIM7)); + /* timer clock enable */ n32_msp_hwtim_init(tim); - /* timer init */ + freq = timer->freq; RCC_GetClocksFreqValue(&RCC_ClockStruct); - /* Set timer clock is 1Mhz */ - prescaler_value = (uint32_t)(RCC_ClockStruct.SysclkFreq / 10000) - 1; + if (1 == (RCC_ClockStruct.HclkFreq / RCC_ClockStruct.Pclk1Freq)) + input_clock = RCC_ClockStruct.Pclk1Freq; + else + input_clock = RCC_ClockStruct.Pclk1Freq * 2; + prescaler_value = (uint32_t)(input_clock / freq) - 1; - TIM_TimeBaseStructure.Period = 10000 - 1; - rt_kprintf("Period=[%d]", TIM_TimeBaseStructure.Period); + TIM_TimeBaseStructure.Period = freq - 1; TIM_TimeBaseStructure.Prescaler = prescaler_value; - rt_kprintf("Prescaler=[%d]", TIM_TimeBaseStructure.Prescaler); TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1; TIM_TimeBaseStructure.RepetCnt = 0; @@ -274,6 +224,7 @@ static rt_err_t n32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) { case HWTIMER_CTRL_FREQ_SET: { + rt_uint32_t input_clock; rt_uint32_t freq; rt_uint16_t val; @@ -282,9 +233,11 @@ static rt_err_t n32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) /* time init */ RCC_GetClocksFreqValue(&RCC_ClockStruct); - - val = RCC_ClockStruct.SysclkFreq / freq; - + if (1 == (RCC_ClockStruct.HclkFreq / RCC_ClockStruct.Pclk1Freq)) + input_clock = RCC_ClockStruct.Pclk1Freq; + else + input_clock = RCC_ClockStruct.Pclk1Freq * 2; + val = input_clock / freq; TIM_ConfigPrescaler(tim, val - 1, TIM_PSC_RELOAD_MODE_IMMEDIATE); } break; diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.h b/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.h index ec2107a86e..cf42459a35 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.h +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.h @@ -22,7 +22,7 @@ extern "C" { #define TIM_DEV_INFO_CONFIG \ { \ .maxfreq = 1000000, \ - .minfreq = 4000, \ + .minfreq = 1000, \ .maxcnt = 0xFFFF, \ .cntmode = HWTIMER_CNTMODE_UP, \ } -- cgit v1.3.1 From 8e3caf08b91e4c6e6d2b60f040f23ee2a1e51bf9 Mon Sep 17 00:00:00 2001 From: "192.168.1.134" Date: Fri, 3 Dec 2021 14:25:13 +0800 Subject: feat: improve startup flow 1. remove gpio&uart INIT_BOARD_EXPORT 2. init gpio&uart in rt_hw_board_init 3. add clock driver --- bsp/n32g452xx/Libraries/rt_drivers/SConscript | 1 + bsp/n32g452xx/Libraries/rt_drivers/drv_clk.c | 244 ++++++++++++++++++++++ bsp/n32g452xx/Libraries/rt_drivers/drv_clk.h | 41 ++++ bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c | 1 - bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.h | 1 + bsp/n32g452xx/Libraries/rt_drivers/drv_soft_i2c.c | 1 - bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c | 1 - bsp/n32g452xx/Libraries/rt_drivers/drv_usart.h | 1 + bsp/n32g452xx/n32g452xx-mini-system/board/board.c | 11 + 9 files changed, 299 insertions(+), 3 deletions(-) create mode 100755 bsp/n32g452xx/Libraries/rt_drivers/drv_clk.c create mode 100755 bsp/n32g452xx/Libraries/rt_drivers/drv_clk.h (limited to 'bsp') diff --git a/bsp/n32g452xx/Libraries/rt_drivers/SConscript b/bsp/n32g452xx/Libraries/rt_drivers/SConscript index 1298ec7063..4976568157 100755 --- a/bsp/n32g452xx/Libraries/rt_drivers/SConscript +++ b/bsp/n32g452xx/Libraries/rt_drivers/SConscript @@ -10,6 +10,7 @@ src = Split(""" """) src += ['drv_common.c'] +src += ['drv_clk.c'] if GetDepend(['RT_USING_PIN']): src += ['drv_gpio.c'] diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_clk.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_clk.c new file mode 100755 index 0000000000..9af2d83e60 --- /dev/null +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_clk.c @@ -0,0 +1,244 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 breo.com first version + */ + +#include "drv_clk.h" +#include "board.h" + +void DumpClock(const char *msg) +{ + RCC_ClocksType RCC_ClockFreq; + rt_kprintf("--------------------------------\n"); + rt_kprintf("%s:\n", msg); + RCC_GetClocksFreqValue(&RCC_ClockFreq); + rt_kprintf("SYSCLK: %d\n", RCC_ClockFreq.SysclkFreq); + rt_kprintf("HCLK: %d\n", RCC_ClockFreq.HclkFreq); + rt_kprintf("PCLK1: %d\n", RCC_ClockFreq.Pclk1Freq); + rt_kprintf("PCLK2: %d\n", RCC_ClockFreq.Pclk2Freq); +} + +void SetSysClockToHSI(void) +{ + RCC_DeInit(); + + RCC_EnableHsi(ENABLE); + + /* Enable Prefetch Buffer */ + FLASH_PrefetchBufSet(FLASH_PrefetchBuf_EN); + + /* Flash 0 wait state */ + FLASH_SetLatency(FLASH_LATENCY_0); + + /* HCLK = SYSCLK */ + RCC_ConfigHclk(RCC_SYSCLK_DIV1); + + /* PCLK2 = HCLK */ + RCC_ConfigPclk2(RCC_HCLK_DIV1); + + /* PCLK1 = HCLK */ + RCC_ConfigPclk1(RCC_HCLK_DIV1); + + /* Select HSE as system clock source */ + RCC_ConfigSysclk(RCC_SYSCLK_SRC_HSI); + + /* Wait till PLL is used as system clock source */ + while (RCC_GetSysclkSrc() != 0x00) + { + } +} + +/** + * @brief Selects HSE as System clock source and configure HCLK, PCLK2 + * and PCLK1 prescalers. + */ +void SetSysClockToHSE(void) +{ + ErrorStatus HSEStartUpStatus; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration + * -----------------------------*/ + /* RCC system reset(for debug purpose) */ + RCC_DeInit(); + + /* Enable HSE */ + RCC_ConfigHse(RCC_HSE_ENABLE); + + /* Wait till HSE is ready */ + HSEStartUpStatus = RCC_WaitHseStable(); + + if (HSEStartUpStatus == SUCCESS) + { + /* Enable Prefetch Buffer */ + FLASH_PrefetchBufSet(FLASH_PrefetchBuf_EN); + + if (HSE_Value <= 32000000) + { + /* Flash 0 wait state */ + FLASH_SetLatency(FLASH_LATENCY_0); + } + else + { + /* Flash 1 wait state */ + FLASH_SetLatency(FLASH_LATENCY_1); + } + + /* HCLK = SYSCLK */ + RCC_ConfigHclk(RCC_SYSCLK_DIV1); + + /* PCLK2 = HCLK */ + RCC_ConfigPclk2(RCC_HCLK_DIV1); + + /* PCLK1 = HCLK */ + RCC_ConfigPclk1(RCC_HCLK_DIV1); + + /* Select HSE as system clock source */ + RCC_ConfigSysclk(RCC_SYSCLK_SRC_HSE); + + /* Wait till HSE is used as system clock source */ + while (RCC_GetSysclkSrc() != 0x04) + { + } + } + else + { + /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + + /* Go to infinite loop */ + while (1) + { + } + } +} + +void SetSysClockToPLL(uint32_t freq, uint8_t src) +{ + uint32_t pllsrc = (src == SYSCLK_PLLSRC_HSI ? RCC_PLL_SRC_HSI_DIV2 : RCC_PLL_SRC_HSE_DIV2); + uint32_t pllmul; + uint32_t latency; + uint32_t pclk1div, pclk2div; + ErrorStatus HSEStartUpStatus; + + if (HSE_VALUE != 8000000) + { + /* HSE_VALUE == 8000000 is needed in this project! */ + while (1) + ; + } + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration + * -----------------------------*/ + /* RCC system reset(for debug purpose) */ + RCC_DeInit(); + + if (src == SYSCLK_PLLSRC_HSE) + { + /* Enable HSE */ + RCC_ConfigHse(RCC_HSE_ENABLE); + + /* Wait till HSE is ready */ + HSEStartUpStatus = RCC_WaitHseStable(); + + if (HSEStartUpStatus != SUCCESS) + { + /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this + error */ + + /* Go to infinite loop */ + while (1) + ; + } + } + + switch (freq) + { + case 24000000: + latency = FLASH_LATENCY_0; + pllmul = RCC_PLL_MUL_6; + pclk1div = RCC_HCLK_DIV1; + pclk2div = RCC_HCLK_DIV1; + break; + case 36000000: + latency = FLASH_LATENCY_1; + pllmul = RCC_PLL_MUL_9; + pclk1div = RCC_HCLK_DIV1; + pclk2div = RCC_HCLK_DIV1; + break; + case 48000000: + latency = FLASH_LATENCY_1; + pllmul = RCC_PLL_MUL_12; + pclk1div = RCC_HCLK_DIV2; + pclk2div = RCC_HCLK_DIV1; + break; + case 56000000: + latency = FLASH_LATENCY_1; + pllmul = RCC_PLL_MUL_14; + pclk1div = RCC_HCLK_DIV2; + pclk2div = RCC_HCLK_DIV1; + break; + case 72000000: + latency = FLASH_LATENCY_2; + pllmul = RCC_PLL_MUL_18; + pclk1div = RCC_HCLK_DIV2; + pclk2div = RCC_HCLK_DIV1; + break; + case 96000000: + latency = FLASH_LATENCY_2; + pllmul = RCC_PLL_MUL_24; + pclk1div = RCC_HCLK_DIV4; + pclk2div = RCC_HCLK_DIV2; + break; + case 128000000: + latency = FLASH_LATENCY_3; + pllmul = RCC_PLL_MUL_32; + pclk1div = RCC_HCLK_DIV4; + pclk2div = RCC_HCLK_DIV2; + break; + case 144000000: + /* must use HSE as PLL source */ + latency = FLASH_LATENCY_4; + pllsrc = RCC_PLL_SRC_HSE_DIV1; + pllmul = RCC_PLL_MUL_18; + pclk1div = RCC_HCLK_DIV4; + pclk2div = RCC_HCLK_DIV2; + break; + default: + while (1) + ; + } + + FLASH_SetLatency(latency); + + /* HCLK = SYSCLK */ + RCC_ConfigHclk(RCC_SYSCLK_DIV1); + + /* PCLK2 = HCLK */ + RCC_ConfigPclk2(pclk2div); + + /* PCLK1 = HCLK */ + RCC_ConfigPclk1(pclk1div); + + RCC_ConfigPll(pllsrc, pllmul); + + /* Enable PLL */ + RCC_EnablePll(ENABLE); + + /* Wait till PLL is ready */ + while (RCC_GetFlagStatus(RCC_FLAG_PLLRD) == RESET) + ; + + /* Select PLL as system clock source */ + RCC_ConfigSysclk(RCC_SYSCLK_SRC_PLLCLK); + + /* Wait till PLL is used as system clock source */ + while (RCC_GetSysclkSrc() != 0x08) + ; +} + diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_clk.h b/bsp/n32g452xx/Libraries/rt_drivers/drv_clk.h new file mode 100755 index 0000000000..d61d64fc8c --- /dev/null +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_clk.h @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 breo.com first version + */ + +#ifndef __DRV_CLK_H__ +#define __DRV_CLK_H__ + +#include +#include +#include +#ifdef RT_USING_DEVICE + #include +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +void DumpClock(const char *msg); +void SetSysClockToHSI(void); +void SetSysClockToHSE(void); + +enum +{ + SYSCLK_PLLSRC_HSI, + SYSCLK_PLLSRC_HSE, +}; +void SetSysClockToPLL(uint32_t freq, uint8_t src); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c index 690253959f..0552232473 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.c @@ -763,7 +763,6 @@ int n32_hw_pin_init(void) result = rt_device_pin_register("pin", &_n32_pin_ops, RT_NULL); return result; } -INIT_BOARD_EXPORT(n32_hw_pin_init); rt_inline void pin_irq_hdr(int irqno) { diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.h b/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.h index ae9bda7dce..f991436bb4 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.h +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_gpio.h @@ -10,5 +10,6 @@ #ifndef GPIO_H__ #define GPIO_H__ +int n32_hw_pin_init(void); #endif diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_soft_i2c.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_soft_i2c.c index 3f5ebf450c..1feb0ac7e2 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_soft_i2c.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_soft_i2c.c @@ -214,7 +214,6 @@ int rt_hw_i2c_init(void) return RT_EOK; } - INIT_BOARD_EXPORT(rt_hw_i2c_init); #endif /* RT_USING_I2C */ diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c index fae6668671..e7238c925c 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.c @@ -554,5 +554,4 @@ int rt_hw_usart_init(void) return RT_EOK; } -INIT_BOARD_EXPORT(rt_hw_usart_init); diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.h b/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.h index 4059092706..c8ca6a78cd 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.h +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_usart.h @@ -11,5 +11,6 @@ #ifndef __USART_H__ #define __USART_H__ +int rt_hw_usart_init(void); #endif diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/board.c b/bsp/n32g452xx/n32g452xx-mini-system/board/board.c index f5fd86b932..533cb15d35 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/board.c +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/board.c @@ -13,6 +13,7 @@ #include #include +#include #ifdef BSP_USING_SRAM #include "drv_sram.h" @@ -72,6 +73,16 @@ void rt_hw_board_init() SystemClock_Config(); +#ifdef RT_USING_PIN + int n32_hw_pin_init(void); + n32_hw_pin_init(); +#endif + +#ifdef RT_USING_SERIAL + int rt_hw_usart_init(void); + rt_hw_usart_init(); +#endif + #ifdef RT_USING_COMPONENTS_INIT rt_components_board_init(); #endif -- cgit v1.3.1 From d9ca4e85f64cbe285b04354a90e4656bf7b3cbf6 Mon Sep 17 00:00:00 2001 From: "192.168.1.134" Date: Wed, 8 Dec 2021 14:21:52 +0800 Subject: perf: improve compiler path logic --- bsp/n32g452xx/n32g452xx-mini-system/rtconfig.py | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) (limited to 'bsp') diff --git a/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.py b/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.py index 4a56028bfb..9e1e88529a 100755 --- a/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.py +++ b/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.py @@ -19,18 +19,20 @@ else: # cross_tool provides the cross compiler # EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') if CROSS_TOOL == 'gcc': PLATFORM = 'gcc' - EXEC_PATH = r'/opt/gcc-arm-none-eabi-6_2-2016q4/bin' + if ('EXEC_PATH' in dir()) == False: + EXEC_PATH = r'/opt/gcc-arm-none-eabi-6_2-2016q4/bin' elif CROSS_TOOL == 'keil': PLATFORM = 'armcc' - EXEC_PATH = r'C:/Keil_v5' + if ('EXEC_PATH' in dir()) == False: + EXEC_PATH = r'C:/Keil_v5' elif CROSS_TOOL == 'iar': PLATFORM = 'iar' - EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' - -if os.getenv('RTT_EXEC_PATH'): - EXEC_PATH = os.getenv('RTT_EXEC_PATH') + if ('EXEC_PATH' in dir()) == False: + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' BUILD = 'debug' -- cgit v1.3.1 From 2d6791d59234966a1d2c311eaae458c5657cb6ff Mon Sep 17 00:00:00 2001 From: fanhuanji Date: Wed, 8 Dec 2021 22:33:23 +0800 Subject: BugFix: Raspi3 GPIO driver write bug --- bsp/raspberry-pi/raspi3-32/driver/drv_gpio.c | 2 +- bsp/raspberry-pi/raspi3-32/driver/raspi.h | 24 ++++++++++++------------ bsp/raspberry-pi/raspi3-64/driver/drv_gpio.c | 2 +- bsp/raspberry-pi/raspi3-64/driver/raspi.h | 24 ++++++++++++------------ 4 files changed, 26 insertions(+), 26 deletions(-) (limited to 'bsp') diff --git a/bsp/raspberry-pi/raspi3-32/driver/drv_gpio.c b/bsp/raspberry-pi/raspi3-32/driver/drv_gpio.c index 721643f515..95f266905e 100644 --- a/bsp/raspberry-pi/raspi3-32/driver/drv_gpio.c +++ b/bsp/raspberry-pi/raspi3-32/driver/drv_gpio.c @@ -137,7 +137,7 @@ static void raspi_pin_write(struct rt_device *dev, rt_base_t pin, rt_base_t valu if (value) BCM283X_GPIO_GPSET(pin / 32) |= (1 << (pin %32)); else - BCM283X_GPIO_GPCLR(pin / 32) |= (0 << (pin %32)); + BCM283X_GPIO_GPCLR(pin / 32) |= (1 << (pin %32)); } diff --git a/bsp/raspberry-pi/raspi3-32/driver/raspi.h b/bsp/raspberry-pi/raspi3-32/driver/raspi.h index fedf4bcff8..367aa707a9 100644 --- a/bsp/raspberry-pi/raspi3-32/driver/raspi.h +++ b/bsp/raspberry-pi/raspi3-32/driver/raspi.h @@ -172,19 +172,19 @@ typedef enum /* Defines for GPIO */ #define BCM283X_GPIO_BASE (PER_BASE + GPIO_BASE_OFFSET) -#define BCM283X_GPIO_GPFSEL(n) HWREG32(BCM283X_GPIO_BASE + 0x0000 + 0x4 * n) /* GPIO Function Select 32bit R/W */ -#define BCM283X_GPIO_GPSET(n) HWREG32(BCM283X_GPIO_BASE + 0x001C + 0x4 * n) /* GPIO Pin Output Set */ -#define BCM283X_GPIO_GPCLR(n) HWREG32(BCM283X_GPIO_BASE + 0x0028 + 0x4 * n) /* GPIO Pin Output Clear */ -#define BCM2835_GPIO_GPLEV(n) HWREG32(BCM283X_GPIO_BASE + 0x0034 + 0x4 * n) /* GPIO Pin Level */ -#define BCM283X_GPIO_GPEDS(n) HWREG32(BCM283X_GPIO_BASE + 0x0040 + 0x4 * n) /* GPIO Pin Event Detect Status */ -#define BCM283X_GPIO_GPREN(n) HWREG32(BCM283X_GPIO_BASE + 0x004c + 0x4 * n) /* GPIO Pin Rising Edge Detect Enable */ -#define BCM283X_GPIO_GPFEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0058 + 0x4 * n) /* GPIO Pin Falling Edge Detect Enable */ -#define BCM283X_GPIO_GPHEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0064 + 0x4 * n) /* GPIO Pin High Detect Enable */ -#define BCM283X_GPIO_GPLEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0070 + 0x4 * n) /* GPIO Pin Low Detect Enable */ -#define BCM283X_GPIO_GPAREN(n) HWREG32(BCM283X_GPIO_BASE + 0x007C + 0x4 * n) /* GPIO Pin Async. Rising Edge Detect */ -#define BCM283X_GPIO_GPAFEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0088 + 0x4 * n) /* GPIO Pin Async. Falling Edge Detect */ +#define BCM283X_GPIO_GPFSEL(n) HWREG32(BCM283X_GPIO_BASE + 0x0000 + 0x4 * (n)) /* GPIO Function Select 32bit R/W */ +#define BCM283X_GPIO_GPSET(n) HWREG32(BCM283X_GPIO_BASE + 0x001C + 0x4 * (n)) /* GPIO Pin Output Set */ +#define BCM283X_GPIO_GPCLR(n) HWREG32(BCM283X_GPIO_BASE + 0x0028 + 0x4 * (n)) /* GPIO Pin Output Clear */ +#define BCM2835_GPIO_GPLEV(n) HWREG32(BCM283X_GPIO_BASE + 0x0034 + 0x4 * (n)) /* GPIO Pin Level */ +#define BCM283X_GPIO_GPEDS(n) HWREG32(BCM283X_GPIO_BASE + 0x0040 + 0x4 * (n)) /* GPIO Pin Event Detect Status */ +#define BCM283X_GPIO_GPREN(n) HWREG32(BCM283X_GPIO_BASE + 0x004c + 0x4 * (n)) /* GPIO Pin Rising Edge Detect Enable */ +#define BCM283X_GPIO_GPFEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0058 + 0x4 * (n)) /* GPIO Pin Falling Edge Detect Enable */ +#define BCM283X_GPIO_GPHEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0064 + 0x4 * (n)) /* GPIO Pin High Detect Enable */ +#define BCM283X_GPIO_GPLEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0070 + 0x4 * (n)) /* GPIO Pin Low Detect Enable */ +#define BCM283X_GPIO_GPAREN(n) HWREG32(BCM283X_GPIO_BASE + 0x007C + 0x4 * (n)) /* GPIO Pin Async. Rising Edge Detect */ +#define BCM283X_GPIO_GPAFEN(n) HWREG32(BCM283X_GPIO_BASE + 0x0088 + 0x4 * (n)) /* GPIO Pin Async. Falling Edge Detect */ #define BCM283X_GPIO_GPPUD HWREG32(BCM283X_GPIO_BASE + 0x0094) /* GPIO Pin Pull-up/down Enable */ -#define BCM283X_GPIO_GPPUDCLK(n) HWREG32(BCM283X_GPIO_BASE + 0x0098 + 0x4 * n) /* GPIO Pin Pull-up/down Enable Clock */ +#define BCM283X_GPIO_GPPUDCLK(n) HWREG32(BCM283X_GPIO_BASE + 0x0098 + 0x4 * (n)) /* GPIO Pin Pull-up/down Enable Clock */ #define GPIO_FSEL_NUM(pin) (pin/10) #define GPIO_FSEL_SHIFT(pin) ((pin%10)*3) diff --git a/bsp/raspberry-pi/raspi3-64/driver/drv_gpio.c b/bsp/raspberry-pi/raspi3-64/driver/drv_gpio.c index 04b5cdf162..1cf70ece24 100644 --- a/bsp/raspberry-pi/raspi3-64/driver/drv_gpio.c +++ b/bsp/raspberry-pi/raspi3-64/driver/drv_gpio.c @@ -138,7 +138,7 @@ static void raspi_pin_write(struct rt_device *dev, rt_base_t pin, rt_base_t valu if (value) BCM283X_GPIO_GPSET(pin / 32) |= (1 << (pin %32)); else - BCM283X_GPIO_GPCLR(pin / 32) |= (0 << (pin %32)); + BCM283X_GPIO_GPCLR(pin / 32) |= (1 << (pin %32)); } diff --git a/bsp/raspberry-pi/raspi3-64/driver/raspi.h b/bsp/raspberry-pi/raspi3-64/driver/raspi.h index 8e77f1f701..3a95e5ecbd 100644 --- a/bsp/raspberry-pi/raspi3-64/driver/raspi.h +++ b/bsp/raspberry-pi/raspi3-64/driver/raspi.h @@ -176,19 +176,19 @@ typedef enum /* Defines for GPIO */ #define BCM283X_GPIO_BASE (PER_BASE + GPIO_BASE_OFFSET) -#define BCM283X_GPIO_GPFSEL(n) __REG32(BCM283X_GPIO_BASE + 0x0000 + 0x4 * n) /* GPIO Function Select 32bit R/W */ -#define BCM283X_GPIO_GPSET(n) __REG32(BCM283X_GPIO_BASE + 0x001C + 0x4 * n) /* GPIO Pin Output Set */ -#define BCM283X_GPIO_GPCLR(n) __REG32(BCM283X_GPIO_BASE + 0x0028 + 0x4 * n) /* GPIO Pin Output Clear */ -#define BCM2835_GPIO_GPLEV(n) __REG32(BCM283X_GPIO_BASE + 0x0034 + 0x4 * n) /* GPIO Pin Level */ -#define BCM283X_GPIO_GPEDS(n) __REG32(BCM283X_GPIO_BASE + 0x0040 + 0x4 * n) /* GPIO Pin Event Detect Status */ -#define BCM283X_GPIO_GPREN(n) __REG32(BCM283X_GPIO_BASE + 0x004c + 0x4 * n) /* GPIO Pin Rising Edge Detect Enable */ -#define BCM283X_GPIO_GPFEN(n) __REG32(BCM283X_GPIO_BASE + 0x0058 + 0x4 * n) /* GPIO Pin Falling Edge Detect Enable */ -#define BCM283X_GPIO_GPHEN(n) __REG32(BCM283X_GPIO_BASE + 0x0064 + 0x4 * n) /* GPIO Pin High Detect Enable */ -#define BCM283X_GPIO_GPLEN(n) __REG32(BCM283X_GPIO_BASE + 0x0070 + 0x4 * n) /* GPIO Pin Low Detect Enable */ -#define BCM283X_GPIO_GPAREN(n) __REG32(BCM283X_GPIO_BASE + 0x007C + 0x4 * n) /* GPIO Pin Async. Rising Edge Detect */ -#define BCM283X_GPIO_GPAFEN(n) __REG32(BCM283X_GPIO_BASE + 0x0088 + 0x4 * n) /* GPIO Pin Async. Falling Edge Detect */ +#define BCM283X_GPIO_GPFSEL(n) __REG32(BCM283X_GPIO_BASE + 0x0000 + 0x4 * (n)) /* GPIO Function Select 32bit R/W */ +#define BCM283X_GPIO_GPSET(n) __REG32(BCM283X_GPIO_BASE + 0x001C + 0x4 * (n)) /* GPIO Pin Output Set */ +#define BCM283X_GPIO_GPCLR(n) __REG32(BCM283X_GPIO_BASE + 0x0028 + 0x4 * (n)) /* GPIO Pin Output Clear */ +#define BCM2835_GPIO_GPLEV(n) __REG32(BCM283X_GPIO_BASE + 0x0034 + 0x4 * (n)) /* GPIO Pin Level */ +#define BCM283X_GPIO_GPEDS(n) __REG32(BCM283X_GPIO_BASE + 0x0040 + 0x4 * (n)) /* GPIO Pin Event Detect Status */ +#define BCM283X_GPIO_GPREN(n) __REG32(BCM283X_GPIO_BASE + 0x004c + 0x4 * (n)) /* GPIO Pin Rising Edge Detect Enable */ +#define BCM283X_GPIO_GPFEN(n) __REG32(BCM283X_GPIO_BASE + 0x0058 + 0x4 * (n)) /* GPIO Pin Falling Edge Detect Enable */ +#define BCM283X_GPIO_GPHEN(n) __REG32(BCM283X_GPIO_BASE + 0x0064 + 0x4 * (n)) /* GPIO Pin High Detect Enable */ +#define BCM283X_GPIO_GPLEN(n) __REG32(BCM283X_GPIO_BASE + 0x0070 + 0x4 * (n)) /* GPIO Pin Low Detect Enable */ +#define BCM283X_GPIO_GPAREN(n) __REG32(BCM283X_GPIO_BASE + 0x007C + 0x4 * (n)) /* GPIO Pin Async. Rising Edge Detect */ +#define BCM283X_GPIO_GPAFEN(n) __REG32(BCM283X_GPIO_BASE + 0x0088 + 0x4 * (n)) /* GPIO Pin Async. Falling Edge Detect */ #define BCM283X_GPIO_GPPUD __REG32(BCM283X_GPIO_BASE + 0x0094) /* GPIO Pin Pull-up/down Enable */ -#define BCM283X_GPIO_GPPUDCLK(n) __REG32(BCM283X_GPIO_BASE + 0x0098 + 0x4 * n) /* GPIO Pin Pull-up/down Enable Clock */ +#define BCM283X_GPIO_GPPUDCLK(n) __REG32(BCM283X_GPIO_BASE + 0x0098 + 0x4 * (n)) /* GPIO Pin Pull-up/down Enable Clock */ #define GPIO_FSEL_NUM(pin) (pin/10) #define GPIO_FSEL_SHIFT(pin) ((pin%10)*3) -- cgit v1.3.1 From a716a9949ed219db9e8da24d5450ec6dafe82d6e Mon Sep 17 00:00:00 2001 From: Meco Man <920369182@qq.com> Date: Wed, 8 Dec 2021 18:40:37 -0500 Subject: [stm32][l475] 增加ESP8266快速构建选项，串口驱动由v2调整为V1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/stm32/stm32l475-atk-pandora/.config | 5 +++-- bsp/stm32/stm32l475-atk-pandora/board/Kconfig | 26 ++++++++++++++++++++++++++ bsp/stm32/stm32l475-atk-pandora/rtconfig.h | 3 ++- 3 files changed, 31 insertions(+), 3 deletions(-) (limited to 'bsp') diff --git a/bsp/stm32/stm32l475-atk-pandora/.config b/bsp/stm32/stm32l475-atk-pandora/.config index c96890d117..e78da4c3b0 100644 --- a/bsp/stm32/stm32l475-atk-pandora/.config +++ b/bsp/stm32/stm32l475-atk-pandora/.config @@ -132,9 +132,10 @@ CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_PIPE_BUFSZ=512 # CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set CONFIG_RT_USING_SERIAL=y -# CONFIG_RT_USING_SERIAL_V1 is not set -CONFIG_RT_USING_SERIAL_V2=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_CPUTIME is not set diff --git a/bsp/stm32/stm32l475-atk-pandora/board/Kconfig b/bsp/stm32/stm32l475-atk-pandora/board/Kconfig index d4ea946684..0a9f253d5d 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/Kconfig +++ b/bsp/stm32/stm32l475-atk-pandora/board/Kconfig @@ -455,6 +455,32 @@ endmenu menu "Board extended module Drivers" + menuconfig BSP_USING_AT_ESP8266 + bool "Enable ESP8266(AT Command, COM2)" + default n + select BSP_USING_COM2 + select PKG_USING_AT_DEVICE + select AT_DEVICE_USING_ESP8266 + select AT_DEVICE_ESP8266_SAMPLE + + if BSP_USING_AT_ESP8266 + config ESP8266_SAMPLE_WIFI_SSID + string "WIFI ssid" + default "rtthread" + + config ESP8266_SAMPLE_WIFI_PASSWORD + string "WIFI password" + default "12345678" + + config ESP8266_SAMPLE_CLIENT_NAME + string "AT client device name (Must be 'uart2')" + default "uart2" + + config ESP8266_SAMPLE_RECV_BUFF_LEN + int "The maximum length of receive line buffer" + default 512 + endif + config BSP_USING_NRF24L01 bool "Enable NRF24L01" select BSP_USING_SPI diff --git a/bsp/stm32/stm32l475-atk-pandora/rtconfig.h b/bsp/stm32/stm32l475-atk-pandora/rtconfig.h index 4a5dbbb100..bdc7fe71de 100644 --- a/bsp/stm32/stm32l475-atk-pandora/rtconfig.h +++ b/bsp/stm32/stm32l475-atk-pandora/rtconfig.h @@ -89,8 +89,9 @@ #define RT_USING_DEVICE_IPC #define RT_PIPE_BUFSZ 512 #define RT_USING_SERIAL -#define RT_USING_SERIAL_V2 +#define RT_USING_SERIAL_V1 #define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN /* Using USB */ -- cgit v1.3.1 From d6b05287bbeaf9369546009e5af445f350b97fe9 Mon Sep 17 00:00:00 2001 From: "192.168.1.134" Date: Thu, 9 Dec 2021 15:48:09 +0800 Subject: fix: fix wrong define and warning --- bsp/n32g452xx/Libraries/rt_drivers/SConscript | 6 +++--- bsp/n32g452xx/n32g452xx-mini-system/.config | 8 +++++--- bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig | 6 +++--- bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c | 5 +++-- bsp/n32g452xx/n32g452xx-mini-system/rtconfig.h | 6 ++++-- 5 files changed, 18 insertions(+), 13 deletions(-) (limited to 'bsp') diff --git a/bsp/n32g452xx/Libraries/rt_drivers/SConscript b/bsp/n32g452xx/Libraries/rt_drivers/SConscript index 4976568157..cedbaded23 100755 --- a/bsp/n32g452xx/Libraries/rt_drivers/SConscript +++ b/bsp/n32g452xx/Libraries/rt_drivers/SConscript @@ -12,13 +12,13 @@ src = Split(""" src += ['drv_common.c'] src += ['drv_clk.c'] -if GetDepend(['RT_USING_PIN']): +if GetDepend(['BSP_USING_GPIO']): src += ['drv_gpio.c'] -if GetDepend(['RT_USING_WDT']): +if GetDepend(['BSP_USING_UART']): src += ['drv_wdt.c'] -if GetDepend(['RT_USING_SERIAL']): +if GetDepend(['BSP_USING_UART']): src += ['drv_usart.c'] if GetDepend(['BSP_USING_PWM']): diff --git a/bsp/n32g452xx/n32g452xx-mini-system/.config b/bsp/n32g452xx/n32g452xx-mini-system/.config index 0ce771a4bc..99f799b99a 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/.config +++ b/bsp/n32g452xx/n32g452xx-mini-system/.config @@ -31,6 +31,7 @@ CONFIG_RT_TIMER_THREAD_STACK_SIZE=512 # CONFIG_RT_KSERVICE_USING_STDLIB is not set # CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set # CONFIG_RT_USING_ASM_MEMCPY is not set +# CONFIG_RT_USING_TINY_FFS is not set CONFIG_RT_DEBUG=y # CONFIG_RT_DEBUG_COLOR is not set # CONFIG_RT_DEBUG_INIT_CONFIG is not set @@ -134,7 +135,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_I2C is not set # CONFIG_RT_USING_PHY is not set CONFIG_RT_USING_PIN=y -# CONFIG_RT_USING_ADC is not set +CONFIG_RT_USING_ADC=y # CONFIG_RT_USING_DAC is not set CONFIG_RT_USING_PWM=y # CONFIG_RT_USING_MTD_NOR is not set @@ -167,6 +168,7 @@ CONFIG_RT_LIBC_USING_TIME=y # CONFIG_RT_LIBC_USING_FILEIO is not set # CONFIG_RT_USING_MODULE is not set CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 +# CONFIG_RT_USING_POSIX is not set # CONFIG_RT_USING_PTHREADS is not set # @@ -580,14 +582,14 @@ CONFIG_SOC_N32G452XX=y # # Onboard Peripheral Drivers # +CONFIG_BSP_USING_UART=y # # On-chip Peripheral Drivers # -CONFIG_RT_USING_GPIO=y +CONFIG_BSP_USING_GPIO=y # CONFIG_BSP_USING_ON_CHIP_FLASH is not set # CONFIG_BSP_USING_WDT is not set -CONFIG_BSP_USING_UART=y CONFIG_BSP_USING_UART1=y # CONFIG_BSP_USING_UART2 is not set # CONFIG_BSP_USING_UART3 is not set diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig b/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig index fd68886a07..0c004fc0c3 100755 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig @@ -9,9 +9,9 @@ config SOC_N32G452XX menu "Onboard Peripheral Drivers" - config RT_USING_SERIAL + config BSP_USING_UART bool "Enable USART (uart1)" - select BSP_USING_UART + select RT_USING_SERIAL select BSP_USING_UART1 default y @@ -19,7 +19,7 @@ endmenu menu "On-chip Peripheral Drivers" - config RT_USING_GPIO + config BSP_USING_GPIO bool "Enable GPIO" select RT_USING_PIN default y diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c index f10dc4df3e..bd79fbd756 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c @@ -8,7 +8,8 @@ * 2021-08-20 breo.com first version */ - +#include +#include #include #include #include "n32g45x.h" @@ -383,7 +384,7 @@ static void uart_test(void) static rt_device_t u2 = NULL; uart_test_rw(u2, "uart2"); #endif -#ifdef BSP_USING_UART2 +#ifdef BSP_USING_UART3 static rt_device_t u3 = NULL; uart_test_rw(u3, "uart3"); #endif diff --git a/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.h b/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.h index 8fbf2e7e7e..c0e34ac486 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.h +++ b/bsp/n32g452xx/n32g452xx-mini-system/rtconfig.h @@ -84,6 +84,7 @@ #define RT_SERIAL_USING_DMA #define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN +#define RT_USING_ADC #define RT_USING_PWM #define RT_USING_WDT @@ -175,10 +176,11 @@ /* Onboard Peripheral Drivers */ +#define BSP_USING_UART + /* On-chip Peripheral Drivers */ -#define RT_USING_GPIO -#define BSP_USING_UART +#define BSP_USING_GPIO #define BSP_USING_UART1 #endif -- cgit v1.3.1 From fbe71b7b3055443f1e26aae2a2832c9a3bde90ea Mon Sep 17 00:00:00 2001 From: Meco Man <920369182@qq.com> Date: Thu, 9 Dec 2021 14:06:28 -0500 Subject: [qemu] update Kconfig --- bsp/qemu-vexpress-a9/Kconfig | 9 --------- bsp/qemu-vexpress-a9/drivers/Kconfig | 36 +++++++++++++++++++++++++++--------- bsp/qemu-vexpress-a9/qemu.sh | 2 +- 3 files changed, 28 insertions(+), 19 deletions(-) (limited to 'bsp') diff --git a/bsp/qemu-vexpress-a9/Kconfig b/bsp/qemu-vexpress-a9/Kconfig index b2bdfe704d..75aeadae60 100644 --- a/bsp/qemu-vexpress-a9/Kconfig +++ b/bsp/qemu-vexpress-a9/Kconfig @@ -17,13 +17,4 @@ config PKGS_DIR source "$RTT_DIR/Kconfig" source "$PKGS_DIR/Kconfig" - -config SOC_VEXPRESS_A9 - bool - select ARCH_ARM_CORTEX_A9 - select RT_USING_COMPONENTS_INIT - select RT_USING_USER_MAIN - select RT_USING_GIC_V2 - default y - source "$BSP_DIR/drivers/Kconfig" diff --git a/bsp/qemu-vexpress-a9/drivers/Kconfig b/bsp/qemu-vexpress-a9/drivers/Kconfig index 724737725f..2a1be6dc8a 100644 --- a/bsp/qemu-vexpress-a9/drivers/Kconfig +++ b/bsp/qemu-vexpress-a9/drivers/Kconfig @@ -1,13 +1,25 @@ +menu "Hardware Drivers Config" + +config SOC_VEXPRESS_A9 + bool + select ARCH_ARM_CORTEX_A9 + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + select RT_USING_GIC_V2 + default y + +menu "Onboard Peripheral Drivers" config RT_USING_UART0 bool "Enable UART0" - default n + default y config RT_USING_UART1 bool "Enable UART1" default y config BSP_USING_LVGL - bool "Enable LVGL" + bool "Enable LVGL for LCD" + select PKG_USING_LVGL default n config BSP_DRV_CLCD @@ -22,20 +34,26 @@ config BSP_DRV_MOUSE if BSP_DRV_CLCD config BSP_LCD_WIDTH - int "Width of LCD panel" - default 640 + int "Width of LCD panel" + default 640 config BSP_LCD_HEIGHT - int "Height of LCD panel" - default 480 + int "Height of LCD panel" + default 480 endif config BSP_DRV_EMAC - bool "EMAC driver" - depends on RT_USING_LWIP - default y + bool "Enable EMAC driver" + select RT_USING_LWIP + select RT_USING_SAL + select SAL_USING_POSIX + default n config BSP_DRV_AUDIO bool "Audio driver" select RT_USING_AUDIO default n + +endmenu + +endmenu diff --git a/bsp/qemu-vexpress-a9/qemu.sh b/bsp/qemu-vexpress-a9/qemu.sh index ff2cec6f81..d819732cb4 100755 --- a/bsp/qemu-vexpress-a9/qemu.sh +++ b/bsp/qemu-vexpress-a9/qemu.sh @@ -2,4 +2,4 @@ if [ ! -f "sd.bin" ]; then dd if=/dev/zero of=sd.bin bs=1024 count=65536 fi -qemu-system-arm -M vexpress-a9 -smp cpus=2 -kernel rtthread.bin -serial stdio -sd sd.bin +qemu-system-arm -M vexpress-a9 -smp cpus=2 -kernel rtthread.bin -serial stdio -sd sd.bin -show-curse -- cgit v1.3.1 From 81b84ab16605b5b87c3b965050f86eef06e204ec Mon Sep 17 00:00:00 2001 From: qinge Date: Fri, 10 Dec 2021 15:30:30 +0800 Subject: 完善了STM32H7系列SPI使用DMA的驱动 1.使能DMA时钟的条件编译中加入了STM32H7 2.添加STM32H7 "spi_config" 中的request字段 3.DMA初始化FiFo相关的初始化的条件编译选项中加入STM32H7 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h | 10 ++++++++++ bsp/stm32/libraries/HAL_Drivers/drv_spi.c | 12 ++++++------ 2 files changed, 16 insertions(+), 6 deletions(-) (limited to 'bsp') diff --git a/bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h index 79d2d83c0a..925ffa7197 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h @@ -35,6 +35,7 @@ extern "C" { .dma_rcc = SPI1_TX_DMA_RCC, \ .Instance = SPI1_TX_DMA_INSTANCE, \ .dma_irq = SPI1_TX_DMA_IRQ, \ + .request = DMA_REQUEST_SPI1_TX \ } #endif /* SPI1_TX_DMA_CONFIG */ #endif /* BSP_SPI1_TX_USING_DMA */ @@ -46,6 +47,7 @@ extern "C" { .dma_rcc = SPI1_RX_DMA_RCC, \ .Instance = SPI1_RX_DMA_INSTANCE, \ .dma_irq = SPI1_RX_DMA_IRQ, \ + .request = DMA_REQUEST_SPI1_RX \ } #endif /* SPI1_RX_DMA_CONFIG */ #endif /* BSP_SPI1_RX_USING_DMA */ @@ -68,6 +70,7 @@ extern "C" { .dma_rcc = SPI2_TX_DMA_RCC, \ .Instance = SPI2_TX_DMA_INSTANCE, \ .dma_irq = SPI2_TX_DMA_IRQ, \ + .request = DMA_REQUEST_SPI2_TX \ } #endif /* SPI2_TX_DMA_CONFIG */ #endif /* BSP_SPI2_TX_USING_DMA */ @@ -79,6 +82,7 @@ extern "C" { .dma_rcc = SPI2_RX_DMA_RCC, \ .Instance = SPI2_RX_DMA_INSTANCE, \ .dma_irq = SPI2_RX_DMA_IRQ, \ + .request = DMA_REQUEST_SPI2_RX \ } #endif /* SPI2_RX_DMA_CONFIG */ #endif /* BSP_SPI2_RX_USING_DMA */ @@ -101,6 +105,7 @@ extern "C" { .dma_rcc = SPI3_TX_DMA_RCC, \ .Instance = SPI3_TX_DMA_INSTANCE, \ .dma_irq = SPI3_TX_DMA_IRQ, \ + .request = DMA_REQUEST_SPI3_TX \ } #endif /* SPI3_TX_DMA_CONFIG */ #endif /* BSP_SPI3_TX_USING_DMA */ @@ -112,6 +117,7 @@ extern "C" { .dma_rcc = SPI3_RX_DMA_RCC, \ .Instance = SPI3_RX_DMA_INSTANCE, \ .dma_irq = SPI3_RX_DMA_IRQ, \ + .request = DMA_REQUEST_SPI3_RX \ } #endif /* SPI3_RX_DMA_CONFIG */ #endif /* BSP_SPI3_RX_USING_DMA */ @@ -134,6 +140,7 @@ extern "C" { .dma_rcc = SPI4_TX_DMA_RCC, \ .Instance = SPI4_TX_DMA_INSTANCE, \ .dma_irq = SPI4_TX_DMA_IRQ, \ + .request = DMA_REQUEST_SPI4_TX \ } #endif /* SPI4_TX_DMA_CONFIG */ #endif /* BSP_SPI4_TX_USING_DMA */ @@ -145,6 +152,7 @@ extern "C" { .dma_rcc = SPI4_RX_DMA_RCC, \ .Instance = SPI4_RX_DMA_INSTANCE, \ .dma_irq = SPI4_RX_DMA_IRQ, \ + .request = DMA_REQUEST_SPI4_RX \ } #endif /* SPI4_RX_DMA_CONFIG */ #endif /* BSP_SPI4_RX_USING_DMA */ @@ -167,6 +175,7 @@ extern "C" { .dma_rcc = SPI5_TX_DMA_RCC, \ .Instance = SPI5_TX_DMA_INSTANCE, \ .dma_irq = SPI5_TX_DMA_IRQ, \ + .request = DMA_REQUEST_SPI5_TX \ } #endif /* SPI5_TX_DMA_CONFIG */ #endif /* BSP_SPI5_TX_USING_DMA */ @@ -178,6 +187,7 @@ extern "C" { .dma_rcc = SPI5_RX_DMA_RCC, \ .Instance = SPI5_RX_DMA_INSTANCE, \ .dma_irq = SPI5_RX_DMA_IRQ, \ + .request = DMA_REQUEST_SPI5_RX \ } #endif /* SPI5_RX_DMA_CONFIG */ #endif /* BSP_SPI5_RX_USING_DMA */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_spi.c b/bsp/stm32/libraries/HAL_Drivers/drv_spi.c index 9b5dcc0885..7630d39189 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_spi.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_spi.c @@ -432,7 +432,7 @@ static int rt_hw_spi_bus_init(void) spi_bus_obj[i].dma.handle_rx.Instance = spi_config[i].dma_rx->Instance; #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) spi_bus_obj[i].dma.handle_rx.Init.Channel = spi_config[i].dma_rx->channel; -#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) +#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7) spi_bus_obj[i].dma.handle_rx.Init.Request = spi_config[i].dma_rx->request; #endif spi_bus_obj[i].dma.handle_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; @@ -442,7 +442,7 @@ static int rt_hw_spi_bus_init(void) spi_bus_obj[i].dma.handle_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; spi_bus_obj[i].dma.handle_rx.Init.Mode = DMA_NORMAL; spi_bus_obj[i].dma.handle_rx.Init.Priority = DMA_PRIORITY_HIGH; -#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32MP1) +#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) spi_bus_obj[i].dma.handle_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; spi_bus_obj[i].dma.handle_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; spi_bus_obj[i].dma.handle_rx.Init.MemBurst = DMA_MBURST_INC4; @@ -455,7 +455,7 @@ static int rt_hw_spi_bus_init(void) /* enable DMA clock && Delay after an RCC peripheral clock enabling*/ SET_BIT(RCC->AHBENR, spi_config[i].dma_rx->dma_rcc); tmpreg = READ_BIT(RCC->AHBENR, spi_config[i].dma_rx->dma_rcc); -#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WB) +#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7) SET_BIT(RCC->AHB1ENR, spi_config[i].dma_rx->dma_rcc); /* Delay after an RCC peripheral clock enabling */ tmpreg = READ_BIT(RCC->AHB1ENR, spi_config[i].dma_rx->dma_rcc); @@ -474,7 +474,7 @@ static int rt_hw_spi_bus_init(void) spi_bus_obj[i].dma.handle_tx.Instance = spi_config[i].dma_tx->Instance; #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) spi_bus_obj[i].dma.handle_tx.Init.Channel = spi_config[i].dma_tx->channel; -#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) +#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7) spi_bus_obj[i].dma.handle_tx.Init.Request = spi_config[i].dma_tx->request; #endif spi_bus_obj[i].dma.handle_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; @@ -484,7 +484,7 @@ static int rt_hw_spi_bus_init(void) spi_bus_obj[i].dma.handle_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; spi_bus_obj[i].dma.handle_tx.Init.Mode = DMA_NORMAL; spi_bus_obj[i].dma.handle_tx.Init.Priority = DMA_PRIORITY_LOW; -#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32MP1) +#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) spi_bus_obj[i].dma.handle_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; spi_bus_obj[i].dma.handle_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; spi_bus_obj[i].dma.handle_tx.Init.MemBurst = DMA_MBURST_INC4; @@ -497,7 +497,7 @@ static int rt_hw_spi_bus_init(void) /* enable DMA clock && Delay after an RCC peripheral clock enabling*/ SET_BIT(RCC->AHBENR, spi_config[i].dma_tx->dma_rcc); tmpreg = READ_BIT(RCC->AHBENR, spi_config[i].dma_tx->dma_rcc); -#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WB) +#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32H7) SET_BIT(RCC->AHB1ENR, spi_config[i].dma_tx->dma_rcc); /* Delay after an RCC peripheral clock enabling */ tmpreg = READ_BIT(RCC->AHB1ENR, spi_config[i].dma_tx->dma_rcc); -- cgit v1.3.1 From 18da37aacc26bda831d9770f99007c64b8868f6b Mon Sep 17 00:00:00 2001 From: qinge Date: Fri, 10 Dec 2021 15:57:20 +0800 Subject: 修改格式，调整对齐 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../libraries/HAL_Drivers/config/h7/spi_config.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'bsp') diff --git a/bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h index 925ffa7197..58879e62d1 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h @@ -35,7 +35,7 @@ extern "C" { .dma_rcc = SPI1_TX_DMA_RCC, \ .Instance = SPI1_TX_DMA_INSTANCE, \ .dma_irq = SPI1_TX_DMA_IRQ, \ - .request = DMA_REQUEST_SPI1_TX \ + .request = DMA_REQUEST_SPI1_TX \ } #endif /* SPI1_TX_DMA_CONFIG */ #endif /* BSP_SPI1_TX_USING_DMA */ @@ -47,7 +47,7 @@ extern "C" { .dma_rcc = SPI1_RX_DMA_RCC, \ .Instance = SPI1_RX_DMA_INSTANCE, \ .dma_irq = SPI1_RX_DMA_IRQ, \ - .request = DMA_REQUEST_SPI1_RX \ + .request = DMA_REQUEST_SPI1_RX \ } #endif /* SPI1_RX_DMA_CONFIG */ #endif /* BSP_SPI1_RX_USING_DMA */ @@ -70,7 +70,7 @@ extern "C" { .dma_rcc = SPI2_TX_DMA_RCC, \ .Instance = SPI2_TX_DMA_INSTANCE, \ .dma_irq = SPI2_TX_DMA_IRQ, \ - .request = DMA_REQUEST_SPI2_TX \ + .request = DMA_REQUEST_SPI2_TX \ } #endif /* SPI2_TX_DMA_CONFIG */ #endif /* BSP_SPI2_TX_USING_DMA */ @@ -82,7 +82,7 @@ extern "C" { .dma_rcc = SPI2_RX_DMA_RCC, \ .Instance = SPI2_RX_DMA_INSTANCE, \ .dma_irq = SPI2_RX_DMA_IRQ, \ - .request = DMA_REQUEST_SPI2_RX \ + .request = DMA_REQUEST_SPI2_RX \ } #endif /* SPI2_RX_DMA_CONFIG */ #endif /* BSP_SPI2_RX_USING_DMA */ @@ -105,7 +105,7 @@ extern "C" { .dma_rcc = SPI3_TX_DMA_RCC, \ .Instance = SPI3_TX_DMA_INSTANCE, \ .dma_irq = SPI3_TX_DMA_IRQ, \ - .request = DMA_REQUEST_SPI3_TX \ + .request = DMA_REQUEST_SPI3_TX \ } #endif /* SPI3_TX_DMA_CONFIG */ #endif /* BSP_SPI3_TX_USING_DMA */ @@ -117,7 +117,7 @@ extern "C" { .dma_rcc = SPI3_RX_DMA_RCC, \ .Instance = SPI3_RX_DMA_INSTANCE, \ .dma_irq = SPI3_RX_DMA_IRQ, \ - .request = DMA_REQUEST_SPI3_RX \ + .request = DMA_REQUEST_SPI3_RX \ } #endif /* SPI3_RX_DMA_CONFIG */ #endif /* BSP_SPI3_RX_USING_DMA */ @@ -140,7 +140,7 @@ extern "C" { .dma_rcc = SPI4_TX_DMA_RCC, \ .Instance = SPI4_TX_DMA_INSTANCE, \ .dma_irq = SPI4_TX_DMA_IRQ, \ - .request = DMA_REQUEST_SPI4_TX \ + .request = DMA_REQUEST_SPI4_TX \ } #endif /* SPI4_TX_DMA_CONFIG */ #endif /* BSP_SPI4_TX_USING_DMA */ @@ -152,7 +152,7 @@ extern "C" { .dma_rcc = SPI4_RX_DMA_RCC, \ .Instance = SPI4_RX_DMA_INSTANCE, \ .dma_irq = SPI4_RX_DMA_IRQ, \ - .request = DMA_REQUEST_SPI4_RX \ + .request = DMA_REQUEST_SPI4_RX \ } #endif /* SPI4_RX_DMA_CONFIG */ #endif /* BSP_SPI4_RX_USING_DMA */ @@ -175,7 +175,7 @@ extern "C" { .dma_rcc = SPI5_TX_DMA_RCC, \ .Instance = SPI5_TX_DMA_INSTANCE, \ .dma_irq = SPI5_TX_DMA_IRQ, \ - .request = DMA_REQUEST_SPI5_TX \ + .request = DMA_REQUEST_SPI5_TX \ } #endif /* SPI5_TX_DMA_CONFIG */ #endif /* BSP_SPI5_TX_USING_DMA */ @@ -187,7 +187,7 @@ extern "C" { .dma_rcc = SPI5_RX_DMA_RCC, \ .Instance = SPI5_RX_DMA_INSTANCE, \ .dma_irq = SPI5_RX_DMA_IRQ, \ - .request = DMA_REQUEST_SPI5_RX \ + .request = DMA_REQUEST_SPI5_RX \ } #endif /* SPI5_RX_DMA_CONFIG */ #endif /* BSP_SPI5_RX_USING_DMA */ -- cgit v1.3.1 From b6d90dffcfcf4339166c38d32a626459b4bfada3 Mon Sep 17 00:00:00 2001 From: iysheng Date: Fri, 10 Dec 2021 16:25:40 +0800 Subject: [bsp][stm32] Modify variable name p_tm to tm --- bsp/stm32/libraries/HAL_Drivers/drv_rtc.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'bsp') diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c b/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c index 16ec84b0da..149e16871b 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c @@ -65,21 +65,21 @@ static rt_err_t set_rtc_time_stamp(time_t time_stamp) { RTC_TimeTypeDef RTC_TimeStruct = {0}; RTC_DateTypeDef RTC_DateStruct = {0}; - struct tm p_tm = {0}; + struct tm tm = {0}; - gmtime_r(&time_stamp, &p_tm); - if (p_tm.tm_year < 100) + gmtime_r(&time_stamp, &tm); + if (tm.tm_year < 100) { return -RT_ERROR; } - RTC_TimeStruct.Seconds = p_tm.tm_sec ; - RTC_TimeStruct.Minutes = p_tm.tm_min ; - RTC_TimeStruct.Hours = p_tm.tm_hour; - RTC_DateStruct.Date = p_tm.tm_mday; - RTC_DateStruct.Month = p_tm.tm_mon + 1 ; - RTC_DateStruct.Year = p_tm.tm_year - 100; - RTC_DateStruct.WeekDay = p_tm.tm_wday + 1; + RTC_TimeStruct.Seconds = tm.tm_sec ; + RTC_TimeStruct.Minutes = tm.tm_min ; + RTC_TimeStruct.Hours = tm.tm_hour; + RTC_DateStruct.Date = tm.tm_mday; + RTC_DateStruct.Month = tm.tm_mon + 1 ; + RTC_DateStruct.Year = tm.tm_year - 100; + RTC_DateStruct.WeekDay = tm.tm_wday + 1; if (HAL_RTC_SetTime(&RTC_Handler, &RTC_TimeStruct, RTC_FORMAT_BIN) != HAL_OK) { -- cgit v1.3.1 From b25e761712a4dece0d718d750ec4687661fa354e Mon Sep 17 00:00:00 2001 From: Lyon <88232613+pikasTech@users.noreply.github.com> Date: Sun, 12 Dec 2021 23:39:01 +0800 Subject: add stack size to avoid stack overflow when boot --- bsp/ls1cdev/rtconfig.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'bsp') diff --git a/bsp/ls1cdev/rtconfig.h b/bsp/ls1cdev/rtconfig.h index d4075e371a..b7c66b207e 100644 --- a/bsp/ls1cdev/rtconfig.h +++ b/bsp/ls1cdev/rtconfig.h @@ -15,7 +15,7 @@ #define RT_USING_HOOK #define RT_USING_IDLE_HOOK #define RT_IDLE_HOOK_LIST_SIZE 4 -#define IDLE_THREAD_STACK_SIZE 1024 +#define IDLE_THREAD_STACK_SIZE 8192 /* kservice optimization */ @@ -50,7 +50,7 @@ #define RT_USING_COMPONENTS_INIT #define RT_USING_USER_MAIN -#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_STACK_SIZE 8192 #define RT_MAIN_THREAD_PRIORITY 10 /* C++ features */ @@ -63,7 +63,7 @@ #define FINSH_USING_MSH #define FINSH_THREAD_NAME "tshell" #define FINSH_THREAD_PRIORITY 20 -#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_THREAD_STACK_SIZE 8192 #define FINSH_USING_HISTORY #define FINSH_HISTORY_LINES 5 #define FINSH_USING_SYMTAB @@ -160,9 +160,9 @@ #define RT_LWIP_TCP_WND 2048 #define RT_LWIP_TCPTHREAD_PRIORITY 12 #define RT_LWIP_TCPTHREAD_MBOX_SIZE 8 -#define RT_LWIP_TCPTHREAD_STACKSIZE 4096 +#define RT_LWIP_TCPTHREAD_STACKSIZE 8192 #define RT_LWIP_ETHTHREAD_PRIORITY 14 -#define RT_LWIP_ETHTHREAD_STACKSIZE 512 +#define RT_LWIP_ETHTHREAD_STACKSIZE 8192 #define RT_LWIP_ETHTHREAD_MBOX_SIZE 8 #define LWIP_NETIF_STATUS_CALLBACK 1 #define LWIP_NETIF_LINK_CALLBACK 1 -- cgit v1.3.1 From 84ebf384627403d1272cde172daa5fa206ce5ad2 Mon Sep 17 00:00:00 2001 From: "Z.Y.Ma" <49769968+cndabai@users.noreply.github.com> Date: Mon, 13 Dec 2021 09:42:33 +0800 Subject: add stm32g474-st-nucleo bsp (#5362) * add stm32g474-st-nucleo bsp * format * format --- bsp/stm32/stm32g474-st-nucleo/.config | 651 +++++ bsp/stm32/stm32g474-st-nucleo/.gitignore | 42 + bsp/stm32/stm32g474-st-nucleo/Kconfig | 21 + bsp/stm32/stm32g474-st-nucleo/README.md | 98 + bsp/stm32/stm32g474-st-nucleo/README_zh.md | 106 + bsp/stm32/stm32g474-st-nucleo/SConscript | 15 + bsp/stm32/stm32g474-st-nucleo/SConstruct | 60 + .../stm32g474-st-nucleo/applications/SConscript | 12 + bsp/stm32/stm32g474-st-nucleo/applications/main.c | 30 + .../board/CubeMX_Config/.mxproject | 18 + .../board/CubeMX_Config/CubeMX_Config.ioc | 203 ++ .../board/CubeMX_Config/Inc/main.h | 86 + .../board/CubeMX_Config/Inc/stm32g4xx_hal_conf.h | 382 +++ .../board/CubeMX_Config/Inc/stm32g4xx_it.h | 69 + .../board/CubeMX_Config/Src/main.c | 422 +++ .../board/CubeMX_Config/Src/stm32g4xx_hal_msp.c | 277 ++ .../board/CubeMX_Config/Src/stm32g4xx_it.c | 203 ++ .../board/CubeMX_Config/Src/system_stm32g4xx.c | 271 ++ bsp/stm32/stm32g474-st-nucleo/board/Kconfig | 70 + bsp/stm32/stm32g474-st-nucleo/board/SConscript | 30 + bsp/stm32/stm32g474-st-nucleo/board/board.c | 60 + bsp/stm32/stm32g474-st-nucleo/board/board.h | 43 + .../board/linker_scripts/link.icf | 28 + .../board/linker_scripts/link.lds | 158 ++ .../board/linker_scripts/link.sct | 15 + bsp/stm32/stm32g474-st-nucleo/figures/board.jpg | Bin 0 -> 125195 bytes bsp/stm32/stm32g474-st-nucleo/project.ewd | 2834 ++++++++++++++++++++ bsp/stm32/stm32g474-st-nucleo/project.ewp | 2274 ++++++++++++++++ bsp/stm32/stm32g474-st-nucleo/project.eww | 10 + bsp/stm32/stm32g474-st-nucleo/project.uvoptx | 920 +++++++ bsp/stm32/stm32g474-st-nucleo/project.uvprojx | 713 +++++ bsp/stm32/stm32g474-st-nucleo/rtconfig.h | 205 ++ bsp/stm32/stm32g474-st-nucleo/rtconfig.py | 184 ++ bsp/stm32/stm32g474-st-nucleo/template.ewp | 2040 ++++++++++++++ bsp/stm32/stm32g474-st-nucleo/template.eww | 10 + bsp/stm32/stm32g474-st-nucleo/template.uvoptx | 192 ++ bsp/stm32/stm32g474-st-nucleo/template.uvprojx | 396 +++ 37 files changed, 13148 insertions(+) create mode 100644 bsp/stm32/stm32g474-st-nucleo/.config create mode 100644 bsp/stm32/stm32g474-st-nucleo/.gitignore create mode 100644 bsp/stm32/stm32g474-st-nucleo/Kconfig create mode 100644 bsp/stm32/stm32g474-st-nucleo/README.md create mode 100644 bsp/stm32/stm32g474-st-nucleo/README_zh.md create mode 100644 bsp/stm32/stm32g474-st-nucleo/SConscript create mode 100644 bsp/stm32/stm32g474-st-nucleo/SConstruct create mode 100644 bsp/stm32/stm32g474-st-nucleo/applications/SConscript create mode 100644 bsp/stm32/stm32g474-st-nucleo/applications/main.c create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/.mxproject create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Inc/main.h create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Inc/stm32g4xx_hal_conf.h create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Inc/stm32g4xx_it.h create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/main.c create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/stm32g4xx_hal_msp.c create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/stm32g4xx_it.c create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/system_stm32g4xx.c create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/Kconfig create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/SConscript create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/board.c create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/board.h create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/linker_scripts/link.icf create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/linker_scripts/link.lds create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/linker_scripts/link.sct create mode 100644 bsp/stm32/stm32g474-st-nucleo/figures/board.jpg create mode 100644 bsp/stm32/stm32g474-st-nucleo/project.ewd create mode 100644 bsp/stm32/stm32g474-st-nucleo/project.ewp create mode 100644 bsp/stm32/stm32g474-st-nucleo/project.eww create mode 100644 bsp/stm32/stm32g474-st-nucleo/project.uvoptx create mode 100644 bsp/stm32/stm32g474-st-nucleo/project.uvprojx create mode 100644 bsp/stm32/stm32g474-st-nucleo/rtconfig.h create mode 100644 bsp/stm32/stm32g474-st-nucleo/rtconfig.py create mode 100644 bsp/stm32/stm32g474-st-nucleo/template.ewp create mode 100644 bsp/stm32/stm32g474-st-nucleo/template.eww create mode 100644 bsp/stm32/stm32g474-st-nucleo/template.uvoptx create mode 100644 bsp/stm32/stm32g474-st-nucleo/template.uvprojx (limited to 'bsp') diff --git a/bsp/stm32/stm32g474-st-nucleo/.config b/bsp/stm32/stm32g474-st-nucleo/.config new file mode 100644 index 0000000000..4c15a89c9a --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/.config @@ -0,0 +1,651 @@ +# +# Automatically generated file; DO NOT EDIT. +# RT-Thread Configuration +# + +# +# RT-Thread Kernel +# +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_BIG_ENDIAN is not set +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_ALIGN_SIZE=4 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +# CONFIG_RT_USING_TIMER_SOFT is not set + +# +# kservice optimization +# +# CONFIG_RT_KSERVICE_USING_STDLIB is not set +# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set +# CONFIG_RT_USING_ASM_MEMCPY is not set +# CONFIG_RT_USING_ASM_MEMSET is not set +# CONFIG_RT_USING_TINY_FFS is not set +# CONFIG_RT_PRINTF_LONGLONG is not set +CONFIG_RT_DEBUG=y +CONFIG_RT_DEBUG_COLOR=y +# CONFIG_RT_DEBUG_INIT_CONFIG is not set +# CONFIG_RT_DEBUG_THREAD_CONFIG is not set +# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set +# CONFIG_RT_DEBUG_IPC_CONFIG is not set +# CONFIG_RT_DEBUG_TIMER_CONFIG is not set +# CONFIG_RT_DEBUG_IRQ_CONFIG is not set +# CONFIG_RT_DEBUG_MEM_CONFIG is not set +# CONFIG_RT_DEBUG_SLAB_CONFIG is not set +# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set +# CONFIG_RT_DEBUG_MODULE_CONFIG is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_SIGNALS is not set + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +# CONFIG_RT_USING_MEMHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +CONFIG_RT_USING_HEAP=y + +# +# Kernel Device Object +# +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="lpuart1" +CONFIG_RT_VER_NUM=0x40100 +CONFIG_ARCH_ARM=y +CONFIG_RT_USING_CPU_FFS=y +CONFIG_ARCH_ARM_CORTEX_M=y +CONFIG_ARCH_ARM_CORTEX_M4=y +# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 +# CONFIG_RT_USING_LEGACY is not set + +# +# C++ features +# +# CONFIG_RT_USING_CPLUSPLUS is not set + +# +# Command shell +# +CONFIG_RT_USING_FINSH=y +CONFIG_RT_USING_MSH=y +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_ARG_MAX=10 + +# +# Device virtual file system +# +# CONFIG_RT_USING_DFS is not set + +# +# Device Drivers +# +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_PIPE_BUFSZ=512 +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_WIFI is not set + +# +# Using USB +# +# CONFIG_RT_USING_USB is not set +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set + +# +# POSIX layer and C standard library +# +# CONFIG_RT_USING_LIBC is not set +CONFIG_RT_LIBC_USING_TIME=y +CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 + +# +# POSIX (Portable Operating System Interface) layer +# +# CONFIG_RT_USING_POSIX_FS is not set +# CONFIG_RT_USING_POSIX_DELAY is not set +# CONFIG_RT_USING_POSIX_GETLINE is not set +# CONFIG_RT_USING_PTHREADS is not set + +# +# Network +# + +# +# Socket abstraction layer +# +# CONFIG_RT_USING_SAL is not set + +# +# Network interface device +# +# CONFIG_RT_USING_NETDEV is not set + +# +# light weight TCP/IP stack +# +# CONFIG_RT_USING_LWIP is not set + +# +# AT commands +# +# CONFIG_RT_USING_AT is not set + +# +# VBUS(Virtual Software BUS) +# +# CONFIG_RT_USING_VBUS is not set + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set +# CONFIG_RT_USING_RT_LINK is not set +# CONFIG_RT_USING_LWP is not set + +# +# RT-Thread Utestcases +# +# CONFIG_RT_USING_UTESTCASES is not set + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_LIBMODBUS is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_EZXML is not set +# CONFIG_PKG_USING_NANOPB is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# CONFIG_PKG_USING_RW007 is not set +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set +# CONFIG_PKG_USING_ZB_COORDINATOR is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set +# CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_LORA_PKT_FWD is not set +# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set +# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set +# CONFIG_PKG_USING_HM is not set +# CONFIG_PKG_USING_SMALL_MODBUS is not set + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_LIBSODIUM is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set + +# +# language packages +# +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set +# CONFIG_PKG_USING_PIKASCRIPT is not set + +# +# multimedia packages +# + +# +# LVGL: powerful and easy-to-use embedded GUI library +# +# CONFIG_PKG_USING_LVGL is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set +# CONFIG_PKG_USING_UGUI is not set + +# +# PainterEngine: A cross-platform graphics application framework written in C language +# +# CONFIG_PKG_USING_PAINTERENGINE is not set +# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_ULOG_FILE is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set +# CONFIG_PKG_USING_FDT is not set + +# +# system packages +# + +# +# enhanced kernel services +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set + +# +# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard +# +# CONFIG_PKG_USING_CMSIS_5 is not set +# CONFIG_PKG_USING_CMSIS_5_AUX is not set +# CONFIG_PKG_USING_CMSIS_RTOS2 is not set + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_PERSIMMON is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_FAL is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set +# CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_WCWIDTH is not set +# CONFIG_PKG_USING_MCUBOOT is not set +# CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_USB_STACK is not set + +# +# peripheral libraries and drivers +# +# CONFIG_PKG_USING_SENSORS_DRIVERS is not set +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_WM_LIBRARIES is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_TOUCH_DRIVERS is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set +# CONFIG_PKG_USING_MCP23008 is not set +# CONFIG_PKG_USING_BLUETRUM_SDK is not set +# CONFIG_PKG_USING_MISAKA_AT24CXX is not set +# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set +# CONFIG_PKG_USING_BL_MCU_SDK is not set +# CONFIG_PKG_USING_SOFT_SERIAL is not set +# CONFIG_PKG_USING_MB85RS16 is not set + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set + +# +# miscellaneous packages +# + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_CMATRIX is not set +# CONFIG_PKG_USING_SL is not set +# CONFIG_PKG_USING_CAL is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_UKAL is not set +# CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_TERMBOX is not set +CONFIG_SOC_FAMILY_STM32=y +CONFIG_SOC_SERIES_STM32G4=y + +# +# Hardware Drivers Config +# +CONFIG_SOC_STM32G474RE=y + +# +# Onboard Peripheral Drivers +# + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_LPUART1=y +# CONFIG_BSP_LPUART1_RX_USING_DMA is not set +# CONFIG_BSP_USING_UART1 is not set +# CONFIG_BSP_USING_UART3 is not set +# CONFIG_BSP_USING_UART4 is not set +# CONFIG_BSP_USING_UDID is not set + +# +# Board extended module Drivers +# diff --git a/bsp/stm32/stm32g474-st-nucleo/.gitignore b/bsp/stm32/stm32g474-st-nucleo/.gitignore new file mode 100644 index 0000000000..7221bde019 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/.gitignore @@ -0,0 +1,42 @@ +*.pyc +*.map +*.dblite +*.elf +*.bin +*.hex +*.axf +*.exe +*.pdb +*.idb +*.ilk +*.old +build +Debug +documentation/html +packages/ +*~ +*.o +*.obj +*.out +*.bak +*.dep +*.lib +*.i +*.d +.DS_Stor* +.config 3 +.config 4 +.config 5 +Midea-X1 +*.uimg +GPATH +GRTAGS +GTAGS +.vscode +JLinkLog.txt +JLinkSettings.ini +DebugConfig/ +RTE/ +settings/ +*.uvguix* +cconfig.h diff --git a/bsp/stm32/stm32g474-st-nucleo/Kconfig b/bsp/stm32/stm32g474-st-nucleo/Kconfig new file mode 100644 index 0000000000..8cbc7b71a8 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/Kconfig @@ -0,0 +1,21 @@ +mainmenu "RT-Thread Configuration" + +config BSP_DIR + string + option env="BSP_ROOT" + default "." + +config RTT_DIR + string + option env="RTT_ROOT" + default "../../.." + +config PKGS_DIR + string + option env="PKGS_ROOT" + default "packages" + +source "$RTT_DIR/Kconfig" +source "$PKGS_DIR/Kconfig" +source "../libraries/Kconfig" +source "board/Kconfig" diff --git a/bsp/stm32/stm32g474-st-nucleo/README.md b/bsp/stm32/stm32g474-st-nucleo/README.md new file mode 100644 index 0000000000..2a99ebbc0e --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/README.md @@ -0,0 +1,98 @@ +# STM32G431-Nucleo BSP Introduction + +[中文](README_zh.md) + +## MCU: STM32G474RB @170MHz, 512KB FLASH, 128KB RAM + +The STM32G474xB/xC/xE devices are based on the high-performance Arm® Cortex®-M4 32-bit RISC core. They operate at a frequency of up to 170 MHz. The Cortex-M4 core features a single-precision floating-point unit (FPU), which supports all the Arm single-precision data-processing instructions and all the data types. It also implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) which enhances the application’s security. +These devices embed high-speed memories (up to 512 Kbytes of Flash memory, and 128 Kbytes of SRAM), a flexible external memory controller (FSMC) for static memories (for devices with packages of 100 pins and more), a Quad-SPI Flash memory interface, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix. +The devices also embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection, securable memory area and proprietary code readout protection. +The devices embed peripherals allowing mathematical/arithmetic function acceleration (CORDIC for trigonometric functions and FMAC unit for filter functions). +They offer five fast 12-bit ADCs (4 Msps), seven comparators, six operational amplifiers, seven DAC channels (3 external and 4 internal), an internal voltage reference buffer, a low-power RTC, two general-purpose 32-bit timers, three 16-bit PWM timers dedicated to motor control, seven general-purpose 16-bit timers, and one 16-bit low-power timer, and high resolution timer with 184 ps resolution. +They also feature standard and advanced communication interfaces such as: +\- Four I2Cs +\- Four SPIs multiplexed with two half duplex I2Ss +\- Three USARTs, two UARTs and one low-power UART. +\- Three FDCANs +\- One SAI +\- USB device +\- UCPD +The devices operate in the -40 to +85 °C (+105 °C junction) and -40 to +125 °C (+130 °C junction) temperature ranges from a 1.71 to 3.6 V power supply. A comprehensive set of power-saving modes allows the design of low-power applications. +Some independent power supplies are supported including an analog independent supply input for ADC, DAC, OPAMPs and comparators. A VBAT input allows backup of the RTC and the registers. +The STM32G474xB/xC/xE family offers 9 packages from 48-pin to 128-pin. + +#### KEY FEATURES + +- Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory, frequency up to 170 MHz with 213 DMIPS, MPU, DSP instructions +- Operating conditions: + - VDD, VDDA voltage range: 1.71 V to 3.6 V +- Mathematical hardware accelerators + - CORDIC for trigonometric functions acceleration + - FMAC: filter mathematical accelerator +- Memories + - 512 Kbytes of Flash memory with ECC support, two banks read-while-write, proprietary code readout protection (PCROP), securable memory area, 1 Kbyte OTP + - 96 Kbytes of SRAM, with hardware parity check implemented on the first 32 Kbytes + - Routine booster: 32 Kbytes of SRAM on instruction and data bus, with hardware parity check (CCM SRAM) + - External memory interface for static memories FSMC supporting SRAM, PSRAM, NOR and NAND memories + - Quad-SPI memory interface +- Reset and supply management + - Power-on/power-down reset (POR/PDR/BOR) + - Programmable voltage detector (PVD) + - Low-power modes: sleep, stop, standby and shutdown + - VBAT supply for RTC and backup registers +- Clock management + - 4 to 48 MHz crystal oscillator + - 32 kHz oscillator with calibration + - Internal 16 MHz RC with PLL option (± 1%) + - Internal 32 kHz RC oscillator (± 5%) +- Up to 107 fast I/Os + - All mappable on external interrupt vectors + - Several I/Os with 5 V tolerant capability +- Interconnect matrix +- 16-channel DMA controller +- 5 x 12-bit ADCs 0.25 µs, up to 42 channels. Resolution up to 16-bit with hardware oversampling, 0 to 3.6 V conversion range +- 7 x 12-bit DAC channels + - 3 x buffered external channels 1 MSPS + - 4 x unbuffered internal channels 15 MSPS +- 7 x ultra-fast rail-to-rail analog comparators +- 6 x operational amplifiers that can be used in PGA mode, all terminals accessible +- Internal voltage reference buffer (VREFBUF) supporting three output voltages (2.048 V, 2.5 V, 2.9 V) +- 17 timers: + - HRTIM (Hi-Resolution and complex waveform builder): 6 x16-bit counters, 184 ps resolution, 12 PWM + - 2 x 32-bit timer and 2 x 16-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input + - 3 x 16-bit 8-channel advanced motor control timers, with up to 8 x PWM channels, dead time generation and emergency stop + - 1 x 16-bit timer with 2 x IC/OCs, one OCN/PWM, dead time generation and emergency stop + - 2 x 16-bit timers with IC/OC/OCN/PWM, dead time generation and emergency stop + - 2 x watchdog timers (independent, window) + - 1 x SysTick timer: 24-bit downcounter + - 2 x 16-bit basic timers + - 1 x low-power timer +- Calendar RTC with alarm, periodic wakeup from stop/standby +- Communication interfaces + - 3 x FDCAN controller supporting flexible data rate + - 4 x I2C Fast mode plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus, wakeup from stop + - 5 x USART/UARTs (ISO 7816 interface, LIN, IrDA, modem control) + - 1 x LPUART + - 4 x SPIs, 4 to 16 programmable bit frames, 2 x with multiplexed half duplex I2S interface + - 1 x SAI (serial audio interface) + - USB 2.0 full-speed interface with LPM and BCD support + - IRTIM (infrared interface) + - USB Type-C™ /USB power delivery controller (UCPD) +- True random number generator (RNG) +- CRC calculation unit, 96-bit unique ID +- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™ + + + +## Read more + +| Documents | Description | +| :----------------------------------------------------------: | :----------------------------------------------------------: | +| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) | +| [STM32G474RE ST Official Website](https://www.st.com/en/microcontrollers-microprocessors/stm32g474re.html#documentation) | STM32G474RB datasheet and other resources | + + + +## Maintained By + +[mazhiyuan](https://github.com/cndabai), \ No newline at end of file diff --git a/bsp/stm32/stm32g474-st-nucleo/README_zh.md b/bsp/stm32/stm32g474-st-nucleo/README_zh.md new file mode 100644 index 0000000000..ec635370bb --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/README_zh.md @@ -0,0 +1,106 @@ +# NUCLEO-G474RE 开发板 BSP 说明 + +## 简介 + +本文档为 NUCLEO-G474RE 开发板的 BSP (板级支持包) 说明。 + +主要内容如下： + +- 开发板资源介绍 +- BSP 快速上手 +- 进阶使用方法 + +通过阅读快速上手章节开发者可以快速地上手该 BSP，将 RT-Thread 运行在开发板上。在进阶使用指南章节，将会介绍更多高级功能，帮助开发者利用 RT-Thread 驱动更多板载资源。 + +## 开发板介绍 + +NUCLEO-G474RE 是 ST 公司推出的一款针对 STM32G4 系列设计的 Cortex-M4 Nucleo-64 开发板。 + +开发板外观如下图所示： + +![board](figures/board.jpg) + +该开发板常用 **板载资源** 如下： + +- MCU：STM32G431RB，主频 170MHz，128KB FLASH ，32KB RAM +- 常用外设 + - LED：1个，LD2（黄色，PA5） +- 常用接口：USB 转串口 +- 调试接口，标准 ST-LINK/SWD + +开发板更多详细信息请参考【NUCLEO-G474RE】 [开发板介绍](https://www.st.com/zh/evaluation-tools/nucleo-g474re.html)。 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **板载外设** | **支持情况** | **备注** | +| :----------------- | :----------: | :------------------------------------- | +| USB 转串口 | 支持 | | +| **片上外设** | **支持情况** | **备注** | +| GPIO | 支持 | | +| UART | 支持 | LPUART1 USART1/3 UART4 | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + + +### 快速上手 + +本 BSP 为开发者提供 MDK5 和 IAR 工程，并且支持 GCC 开发环境。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板到 PC，通过数据线对开发板供电,下载,调试。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 ST-LINK 仿真器下载程序，在通过 ST-LINK 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，黄色的 LD2 以 500MS 周期闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 4.0.2 build Oct 5 2019 + 2006 - 2019 Copyright by rt-thread team +msh > +``` +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 LPUART1 的功能，如果需使用更多高级功能，需要利用 ENV 工具对 BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 + +本章节更多详细的介绍请参考 [STM32 系列 BSP 外设驱动使用教程](../docs/STM32系列BSP外设驱动使用教程.md)。 + +## 注意事项 + +- 默认终端输出设备是 LPUART1 + +## 联系人信息 + +维护人: + +- [mazhiyuan](https://github.com/cndabai), 邮箱： \ No newline at end of file diff --git a/bsp/stm32/stm32g474-st-nucleo/SConscript b/bsp/stm32/stm32g474-st-nucleo/SConscript new file mode 100644 index 0000000000..20f7689c53 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/stm32/stm32g474-st-nucleo/SConstruct b/bsp/stm32/stm32g474-st-nucleo/SConstruct new file mode 100644 index 0000000000..d32015f991 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/SConstruct @@ -0,0 +1,60 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +TARGET = 'rt-thread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM == 'iar': + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map') + +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +stm32_library = 'STM32G4xx_HAL' +rtconfig.BSP_LIBRARY_TYPE = stm32_library + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript'))) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/stm32/stm32g474-st-nucleo/applications/SConscript b/bsp/stm32/stm32g474-st-nucleo/applications/SConscript new file mode 100644 index 0000000000..6f66f7ab73 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/applications/SConscript @@ -0,0 +1,12 @@ +import rtconfig +from building import * + +cwd = GetCurrentDir() +CPPPATH = [cwd, str(Dir('#'))] +src = Split(""" +main.c +""") + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +Return('group') diff --git a/bsp/stm32/stm32g474-st-nucleo/applications/main.c b/bsp/stm32/stm32g474-st-nucleo/applications/main.c new file mode 100644 index 0000000000..5524d24935 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/applications/main.c @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-06 SummerGift first version + */ + +#include +#include +#include + +/* defined the LED2 pin: PA5 */ +#define LED2_PIN GET_PIN(A, 5) + +int main(void) +{ + /* set LED2 pin mode to output */ + rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT); + + while (1) + { + rt_pin_write(LED2_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED2_PIN, PIN_LOW); + rt_thread_mdelay(500); + } +} diff --git a/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/.mxproject b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/.mxproject new file mode 100644 index 0000000000..8e3663858b --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/.mxproject @@ -0,0 +1,18 @@ +[PreviousGenFiles] +HeaderPath=E:/Users/xzy47/Documents/GitHub/rt-thread/bsp/stm32/stm32g431-st-nucleo/board/CubeMX_Config/Inc +HeaderFiles=stm32f4xx_it.h;stm32f4xx_hal_conf.h;main.h;stm32g4xx_it.h;stm32g4xx_hal_conf.h; +SourcePath=E:/Users/xzy47/Documents/GitHub/rt-thread/bsp/stm32/stm32g431-st-nucleo/board/CubeMX_Config/Src +SourceFiles=stm32f4xx_it.c;stm32f4xx_hal_msp.c;main.c;stm32g4xx_it.c;stm32g4xx_hal_msp.c; + +[PreviousLibFiles] +LibFiles=Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h;Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h;Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h;Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h;Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h;Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h;Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/system_stm32g4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h; + +[PreviousUsedIarFiles] +SourceFiles=..\Src\main.c;..\Src\stm32f4xx_it.c;..\Src\stm32f4xx_hal_msp.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../\Src/system_stm32f4xx.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../\Src/system_stm32f4xx.c;../Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;null; +HeaderPath=..\Drivers\STM32F4xx_HAL_Driver\Inc;..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F4xx\Include;..\Drivers\CMSIS\Include;..\Inc; + +[PreviousUsedKeilFiles] +SourceFiles=..\Src\main.c;..\Src\stm32g4xx_it.c;..\Src\stm32g4xx_hal_msp.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c;../\Src/system_stm32g4xx.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c;../\Src/system_stm32g4xx.c;../Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/system_stm32g4xx.c;null; +HeaderPath=..\Drivers\STM32G4xx_HAL_Driver\Inc;..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\Drivers\CMSIS\Include;..\Inc; +CDefines=USE_HAL_DRIVER;STM32G431xx;USE_HAL_DRIVER;STM32G431xx; + diff --git a/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc new file mode 100644 index 0000000000..b50c6a321c --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/CubeMX_Config.ioc @@ -0,0 +1,203 @@ +#MicroXplorer Configuration settings - do not modify +File.Version=6 +KeepUserPlacement=true +Mcu.Family=STM32G4 +Mcu.IP0=NVIC +Mcu.IP1=RCC +Mcu.IP2=SYS +Mcu.IP3=UART4 +Mcu.IP4=USART1 +Mcu.IP5=USART2 +Mcu.IP6=USART3 +Mcu.IPNb=7 +Mcu.Name=STM32G431R(6-8-B)Tx +Mcu.Package=LQFP64 +Mcu.Pin0=PC13 +Mcu.Pin1=PC14-OSC32_IN +Mcu.Pin10=PB10 +Mcu.Pin11=PB11 +Mcu.Pin12=PA13 +Mcu.Pin13=PA14 +Mcu.Pin14=PC10 +Mcu.Pin15=PC11 +Mcu.Pin16=PB3 +Mcu.Pin17=VP_SYS_VS_Systick +Mcu.Pin18=VP_SYS_VS_DBSignals +Mcu.Pin2=PC15-OSC32_OUT +Mcu.Pin3=PF0-OSC_IN +Mcu.Pin4=PF1-OSC_OUT +Mcu.Pin5=PA2 +Mcu.Pin6=PA3 +Mcu.Pin7=PA5 +Mcu.Pin8=PC4 +Mcu.Pin9=PC5 +Mcu.PinsNb=19 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32G431RBTx +MxCube.Version=5.3.0 +MxDb.Version=DB.5.0.30 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.ForceEnableDMAVector=true +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +PA13.GPIOParameters=GPIO_Label +PA13.GPIO_Label=T_SWDIO +PA13.Locked=true +PA13.Mode=Serial_Wire +PA13.Signal=SYS_JTMS-SWDIO +PA14.GPIOParameters=GPIO_Label +PA14.GPIO_Label=T_SWCLK +PA14.Locked=true +PA14.Mode=Serial_Wire +PA14.Signal=SYS_JTCK-SWCLK +PA2.GPIOParameters=GPIO_PuPd +PA2.GPIO_PuPd=GPIO_PULLUP +PA2.Mode=Asynchronous +PA2.Signal=USART2_TX +PA3.GPIOParameters=GPIO_PuPd +PA3.GPIO_PuPd=GPIO_PULLUP +PA3.Mode=Asynchronous +PA3.Signal=USART2_RX +PA5.GPIOParameters=GPIO_Label +PA5.GPIO_Label=LD2 [green] +PA5.Locked=true +PA5.Signal=GPIO_Output +PB10.GPIOParameters=GPIO_PuPd +PB10.GPIO_PuPd=GPIO_PULLUP +PB10.Mode=Asynchronous +PB10.Signal=USART3_TX +PB11.GPIOParameters=GPIO_PuPd +PB11.GPIO_PuPd=GPIO_PULLUP +PB11.Mode=Asynchronous +PB11.Signal=USART3_RX +PB3.GPIOParameters=GPIO_Label +PB3.GPIO_Label=T_SWO +PB3.Locked=true +PB3.Signal=SYS_JTDO-SWO +PC10.Mode=Asynchronous +PC10.Signal=UART4_TX +PC11.Mode=Asynchronous +PC11.Signal=UART4_RX +PC13.GPIOParameters=GPIO_Label +PC13.GPIO_Label=B1 [blue push button] +PC13.Locked=true +PC13.Signal=GPXTI13 +PC14-OSC32_IN.Locked=true +PC14-OSC32_IN.Mode=LSE-External-Oscillator +PC14-OSC32_IN.Signal=RCC_OSC32_IN +PC15-OSC32_OUT.Locked=true +PC15-OSC32_OUT.Mode=LSE-External-Oscillator +PC15-OSC32_OUT.Signal=RCC_OSC32_OUT +PC4.GPIOParameters=GPIO_Label +PC4.GPIO_Label=USART1_TX [STLINKV3E_VCP_RX] +PC4.Locked=true +PC4.Mode=Asynchronous +PC4.Signal=USART1_TX +PC5.GPIOParameters=GPIO_Label +PC5.GPIO_Label=USART1_RX [STLINKV3E_VCP_TX] +PC5.Locked=true +PC5.Mode=Asynchronous +PC5.Signal=USART1_RX +PF0-OSC_IN.Locked=true +PF0-OSC_IN.Mode=HSE-External-Oscillator +PF0-OSC_IN.Signal=RCC_OSC_IN +PF1-OSC_OUT.Locked=true +PF1-OSC_OUT.Mode=HSE-External-Oscillator +PF1-OSC_OUT.Signal=RCC_OSC_OUT +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32G431RBTx +ProjectManager.FirmwarePackage=STM32Cube FW_G4 V1.1.0 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=0 +ProjectManager.MainLocation=Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=CubeMX_Config.ioc +ProjectManager.ProjectName=CubeMX_Config +ProjectManager.RegisterCallBack= +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=MDK-ARM V5 +ProjectManager.ToolChainLocation= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true,4-MX_UART4_Init-UART4-false-HAL-true,5-MX_USART2_UART_Init-USART2-false-HAL-true,6-MX_USART3_UART_Init-USART3-false-HAL-true +RCC.ADC12Freq_Value=170000000 +RCC.AHBFreq_Value=170000000 +RCC.APB1Freq_Value=170000000 +RCC.APB1TimFreq_Value=170000000 +RCC.APB2Freq_Value=170000000 +RCC.APB2TimFreq_Value=170000000 +RCC.CRSFreq_Value=48000000 +RCC.CortexFreq_Value=170000000 +RCC.EXTERNAL_CLOCK_VALUE=12288000 +RCC.FCLKCortexFreq_Value=170000000 +RCC.FDCANFreq_Value=170000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=170000000 +RCC.HSE_VALUE=24000000 +RCC.HSI48_VALUE=48000000 +RCC.HSI_VALUE=16000000 +RCC.I2C1Freq_Value=170000000 +RCC.I2C2Freq_Value=170000000 +RCC.I2C3Freq_Value=170000000 +RCC.I2SFreq_Value=170000000 +RCC.IPParameters=ADC12Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value +RCC.LPTIM1Freq_Value=170000000 +RCC.LPUART1Freq_Value=170000000 +RCC.LSCOPinFreq_Value=32000 +RCC.LSI_VALUE=32000 +RCC.MCO1PinFreq_Value=16000000 +RCC.PLLM=RCC_PLLM_DIV4 +RCC.PLLN=85 +RCC.PLLPoutputFreq_Value=170000000 +RCC.PLLQoutputFreq_Value=170000000 +RCC.PLLRCLKFreq_Value=170000000 +RCC.PWRFreq_Value=170000000 +RCC.RNGFreq_Value=170000000 +RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE +RCC.RTCFreq_Value=32768 +RCC.SAI1Freq_Value=170000000 +RCC.SYSCLKFreq_VALUE=170000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.UART4Freq_Value=170000000 +RCC.USART1Freq_Value=170000000 +RCC.USART2Freq_Value=170000000 +RCC.USART3Freq_Value=170000000 +RCC.USBFreq_Value=170000000 +RCC.VCOInputFreq_Value=4000000 +RCC.VCOOutputFreq_Value=340000000 +SH.GPXTI13.0=GPIO_EXTI13 +SH.GPXTI13.ConfNb=1 +USART1.IPParameters=VirtualMode-Asynchronous,WordLength +USART1.VirtualMode-Asynchronous=VM_ASYNC +USART1.WordLength=WORDLENGTH_8B +USART2.IPParameters=VirtualMode-Asynchronous +USART2.VirtualMode-Asynchronous=VM_ASYNC +USART3.IPParameters=VirtualMode-Asynchronous +USART3.VirtualMode-Asynchronous=VM_ASYNC +VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals +VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +board=NUCLEO-G431RB +boardIOC=true diff --git a/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Inc/main.h b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Inc/main.h new file mode 100644 index 0000000000..b07dd95d86 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Inc/main.h @@ -0,0 +1,86 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32g4xx_hal.h" +#include "stm32g4xx_ll_pwr.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +#define B1_Pin GPIO_PIN_13 +#define B1_GPIO_Port GPIOC +#define LD2_Pin GPIO_PIN_5 +#define LD2_GPIO_Port GPIOA +#define USART1_TX_Pin GPIO_PIN_4 +#define USART1_TX_GPIO_Port GPIOC +#define USART1_RX_Pin GPIO_PIN_5 +#define USART1_RX_GPIO_Port GPIOC +#define T_SWDIO_Pin GPIO_PIN_13 +#define T_SWDIO_GPIO_Port GPIOA +#define T_SWCLK_Pin GPIO_PIN_14 +#define T_SWCLK_GPIO_Port GPIOA +#define T_SWO_Pin GPIO_PIN_3 +#define T_SWO_GPIO_Port GPIOB +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Inc/stm32g4xx_hal_conf.h b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Inc/stm32g4xx_hal_conf.h new file mode 100644 index 0000000000..377af22d3a --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Inc/stm32g4xx_hal_conf.h @@ -0,0 +1,382 @@ +/** + ****************************************************************************** + * @file stm32g4xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration file + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2018 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32G4xx_HAL_CONF_H +#define STM32G4xx_HAL_CONF_H + +#ifdef __cplusplus +extern "C" +{ +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** +* @brief This is the list of modules to be used in the HAL driver +*/ + +#define HAL_MODULE_ENABLED + +/*#define HAL_ADC_MODULE_ENABLED */ +/*#define HAL_COMP_MODULE_ENABLED */ +/*#define HAL_CORDIC_MODULE_ENABLED */ +/*#define HAL_CRC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +/*#define HAL_FDCAN_MODULE_ENABLED */ +/*#define HAL_FMAC_MODULE_ENABLED */ +/*#define HAL_HRTIM_MODULE_ENABLED */ +/*#define HAL_IRDA_MODULE_ENABLED */ +/*#define HAL_IWDG_MODULE_ENABLED */ +/*#define HAL_I2C_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_LPTIM_MODULE_ENABLED */ +/*#define HAL_NAND_MODULE_ENABLED */ +/*#define HAL_NOR_MODULE_ENABLED */ +/*#define HAL_OPAMP_MODULE_ENABLED */ +/*#define HAL_PCD_MODULE_ENABLED */ +/*#define HAL_QSPI_MODULE_ENABLED */ +/*#define HAL_RNG_MODULE_ENABLED */ +/*#define HAL_RTC_MODULE_ENABLED */ +/*#define HAL_SAI_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +/*#define HAL_SMBUS_MODULE_ENABLED */ +/*#define HAL_SPI_MODULE_ENABLED */ +/*#define HAL_SRAM_MODULE_ENABLED */ +/*#define HAL_TIM_MODULE_ENABLED */ +#define HAL_UART_MODULE_ENABLED +/*#define HAL_USART_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED + +/* ########################## Register Callbacks selection ############################## */ +/** + * @brief This is the list of modules where register callback can be used + */ +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U +#define USE_HAL_COMP_REGISTER_CALLBACKS 0U +#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U +#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U +#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U +#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U +#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U +#define USE_HAL_I2S_REGISTER_CALLBACKS 0U +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U +#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U +#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U +#define USE_HAL_UART_REGISTER_CALLBACKS 0U +#define USE_HAL_USART_REGISTER_CALLBACKS 0U +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined(HSE_VALUE) +#define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined(HSE_STARTUP_TIMEOUT) +#define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined(HSI_VALUE) +#define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG. + * This internal oscillator is mainly dedicated to provide a high precision clock to + * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry. + * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency + * which is subject to manufacturing process variations. + */ +#if !defined(HSI48_VALUE) +#define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz. \ + The real value my vary depending on manufacturing process variations.*/ +#endif /* HSI48_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined(LSI_VALUE) +/*!< Value of the Internal Low Speed oscillator in Hz +The real value may vary depending on the variations in voltage and temperature.*/ +#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined(LSE_VALUE) +#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined(LSE_STARTUP_TIMEOUT) +#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S and SAI peripherals + * This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined(EXTERNAL_CLOCK_VALUE) +#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** +* @brief This is the HAL system configuration section +*/ + +#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 0U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** +* @brief Uncomment the line below to expanse the "assert_param" macro in the +* HAL drivers code +*/ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 0U + +/* Includes ------------------------------------------------------------------*/ +/** +* @brief Include module's header file +*/ + +#ifdef HAL_RCC_MODULE_ENABLED +#include "stm32g4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED +#include "stm32g4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED +#include "stm32g4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED +#include "stm32g4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED +#include "stm32g4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED +#include "stm32g4xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CORDIC_MODULE_ENABLED +#include "stm32g4xx_hal_cordic.h" +#endif /* HAL_CORDIC_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED +#include "stm32g4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED +#include "stm32g4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED +#include "stm32g4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED +#include "stm32g4xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_FDCAN_MODULE_ENABLED +#include "stm32g4xx_hal_fdcan.h" +#endif /* HAL_FDCAN_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED +#include "stm32g4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_FMAC_MODULE_ENABLED +#include "stm32g4xx_hal_fmac.h" +#endif /* HAL_FMAC_MODULE_ENABLED */ + +#ifdef HAL_HRTIM_MODULE_ENABLED +#include "stm32g4xx_hal_hrtim.h" +#endif /* HAL_HRTIM_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED +#include "stm32g4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED +#include "stm32g4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED +#include "stm32g4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED +#include "stm32g4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED +#include "stm32g4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED +#include "stm32g4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED +#include "stm32g4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_OPAMP_MODULE_ENABLED +#include "stm32g4xx_hal_opamp.h" +#endif /* HAL_OPAMP_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED +#include "stm32g4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED +#include "stm32g4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED +#include "stm32g4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED +#include "stm32g4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED +#include "stm32g4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED +#include "stm32g4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED +#include "stm32g4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED +#include "stm32g4xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED +#include "stm32g4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED +#include "stm32g4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED +#include "stm32g4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED +#include "stm32g4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED +#include "stm32g4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED +#include "stm32g4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ +#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ +void assert_failed(uint8_t *file, uint32_t line); +#else +#define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32G4xx_HAL_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Inc/stm32g4xx_it.h b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Inc/stm32g4xx_it.h new file mode 100644 index 0000000000..cbb2b1de78 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Inc/stm32g4xx_it.h @@ -0,0 +1,69 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32g4xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32G4xx_IT_H +#define __STM32G4xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32G4xx_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/main.c new file mode 100644 index 0000000000..43ba62b0fa --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/main.c @@ -0,0 +1,422 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +UART_HandleTypeDef hlpuart1; +UART_HandleTypeDef huart4; +UART_HandleTypeDef huart1; +UART_HandleTypeDef huart3; + +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_USART1_UART_Init(void); +static void MX_LPUART1_UART_Init(void); +static void MX_UART4_Init(void); +static void MX_USART3_UART_Init(void); +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_USART1_UART_Init(); + MX_LPUART1_UART_Init(); + MX_UART4_Init(); + MX_USART3_UART_Init(); + /* USER CODE BEGIN 2 */ + + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) + { + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + + /** Configure the main internal regulator output voltage + */ + HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4; + RCC_OscInitStruct.PLL.PLLN = 85; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the peripherals clocks + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_LPUART1; + PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1; + PeriphClkInit.Uart4ClockSelection = RCC_UART4CLKSOURCE_PCLK1; + PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } +} + +/** + * @brief LPUART1 Initialization Function + * @param None + * @retval None + */ +static void MX_LPUART1_UART_Init(void) +{ + + /* USER CODE BEGIN LPUART1_Init 0 */ + + /* USER CODE END LPUART1_Init 0 */ + + /* USER CODE BEGIN LPUART1_Init 1 */ + + /* USER CODE END LPUART1_Init 1 */ + hlpuart1.Instance = LPUART1; + hlpuart1.Init.BaudRate = 209700; + hlpuart1.Init.WordLength = UART_WORDLENGTH_7B; + hlpuart1.Init.StopBits = UART_STOPBITS_1; + hlpuart1.Init.Parity = UART_PARITY_NONE; + hlpuart1.Init.Mode = UART_MODE_TX_RX; + hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&hlpuart1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetTxFifoThreshold(&hlpuart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetRxFifoThreshold(&hlpuart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_DisableFifoMode(&hlpuart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN LPUART1_Init 2 */ + + /* USER CODE END LPUART1_Init 2 */ +} + +/** + * @brief UART4 Initialization Function + * @param None + * @retval None + */ +static void MX_UART4_Init(void) +{ + + /* USER CODE BEGIN UART4_Init 0 */ + + /* USER CODE END UART4_Init 0 */ + + /* USER CODE BEGIN UART4_Init 1 */ + + /* USER CODE END UART4_Init 1 */ + huart4.Instance = UART4; + huart4.Init.BaudRate = 115200; + huart4.Init.WordLength = UART_WORDLENGTH_7B; + huart4.Init.StopBits = UART_STOPBITS_1; + huart4.Init.Parity = UART_PARITY_NONE; + huart4.Init.Mode = UART_MODE_TX_RX; + huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart4.Init.OverSampling = UART_OVERSAMPLING_16; + huart4.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart4.Init.ClockPrescaler = UART_PRESCALER_DIV1; + huart4.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart4) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetTxFifoThreshold(&huart4, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetRxFifoThreshold(&huart4, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_DisableFifoMode(&huart4) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN UART4_Init 2 */ + + /* USER CODE END UART4_Init 2 */ +} + +/** + * @brief USART1 Initialization Function + * @param None + * @retval None + */ +static void MX_USART1_UART_Init(void) +{ + + /* USER CODE BEGIN USART1_Init 0 */ + + /* USER CODE END USART1_Init 0 */ + + /* USER CODE BEGIN USART1_Init 1 */ + + /* USER CODE END USART1_Init 1 */ + huart1.Instance = USART1; + huart1.Init.BaudRate = 115200; + huart1.Init.WordLength = UART_WORDLENGTH_8B; + huart1.Init.StopBits = UART_STOPBITS_1; + huart1.Init.Parity = UART_PARITY_NONE; + huart1.Init.Mode = UART_MODE_TX_RX; + huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart1.Init.OverSampling = UART_OVERSAMPLING_16; + huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; + huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART1_Init 2 */ + + /* USER CODE END USART1_Init 2 */ +} + +/** + * @brief USART3 Initialization Function + * @param None + * @retval None + */ +static void MX_USART3_UART_Init(void) +{ + + /* USER CODE BEGIN USART3_Init 0 */ + + /* USER CODE END USART3_Init 0 */ + + /* USER CODE BEGIN USART3_Init 1 */ + + /* USER CODE END USART3_Init 1 */ + huart3.Instance = USART3; + huart3.Init.BaudRate = 115200; + huart3.Init.WordLength = UART_WORDLENGTH_7B; + huart3.Init.StopBits = UART_STOPBITS_1; + huart3.Init.Parity = UART_PARITY_NONE; + huart3.Init.Mode = UART_MODE_TX_RX; + huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart3.Init.OverSampling = UART_OVERSAMPLING_16; + huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1; + huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart3) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetTxFifoThreshold(&huart3, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetRxFifoThreshold(&huart3, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_DisableFifoMode(&huart3) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART3_Init 2 */ + + /* USER CODE END USART3_Init 2 */ +} + +/** + * @brief GPIO Initialization Function + * @param None + * @retval None + */ +static void MX_GPIO_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOF_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + + /*Configure GPIO pin Output Level */ + HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_RESET); + + /*Configure GPIO pin : B1_Pin */ + GPIO_InitStruct.Pin = B1_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct); + + /*Configure GPIO pin : LD2_Pin */ + GPIO_InitStruct.Pin = LD2_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct); +} + +/* USER CODE BEGIN 4 */ + +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/stm32g4xx_hal_msp.c b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/stm32g4xx_hal_msp.c new file mode 100644 index 0000000000..c36ae67c54 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/stm32g4xx_hal_msp.c @@ -0,0 +1,277 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * File Name : stm32g4xx_hal_msp.c + * Description : This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_RCC_PWR_CLK_ENABLE(); + + /* System interrupt init*/ + + /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral + */ + LL_PWR_DisableDeadBatteryPD(); + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/** +* @brief UART MSP Initialization +* This function configures the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspInit(UART_HandleTypeDef *huart) +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if (huart->Instance == LPUART1) + { + /* USER CODE BEGIN LPUART1_MspInit 0 */ + + /* USER CODE END LPUART1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_LPUART1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**LPUART1 GPIO Configuration + PA2 ------> LPUART1_TX + PA3 ------> LPUART1_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_2 | GPIO_PIN_3; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF12_LPUART1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN LPUART1_MspInit 1 */ + + /* USER CODE END LPUART1_MspInit 1 */ + } + else if (huart->Instance == UART4) + { + /* USER CODE BEGIN UART4_MspInit 0 */ + + /* USER CODE END UART4_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_UART4_CLK_ENABLE(); + + __HAL_RCC_GPIOC_CLK_ENABLE(); + /**UART4 GPIO Configuration + PC10 ------> UART4_TX + PC11 ------> UART4_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_10 | GPIO_PIN_11; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF5_UART4; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* USER CODE BEGIN UART4_MspInit 1 */ + + /* USER CODE END UART4_MspInit 1 */ + } + else if (huart->Instance == USART1) + { + /* USER CODE BEGIN USART1_MspInit 0 */ + + /* USER CODE END USART1_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART1_CLK_ENABLE(); + + __HAL_RCC_GPIOC_CLK_ENABLE(); + /**USART1 GPIO Configuration + PC4 ------> USART1_TX + PC5 ------> USART1_RX + */ + GPIO_InitStruct.Pin = USART1_TX_Pin | USART1_RX_Pin; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF7_USART1; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* USER CODE BEGIN USART1_MspInit 1 */ + + /* USER CODE END USART1_MspInit 1 */ + } + else if (huart->Instance == USART3) + { + /* USER CODE BEGIN USART3_MspInit 0 */ + + /* USER CODE END USART3_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USART3_CLK_ENABLE(); + + __HAL_RCC_GPIOB_CLK_ENABLE(); + /**USART3 GPIO Configuration + PB10 ------> USART3_TX + PB11 ------> USART3_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_10 | GPIO_PIN_11; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF7_USART3; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* USER CODE BEGIN USART3_MspInit 1 */ + + /* USER CODE END USART3_MspInit 1 */ + } +} + +/** +* @brief UART MSP De-Initialization +* This function freeze the hardware resources used in this example +* @param huart: UART handle pointer +* @retval None +*/ +void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) +{ + if (huart->Instance == LPUART1) + { + /* USER CODE BEGIN LPUART1_MspDeInit 0 */ + + /* USER CODE END LPUART1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_LPUART1_CLK_DISABLE(); + + /**LPUART1 GPIO Configuration + PA2 ------> LPUART1_TX + PA3 ------> LPUART1_RX + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2 | GPIO_PIN_3); + + /* USER CODE BEGIN LPUART1_MspDeInit 1 */ + + /* USER CODE END LPUART1_MspDeInit 1 */ + } + else if (huart->Instance == UART4) + { + /* USER CODE BEGIN UART4_MspDeInit 0 */ + + /* USER CODE END UART4_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_UART4_CLK_DISABLE(); + + /**UART4 GPIO Configuration + PC10 ------> UART4_TX + PC11 ------> UART4_RX + */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10 | GPIO_PIN_11); + + /* USER CODE BEGIN UART4_MspDeInit 1 */ + + /* USER CODE END UART4_MspDeInit 1 */ + } + else if (huart->Instance == USART1) + { + /* USER CODE BEGIN USART1_MspDeInit 0 */ + + /* USER CODE END USART1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART1_CLK_DISABLE(); + + /**USART1 GPIO Configuration + PC4 ------> USART1_TX + PC5 ------> USART1_RX + */ + HAL_GPIO_DeInit(GPIOC, USART1_TX_Pin | USART1_RX_Pin); + + /* USER CODE BEGIN USART1_MspDeInit 1 */ + + /* USER CODE END USART1_MspDeInit 1 */ + } + else if (huart->Instance == USART3) + { + /* USER CODE BEGIN USART3_MspDeInit 0 */ + + /* USER CODE END USART3_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART3_CLK_DISABLE(); + + /**USART3 GPIO Configuration + PB10 ------> USART3_TX + PB11 ------> USART3_RX + */ + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10 | GPIO_PIN_11); + + /* USER CODE BEGIN USART3_MspDeInit 1 */ + + /* USER CODE END USART3_MspDeInit 1 */ + } +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/stm32g4xx_it.c b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/stm32g4xx_it.c new file mode 100644 index 0000000000..3b9134d9d4 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/stm32g4xx_it.c @@ -0,0 +1,203 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32g4xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32g4xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ + +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex-M4 Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } +} + +/** + * @brief This function handles Prefetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32G4xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32g4xx.s). */ +/******************************************************************************/ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/system_stm32g4xx.c b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/system_stm32g4xx.c new file mode 100644 index 0000000000..9aec032f83 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/CubeMX_Config/Src/system_stm32g4xx.c @@ -0,0 +1,271 @@ +/** + ****************************************************************************** + * @file system_stm32g4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32g4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the HSI (16 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | HSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 16000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 16000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL_M | 1 + *----------------------------------------------------------------------------- + * PLL_N | 16 + *----------------------------------------------------------------------------- + * PLL_P | 7 + *----------------------------------------------------------------------------- + * PLL_Q | 2 + *----------------------------------------------------------------------------- + * PLL_R | 2 + *----------------------------------------------------------------------------- + * Require 48MHz for RNG | Disabled + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2019 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32g4xx_system + * @{ + */ + +/** @addtogroup STM32G4xx_System_Private_Includes + * @{ + */ + +#include "stm32g4xx.h" + +#if !defined (HSE_VALUE) + #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Variables + * @{ + */ + /* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = HSI_VALUE; + + const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; + const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ + +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */ + #endif + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp, pllvco, pllr, pllsource, pllm; + + /* Get SYSCLK source -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); + pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ; + if (pllsource == 0x02UL) /* HSI used as PLL clock source */ + { + pllvco = (HSI_VALUE / pllm); + } + else /* HSE used as PLL clock source */ + { + pllvco = (HSE_VALUE / pllm); + } + pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); + pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; + SystemCoreClock = pllvco/pllr; + break; + + default: + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/bsp/stm32/stm32g474-st-nucleo/board/Kconfig b/bsp/stm32/stm32g474-st-nucleo/board/Kconfig new file mode 100644 index 0000000000..22b870f50c --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/Kconfig @@ -0,0 +1,70 @@ +menu "Hardware Drivers Config" + +config SOC_STM32G474RE + bool + select SOC_SERIES_STM32G4 + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + +menu "Onboard Peripheral Drivers" + +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_LPUART1 + bool "Enable LPUART1" + default y + + config BSP_LPUART1_RX_USING_DMA + bool "Enable LPUART1 RX DMA" + depends on BSP_USING_LPUART1 && RT_SERIAL_USING_DMA + default n + + config BSP_USING_UART1 + bool "Enable UART1" + default n + + config BSP_UART1_RX_USING_DMA + bool "Enable UART1 RX DMA" + depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA + default n + + config BSP_USING_UART3 + bool "Enable UART3" + default n + + config BSP_UART3_RX_USING_DMA + bool "Enable UART3 RX DMA" + depends on BSP_USING_UART3 && RT_SERIAL_USING_DMA + default n + + config BSP_USING_UART4 + bool "Enable UART4" + default n + + config BSP_UART4_RX_USING_DMA + bool "Enable UART4 RX DMA" + depends on BSP_USING_UART4 && RT_SERIAL_USING_DMA + default n + endif + source "../libraries/HAL_Drivers/Kconfig" + +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu diff --git a/bsp/stm32/stm32g474-st-nucleo/board/SConscript b/bsp/stm32/stm32g474-st-nucleo/board/SConscript new file mode 100644 index 0000000000..9c66b20553 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/SConscript @@ -0,0 +1,30 @@ +import os +import rtconfig +from building import * + +Import('SDK_LIB') + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +CubeMX_Config/Src/stm32g4xx_hal_msp.c +''') + +path = [cwd] +path += [cwd + '/CubeMX_Config/Inc'] + +startup_path_prefix = SDK_LIB + +if rtconfig.CROSS_TOOL == 'gcc': + src += [startup_path_prefix + '/STM32G4xx_HAL/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g474xx.s'] +elif rtconfig.CROSS_TOOL == 'keil': + src += [startup_path_prefix + '/STM32G4xx_HAL/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g474xx.s'] +elif rtconfig.CROSS_TOOL == 'iar': + src += [startup_path_prefix + '/STM32G4xx_HAL/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g474xx.s'] + +CPPDEFINES = ['STM32G474xx'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) + +Return('group') \ No newline at end of file diff --git a/bsp/stm32/stm32g474-st-nucleo/board/board.c b/bsp/stm32/stm32g474-st-nucleo/board/board.c new file mode 100644 index 0000000000..7aeb088632 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/board.c @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-06 SummerGift first version + * 2019-10-03 xuzhuoyi add stm32g431-st-nucleo bsp + */ + +#include "board.h" + +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + + /** Configure the main internal regulator output voltage + */ + HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST); + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4; + RCC_OscInitStruct.PLL.PLLN = 85; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the CPU, AHB and APB busses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8) != HAL_OK) + { + Error_Handler(); + } + /** Initializes the peripherals clocks + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; + PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) + { + Error_Handler(); + } +} diff --git a/bsp/stm32/stm32g474-st-nucleo/board/board.h b/bsp/stm32/stm32g474-st-nucleo/board/board.h new file mode 100644 index 0000000000..6fd0c97890 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/board.h @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-11-06 SummerGift first version + * 2019-01-08 AndeyQi add stm32f446-st-nucleo bsp + */ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include +#include +#include "drv_common.h" +#include "drv_gpio.h" + +#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000) +#define STM32_FLASH_SIZE (128 * 1024) +#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) + +#define STM32_SRAM_SIZE 32 +#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) + +#if defined(__CC_ARM) || defined(__CLANG_ARM) +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="CSTACK" +#define HEAP_BEGIN (__segment_end("CSTACK")) +#else +extern int __bss_end; +#define HEAP_BEGIN (&__bss_end) +#endif + +#define HEAP_END STM32_SRAM_END + +void SystemClock_Config(void); + +#endif + diff --git a/bsp/stm32/stm32g474-st-nucleo/board/linker_scripts/link.icf b/bsp/stm32/stm32g474-st-nucleo/board/linker_scripts/link.icf new file mode 100644 index 0000000000..869a0842b7 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/linker_scripts/link.icf @@ -0,0 +1,28 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x0400; +define symbol __ICFEDIT_size_heap__ = 0x000; +/**** End of ICF editor section. ###ICF###*/ + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, last block CSTACK}; \ No newline at end of file diff --git a/bsp/stm32/stm32g474-st-nucleo/board/linker_scripts/link.lds b/bsp/stm32/stm32g474-st-nucleo/board/linker_scripts/link.lds new file mode 100644 index 0000000000..1a228ba882 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/linker_scripts/link.lds @@ -0,0 +1,158 @@ +/* + * linker script for STM32F4xx with GNU ld + * bernard.xiong 2009-10-14 + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + ROM (rx) : ORIGIN = 0x08000000, LENGTH = 512k /* 512KB flash */ + RAM (rw) : ORIGIN = 0x20000000, LENGTH = 128k /* 128K sram */ +} +ENTRY(Reset_Handler) +_system_stack_size = 0x400; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + + . = ALIGN(4); + + PROVIDE(__ctors_start__ = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE(__ctors_end__ = .); + + . = ALIGN(4); + + _etext = .; + } > ROM = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > ROM + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + + PROVIDE(__dtors_start__ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(__dtors_end__ = .); + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >RAM + + .stack : + { + . = ALIGN(4); + _sstack = .; + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >RAM + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > RAM + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/stm32/stm32g474-st-nucleo/board/linker_scripts/link.sct b/bsp/stm32/stm32g474-st-nucleo/board/linker_scripts/link.sct new file mode 100644 index 0000000000..5d1e3e6c00 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/linker_scripts/link.sct @@ -0,0 +1,15 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x08000000 0x00080000 { ; load region size_region + ER_IROM1 0x08000000 0x00080000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x20000000 0x00020000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git 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0000000000..c7a70cef29 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/project.ewp @@ -0,0 +1,2274 @@ + + 3 + + rt-thread + + ARM + + 1 + + General + 3 + + 30 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 30 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + 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$PROJ_DIR$\..\..\..\libcpu\arm\cortex-m4\cpuport.c + + + + DeviceDrivers + + $PROJ_DIR$\..\..\..\components\drivers\misc\pin.c + + + $PROJ_DIR$\..\..\..\components\drivers\serial\serial.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\waitqueue.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\dataqueue.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\pipe.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\ringbuffer.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\completion.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\workqueue.c + + + $PROJ_DIR$\..\..\..\components\drivers\src\ringblk_buf.c + + + + Drivers + + $PROJ_DIR$\board\CubeMX_Config\Src\stm32g4xx_hal_msp.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\CMSIS\Device\ST\STM32G4xx\Source\Templates\iar\startup_stm32g474xx.s + + + $PROJ_DIR$\board\board.c + + + $PROJ_DIR$\..\libraries\HAL_Drivers\drv_gpio.c + + + $PROJ_DIR$\..\libraries\HAL_Drivers\drv_usart.c + + + $PROJ_DIR$\..\libraries\HAL_Drivers\drv_common.c + + + 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$PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_gpio.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc_ex.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_usart.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr_ex.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cryp.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_usart_ex.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cortex.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_uart.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_uart_ex.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rng.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_crc.c + + + $PROJ_DIR$\..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cryp_ex.c + + + + utestcases + + diff --git a/bsp/stm32/stm32g474-st-nucleo/project.eww b/bsp/stm32/stm32g474-st-nucleo/project.eww new file mode 100644 index 0000000000..c2cb02eb1e --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/project.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\project.ewp + + + + + diff --git a/bsp/stm32/stm32g474-st-nucleo/project.uvoptx b/bsp/stm32/stm32g474-st-nucleo/project.uvoptx new file mode 100644 index 0000000000..c472406949 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/project.uvoptx @@ -0,0 +1,920 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rng.c + stm32g4xx_hal_rng.c + 0 + 0 + + + 8 + 55 + 1 + 0 + 0 + 0 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_crc.c + stm32g4xx_hal_crc.c + 0 + 0 + + + 8 + 56 + 1 + 0 + 0 + 0 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cryp_ex.c + stm32g4xx_hal_cryp_ex.c + 0 + 0 + + + + diff --git a/bsp/stm32/stm32g474-st-nucleo/project.uvprojx b/bsp/stm32/stm32g474-st-nucleo/project.uvprojx new file mode 100644 index 0000000000..76c7b9e92f --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/project.uvprojx @@ -0,0 +1,713 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + rt-thread + 0x4 + ARM-ADS + 5060960::V5.06 update 7 (build 960)::.\ARMCC + 0 + + + STM32G474RETx + STMicroelectronics + Keil.STM32G4xx_DFP.1.4.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00020000) IROM(0x08000000,0x00080000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G47x-8x_512 -FS08000000 -FL080000 -FP0($$Device:STM32G474RETx$CMSIS\Flash\STM32G47x-8x_512.FLM)) + 0 + $$Device:STM32G474RETx$Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g4xx.h + + + + + + + + + + $$Device:STM32G474RETx$CMSIS\SVD\STM32G474xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rt-thread + 1 + 0 + 0 + 1 + 0 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + USE_HAL_DRIVER, __RTTHREAD__, STM32G474xx, __CLK_TCK=RT_TICK_PER_SECOND + + applications;.;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\nogcc;..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Inc;..\libraries\STM32G4xx_HAL\CMSIS\Device\ST\STM32G4xx\Include;..\libraries\STM32G4xx_HAL\CMSIS\Include;..\..\..\examples\utest\testcases\kernel + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + .\board\linker_scripts\link.sct + + + + + + + + + + + Applications + + + main.c + 1 + applications\main.c + + + + + CPU + + + div0.c + 1 + ..\..\..\libcpu\arm\common\div0.c + + + showmem.c + 1 + ..\..\..\libcpu\arm\common\showmem.c + + + backtrace.c + 1 + ..\..\..\libcpu\arm\common\backtrace.c + + + context_rvds.S + 2 + ..\..\..\libcpu\arm\cortex-m4\context_rvds.S + + + cpuport.c + 1 + ..\..\..\libcpu\arm\cortex-m4\cpuport.c + + + + + DeviceDrivers + + + pin.c + 1 + ..\..\..\components\drivers\misc\pin.c + + + serial.c + 1 + ..\..\..\components\drivers\serial\serial.c + + + ringbuffer.c + 1 + ..\..\..\components\drivers\src\ringbuffer.c + + + workqueue.c + 1 + ..\..\..\components\drivers\src\workqueue.c + + + waitqueue.c + 1 + ..\..\..\components\drivers\src\waitqueue.c + + + completion.c + 1 + ..\..\..\components\drivers\src\completion.c + + + ringblk_buf.c + 1 + ..\..\..\components\drivers\src\ringblk_buf.c + + + pipe.c + 1 + ..\..\..\components\drivers\src\pipe.c + + + dataqueue.c + 1 + ..\..\..\components\drivers\src\dataqueue.c + + + + + Drivers + + + stm32g4xx_hal_msp.c + 1 + board\CubeMX_Config\Src\stm32g4xx_hal_msp.c + + + startup_stm32g474xx.s + 2 + ..\libraries\STM32G4xx_HAL\CMSIS\Device\ST\STM32G4xx\Source\Templates\arm\startup_stm32g474xx.s + + + board.c + 1 + board\board.c + + + drv_gpio.c + 1 + ..\libraries\HAL_Drivers\drv_gpio.c + + + drv_usart.c + 1 + ..\libraries\HAL_Drivers\drv_usart.c + + + drv_common.c + 1 + ..\libraries\HAL_Drivers\drv_common.c + + + + + Finsh + + + shell.c + 1 + ..\..\..\components\finsh\shell.c + + + msh.c + 1 + ..\..\..\components\finsh\msh.c + + + cmd.c + 1 + ..\..\..\components\finsh\cmd.c + + + + + Kernel + + + clock.c + 1 + ..\..\..\src\clock.c + + + timer.c + 1 + ..\..\..\src\timer.c + + + mempool.c + 1 + ..\..\..\src\mempool.c + + + ipc.c + 1 + ..\..\..\src\ipc.c + + + device.c + 1 + ..\..\..\src\device.c + + + scheduler.c + 1 + ..\..\..\src\scheduler.c + + + components.c + 1 + ..\..\..\src\components.c + + + mem.c + 1 + ..\..\..\src\mem.c + + + idle.c + 1 + ..\..\..\src\idle.c + + + object.c + 1 + ..\..\..\src\object.c + + + irq.c + 1 + ..\..\..\src\irq.c + + + thread.c + 1 + ..\..\..\src\thread.c + + + kservice.c + 1 + ..\..\..\src\kservice.c + + + + + libc + + + time.c + 1 + ..\..\..\components\libc\compilers\common\time.c + + + + + Libraries + + + stm32g4xx_hal_pwr.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr.c + + + stm32g4xx_hal_dma_ex.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma_ex.c + + + stm32g4xx_hal_gpio.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_gpio.c + + + stm32g4xx_hal_rcc_ex.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc_ex.c + + + stm32g4xx_hal_usart.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_usart.c + + + stm32g4xx_hal_pwr_ex.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr_ex.c + + + stm32g4xx_hal_cryp.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cryp.c + + + stm32g4xx_hal_usart_ex.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_usart_ex.c + + + system_stm32g4xx.c + 1 + ..\libraries\STM32G4xx_HAL\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c + + + stm32g4xx_hal_cortex.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cortex.c + + + stm32g4xx_hal.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal.c + + + stm32g4xx_hal_rcc.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc.c + + + stm32g4xx_hal_dma.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma.c + + + stm32g4xx_hal_uart.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_uart.c + + + stm32g4xx_hal_uart_ex.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_uart_ex.c + + + stm32g4xx_hal_rng.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rng.c + + + stm32g4xx_hal_crc.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_crc.c + + + stm32g4xx_hal_cryp_ex.c + 1 + ..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cryp_ex.c + + + + + + + + + + + + + + diff --git a/bsp/stm32/stm32g474-st-nucleo/rtconfig.h b/bsp/stm32/stm32g474-st-nucleo/rtconfig.h new file mode 100644 index 0000000000..2e776a1bd6 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/rtconfig.h @@ -0,0 +1,205 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* Automatically generated file; DO NOT EDIT. */ +/* RT-Thread Configuration */ + +/* RT-Thread Kernel */ + +#define RT_NAME_MAX 8 +#define RT_ALIGN_SIZE 4 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 + +/* kservice optimization */ + +#define RT_DEBUG +#define RT_DEBUG_COLOR + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_HEAP + +/* Kernel Device Object */ + +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "lpuart1" +#define RT_VER_NUM 0x40100 +#define ARCH_ARM +#define RT_USING_CPU_FFS +#define ARCH_ARM_CORTEX_M +#define ARCH_ARM_CORTEX_M4 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 + +/* C++ features */ + + +/* Command shell */ + +#define RT_USING_FINSH +#define RT_USING_MSH +#define FINSH_USING_MSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_CMD_SIZE 80 +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION +#define FINSH_ARG_MAX 10 + +/* Device virtual file system */ + + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_PIPE_BUFSZ 512 +#define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN + +/* Using USB */ + + +/* POSIX layer and C standard library */ + +#define RT_LIBC_USING_TIME +#define RT_LIBC_DEFAULT_TIMEZONE 8 + +/* POSIX (Portable Operating System Interface) layer */ + + +/* Network */ + +/* Socket abstraction layer */ + + +/* Network interface device */ + + +/* light weight TCP/IP stack */ + + +/* AT commands */ + + +/* VBUS(Virtual Software BUS) */ + + +/* Utilities */ + + +/* RT-Thread Utestcases */ + + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + + +/* Wiced WiFi */ + + +/* IoT Cloud */ + + +/* security packages */ + + +/* language packages */ + + +/* multimedia packages */ + +/* LVGL: powerful and easy-to-use embedded GUI library */ + + +/* u8g2: a monochrome graphic library */ + + +/* PainterEngine: A cross-platform graphics application framework written in C language */ + + +/* tools packages */ + + +/* system packages */ + +/* enhanced kernel services */ + + +/* acceleration: Assembly language or algorithmic acceleration packages */ + + +/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + + +/* Micrium: Micrium software products porting for RT-Thread */ + + +/* peripheral libraries and drivers */ + + +/* AI packages */ + + +/* miscellaneous packages */ + +/* samples: kernel and components samples */ + + +/* entertainment: terminal games and other interesting software packages */ + +#define SOC_FAMILY_STM32 +#define SOC_SERIES_STM32G4 + +/* Hardware Drivers Config */ + +#define SOC_STM32G474RE + +/* Onboard Peripheral Drivers */ + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_LPUART1 + +/* Board extended module Drivers */ + + +#endif diff --git a/bsp/stm32/stm32g474-st-nucleo/rtconfig.py b/bsp/stm32/stm32g474-st-nucleo/rtconfig.py new file mode 100644 index 0000000000..871c33548c --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/rtconfig.py @@ -0,0 +1,184 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m4' +CROSS_TOOL='gcc' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iar' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + CXX = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M4.fp ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'armclang': + # toolchains + CC = 'armclang' + CXX = 'armclang' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M4.fp ' + CFLAGS = ' --target=arm-arm-none-eabi -mcpu=cortex-m4 ' + CFLAGS += ' -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 ' + CFLAGS += ' -mfloat-abi=hard -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar ' + CFLAGS += ' -gdwarf-3 -ffunction-sections ' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers ' + LFLAGS += ' --list rt-thread.map ' + LFLAGS += r' --strict --scatter "board\linker_scripts\link.sct" ' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCLANG/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCLANG/lib' + + EXEC_PATH += '/ARM/ARMCLANG/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O1' # armclang recommend + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iar': + # toolchains + CC = 'iccarm' + CXX = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M4' + CFLAGS += ' -e' + CFLAGS += ' --fpu=VFPv4_sp' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M4' + AFLAGS += ' --fpu VFPv4_sp' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + CXXFLAGS = CFLAGS + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/stm32/stm32g474-st-nucleo/template.ewp b/bsp/stm32/stm32g474-st-nucleo/template.ewp new file mode 100644 index 0000000000..934a90e149 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/template.ewp @@ -0,0 +1,2040 @@ + + + 3 + + rt-thread + + ARM + + 1 + + General + 3 + + 30 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 30 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 34 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 20 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + diff --git a/bsp/stm32/stm32g474-st-nucleo/template.eww b/bsp/stm32/stm32g474-st-nucleo/template.eww new file mode 100644 index 0000000000..bd036bb4c9 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/template.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\template.ewp + + + + + diff --git a/bsp/stm32/stm32g474-st-nucleo/template.uvoptx b/bsp/stm32/stm32g474-st-nucleo/template.uvoptx new file mode 100644 index 0000000000..3f14385a2b --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/template.uvoptx @@ -0,0 +1,192 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ST-LINKIII-KEIL_SWO + -U001900065632500920313236 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32G47x-8x_512.FLM -FS08000000 -FL080000 -FP0($$Device:STM32G474RETx$CMSIS\Flash\STM32G47x-8x_512.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32G47x-8x_512 -FL080000 -FS08000000 -FP0($$Device:STM32G474RETx$CMSIS\Flash\STM32G47x-8x_512.FLM) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + Source Group 1 + 0 + 0 + 0 + 0 + + + diff --git a/bsp/stm32/stm32g474-st-nucleo/template.uvprojx b/bsp/stm32/stm32g474-st-nucleo/template.uvprojx new file mode 100644 index 0000000000..20386d5e06 --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/template.uvprojx @@ -0,0 +1,396 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + rt-thread + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32G474RETx + STMicroelectronics + Keil.STM32G4xx_DFP.1.4.0 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00020000) IROM(0x08000000,0x00080000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G47x-8x_512 -FS08000000 -FL080000 -FP0($$Device:STM32G474RETx$CMSIS\Flash\STM32G47x-8x_512.FLM)) + 0 + $$Device:STM32G474RETx$Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g4xx.h + + + + + + + + + + $$Device:STM32G474RETx$CMSIS\SVD\STM32G474xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rt-thread + 1 + 0 + 0 + 1 + 0 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + .\board\linker_scripts\link.sct + + + + + + + + + + + Source Group 1 + + + + + + + + + + + + -- cgit v1.3.1 From cdf4a606f231fde5f1484e25dc46655680bad133 Mon Sep 17 00:00:00 2001 From: Lyon <88232613+pikasTech@users.noreply.github.com> Date: Mon, 13 Dec 2021 10:26:57 +0800 Subject: Update .config --- bsp/ls1cdev/.config | 93 +++++++++++++++++++++++++++++++++++++++++------------ 1 file changed, 72 insertions(+), 21 deletions(-) (limited to 'bsp') diff --git a/bsp/ls1cdev/.config b/bsp/ls1cdev/.config index e553870302..95ba00afd9 100644 --- a/bsp/ls1cdev/.config +++ b/bsp/ls1cdev/.config @@ -7,6 +7,7 @@ # RT-Thread Kernel # CONFIG_RT_NAME_MAX=10 +# CONFIG_RT_USING_BIG_ENDIAN is not set # CONFIG_RT_USING_ARCH_DATA_TYPE is not set # CONFIG_RT_USING_SMP is not set CONFIG_RT_ALIGN_SIZE=8 @@ -19,7 +20,7 @@ CONFIG_RT_USING_OVERFLOW_CHECK=y CONFIG_RT_USING_HOOK=y CONFIG_RT_USING_IDLE_HOOK=y CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 -CONFIG_IDLE_THREAD_STACK_SIZE=1024 +CONFIG_IDLE_THREAD_STACK_SIZE=8192 # CONFIG_RT_USING_TIMER_SOFT is not set # @@ -28,6 +29,9 @@ CONFIG_IDLE_THREAD_STACK_SIZE=1024 # CONFIG_RT_KSERVICE_USING_STDLIB is not set # CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set # CONFIG_RT_USING_ASM_MEMCPY is not set +# CONFIG_RT_USING_ASM_MEMSET is not set +# CONFIG_RT_USING_TINY_FFS is not set +# CONFIG_RT_PRINTF_LONGLONG is not set CONFIG_RT_DEBUG=y CONFIG_RT_DEBUG_COLOR=y # CONFIG_RT_DEBUG_INIT_CONFIG is not set @@ -73,8 +77,7 @@ CONFIG_RT_USING_INTERRUPT_INFO=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart2" -# CONFIG_RT_PRINTF_LONGLONG is not set -CONFIG_RT_VER_NUM=0x40004 +CONFIG_RT_VER_NUM=0x40100 # CONFIG_RT_USING_CPU_FFS is not set # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set @@ -83,8 +86,9 @@ CONFIG_RT_VER_NUM=0x40004 # CONFIG_RT_USING_COMPONENTS_INIT=y CONFIG_RT_USING_USER_MAIN=y -CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_STACK_SIZE=8192 CONFIG_RT_MAIN_THREAD_PRIORITY=10 +# CONFIG_RT_USING_LEGACY is not set # # C++ features @@ -99,7 +103,7 @@ CONFIG_RT_USING_MSH=y CONFIG_FINSH_USING_MSH=y CONFIG_FINSH_THREAD_NAME="tshell" CONFIG_FINSH_THREAD_PRIORITY=20 -CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_THREAD_STACK_SIZE=8192 CONFIG_FINSH_USING_HISTORY=y CONFIG_FINSH_HISTORY_LINES=5 CONFIG_FINSH_USING_SYMTAB=y @@ -114,6 +118,7 @@ CONFIG_FINSH_ARG_MAX=10 # Device virtual file system # CONFIG_RT_USING_DFS=y +CONFIG_DFS_USING_POSIX=y CONFIG_DFS_USING_WORKDIR=y CONFIG_DFS_FILESYSTEMS_MAX=2 CONFIG_DFS_FILESYSTEM_TYPES_MAX=2 @@ -141,6 +146,7 @@ CONFIG_RT_DFS_ELM_DRIVES=2 CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512 # CONFIG_RT_DFS_ELM_USE_ERASE is not set CONFIG_RT_DFS_ELM_REENTRANT=y +CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000 CONFIG_RT_USING_DFS_DEVFS=y # CONFIG_RT_USING_DFS_ROMFS is not set # CONFIG_RT_USING_DFS_RAMFS is not set @@ -193,6 +199,7 @@ CONFIG_RT_USING_SPI_MSD=y # # Using USB # +# CONFIG_RT_USING_USB is not set # CONFIG_RT_USING_USB_HOST is not set # CONFIG_RT_USING_USB_DEVICE is not set @@ -200,16 +207,20 @@ CONFIG_RT_USING_SPI_MSD=y # POSIX layer and C standard library # CONFIG_RT_USING_LIBC=y -CONFIG_RT_USING_PTHREADS=y -CONFIG_PTHREAD_NUM_MAX=8 -CONFIG_RT_USING_POSIX=y -# CONFIG_RT_USING_POSIX_MMAP is not set -# CONFIG_RT_USING_POSIX_TERMIOS is not set -# CONFIG_RT_USING_POSIX_GETLINE is not set -# CONFIG_RT_USING_POSIX_AIO is not set +CONFIG_RT_LIBC_USING_TIME=y +# CONFIG_RT_LIBC_USING_FILEIO is not set # CONFIG_RT_USING_MODULE is not set CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 +# +# POSIX (Portable Operating System Interface) layer +# +# CONFIG_RT_USING_POSIX_FS is not set +# CONFIG_RT_USING_POSIX_DELAY is not set +# CONFIG_RT_USING_POSIX_GETLINE is not set +CONFIG_RT_USING_PTHREADS=y +CONFIG_PTHREAD_NUM_MAX=8 + # # Network # @@ -262,11 +273,11 @@ CONFIG_RT_LWIP_TCP_SND_BUF=4096 CONFIG_RT_LWIP_TCP_WND=2048 CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=12 CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=8 -CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=4096 +CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=8192 # CONFIG_LWIP_NO_RX_THREAD is not set # CONFIG_LWIP_NO_TX_THREAD is not set CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=14 -CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=512 +CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=8192 CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8 # CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set CONFIG_LWIP_NETIF_STATUS_CALLBACK=1 @@ -300,6 +311,7 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_RT_USING_RYM is not set # CONFIG_RT_USING_ULOG is not set # CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set # CONFIG_RT_USING_RT_LINK is not set # @@ -401,12 +413,17 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_AGILE_FTP is not set # CONFIG_PKG_USING_EMBEDDEDPROTO is not set # CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_LORA_PKT_FWD is not set +# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set +# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set +# CONFIG_PKG_USING_HM is not set +# CONFIG_PKG_USING_SMALL_MODBUS is not set # # security packages # # CONFIG_PKG_USING_MBEDTLS is not set -# CONFIG_PKG_USING_libsodium is not set +# CONFIG_PKG_USING_LIBSODIUM is not set # CONFIG_PKG_USING_TINYCRYPT is not set # CONFIG_PKG_USING_TFM is not set # CONFIG_PKG_USING_YD_CRYPTO is not set @@ -422,6 +439,18 @@ CONFIG_RT_LWIP_USING_PING=y # # multimedia packages # + +# +# LVGL: powerful and easy-to-use embedded GUI library +# +# CONFIG_PKG_USING_LVGL is not set +# CONFIG_PKG_USING_LITTLEVGL2RTT is not set + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set # CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_MUPDF is not set # CONFIG_PKG_USING_STEMWIN is not set @@ -434,6 +463,13 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_NUEMWIN is not set # CONFIG_PKG_USING_MP3PLAYER is not set # CONFIG_PKG_USING_TINYJPEG is not set +# CONFIG_PKG_USING_UGUI is not set + +# +# PainterEngine: A cross-platform graphics application framework written in C language +# +# CONFIG_PKG_USING_PAINTERENGINE is not set +# CONFIG_PKG_USING_PAINTERENGINE_AUX is not set # # tools packages @@ -476,19 +512,33 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_MEM_SANDBOX is not set # CONFIG_PKG_USING_SOLAR_TERMS is not set # CONFIG_PKG_USING_GAN_ZHI is not set +# CONFIG_PKG_USING_FDT is not set # # system packages # # -# acceleration: Assembly language or algorithmic acceleration packages +# enhanced kernel services # # CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set + +# +# acceleration: Assembly language or algorithmic acceleration packages +# # CONFIG_PKG_USING_QFPLIB_M0_FULL is not set # CONFIG_PKG_USING_QFPLIB_M0_TINY is not set # CONFIG_PKG_USING_QFPLIB_M3 is not set +# +# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard +# +# CONFIG_PKG_USING_CMSIS_5 is not set +# CONFIG_PKG_USING_CMSIS_5_AUX is not set +# CONFIG_PKG_USING_CMSIS_RTOS2 is not set + # # Micrium: Micrium software products porting for RT-Thread # @@ -506,8 +556,6 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_FLASHDB is not set # CONFIG_PKG_USING_SQLITE is not set # CONFIG_PKG_USING_RTI is not set -# CONFIG_PKG_USING_LITTLEVGL2RTT is not set -# CONFIG_PKG_USING_CMSIS is not set # CONFIG_PKG_USING_DFS_YAFFS is not set # CONFIG_PKG_USING_LITTLEFS is not set # CONFIG_PKG_USING_DFS_JFFS2 is not set @@ -524,13 +572,14 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_QBOOT is not set # CONFIG_PKG_USING_PPOOL is not set # CONFIG_PKG_USING_OPENAMP is not set -# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set # CONFIG_PKG_USING_LPM is not set # CONFIG_PKG_USING_TLSF is not set # CONFIG_PKG_USING_EVENT_RECORDER is not set # CONFIG_PKG_USING_ARM_2D is not set # CONFIG_PKG_USING_WCWIDTH is not set # CONFIG_PKG_USING_MCUBOOT is not set +# CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_USB_STACK is not set # # peripheral libraries and drivers @@ -542,7 +591,6 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_AS7341 is not set # CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_ICM20608 is not set -# CONFIG_PKG_USING_U8G2 is not set # CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_PCF8574 is not set # CONFIG_PKG_USING_SX12XX is not set @@ -604,6 +652,10 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_MCP23008 is not set # CONFIG_PKG_USING_BLUETRUM_SDK is not set # CONFIG_PKG_USING_MISAKA_AT24CXX is not set +# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set +# CONFIG_PKG_USING_BL_MCU_SDK is not set +# CONFIG_PKG_USING_SOFT_SERIAL is not set +# CONFIG_PKG_USING_MB85RS16 is not set # # AI packages @@ -671,7 +723,6 @@ CONFIG_RT_LWIP_USING_PING=y # CONFIG_PKG_USING_MCURSES is not set # CONFIG_PKG_USING_COWSAY is not set # CONFIG_PKG_USING_TERMBOX is not set -CONFIG_SOC_LS=y CONFIG_SOC_LS1C300=y CONFIG_RT_LS1C_OPENLOONGSON=y # CONFIG_RT_LS1C_BAICAIBOARD is not set -- cgit v1.3.1 From 0c5f6121834545df30eb9e6fc5db2848c4be814b Mon Sep 17 00:00:00 2001 From: Lyon <88232613+pikasTech@users.noreply.github.com> Date: Mon, 13 Dec 2021 10:27:38 +0800 Subject: Update rtconfig.h --- bsp/ls1cdev/rtconfig.h | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) (limited to 'bsp') diff --git a/bsp/ls1cdev/rtconfig.h b/bsp/ls1cdev/rtconfig.h index b7c66b207e..59a4f714e3 100644 --- a/bsp/ls1cdev/rtconfig.h +++ b/bsp/ls1cdev/rtconfig.h @@ -44,7 +44,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart2" -#define RT_VER_NUM 0x40004 +#define RT_VER_NUM 0x40100 /* RT-Thread Components */ @@ -75,6 +75,7 @@ /* Device virtual file system */ #define RT_USING_DFS +#define DFS_USING_POSIX #define DFS_USING_WORKDIR #define DFS_FILESYSTEMS_MAX 2 #define DFS_FILESYSTEM_TYPES_MAX 2 @@ -93,6 +94,7 @@ #define RT_DFS_ELM_DRIVES 2 #define RT_DFS_ELM_MAX_SECTOR_SIZE 512 #define RT_DFS_ELM_REENTRANT +#define RT_DFS_ELM_MUTEX_TIMEOUT 3000 #define RT_USING_DFS_DEVFS /* Device Drivers */ @@ -116,10 +118,13 @@ /* POSIX layer and C standard library */ #define RT_USING_LIBC +#define RT_LIBC_USING_TIME +#define RT_LIBC_DEFAULT_TIMEZONE 8 + +/* POSIX (Portable Operating System Interface) layer */ + #define RT_USING_PTHREADS #define PTHREAD_NUM_MAX 8 -#define RT_USING_POSIX -#define RT_LIBC_DEFAULT_TIMEZONE 8 /* Network */ @@ -213,15 +218,29 @@ /* multimedia packages */ +/* LVGL: powerful and easy-to-use embedded GUI library */ + + +/* u8g2: a monochrome graphic library */ + + +/* PainterEngine: A cross-platform graphics application framework written in C language */ + /* tools packages */ /* system packages */ +/* enhanced kernel services */ + + /* acceleration: Assembly language or algorithmic acceleration packages */ +/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + + /* Micrium: Micrium software products porting for RT-Thread */ @@ -238,7 +257,6 @@ /* entertainment: terminal games and other interesting software packages */ -#define SOC_LS #define SOC_LS1C300 #define RT_LS1C_OPENLOONGSON #define RT_USING_UART2 -- cgit v1.3.1 From 01a65632493d6deeaf589b07358da8c9603890ea Mon Sep 17 00:00:00 2001 From: "Man, Jianting (Meco)" <920369182@qq.com> Date: Sun, 12 Dec 2021 22:36:51 -0500 Subject: [stm32l475][arduino] 初步实现Arduino生态兼容 (#5367) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * [arduino] 初步实现Arduino生态兼容组件 * [stm32f475] 增加PC2 作为ADC1_IN3 * [stm32l475][port] 将路径Arduino改为arduino --- .../stm32l475-atk-pandora/applications/SConscript | 9 +- .../applications/arduino_main.cpp | 23 +++++ .../applications/nrf24l01_init.c | 2 +- .../stm32l475-atk-pandora/board/.ignore_format.yml | 6 ++ .../board/CubeMX_Config/STM32L475VE.ioc | 105 +++++++++++---------- .../board/CubeMX_Config/Src/main.c | 38 +++++--- .../board/CubeMX_Config/Src/stm32l4xx_hal_msp.c | 6 +- bsp/stm32/stm32l475-atk-pandora/board/Kconfig | 13 +++ .../board/ports/arduino/SConscript | 12 +++ .../board/ports/arduino/arduino_layout.c | 47 +++++++++ .../board/ports/arduino/arduino_layout.h | 29 ++++++ 11 files changed, 218 insertions(+), 72 deletions(-) create mode 100644 bsp/stm32/stm32l475-atk-pandora/applications/arduino_main.cpp create mode 100644 bsp/stm32/stm32l475-atk-pandora/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/SConscript create mode 100644 bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.c create mode 100644 bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.h (limited to 'bsp') diff --git a/bsp/stm32/stm32l475-atk-pandora/applications/SConscript b/bsp/stm32/stm32l475-atk-pandora/applications/SConscript index 5335ab9bb7..bfa9a40db9 100644 --- a/bsp/stm32/stm32l475-atk-pandora/applications/SConscript +++ b/bsp/stm32/stm32l475-atk-pandora/applications/SConscript @@ -3,12 +3,13 @@ import os cwd = GetCurrentDir() -src = Split(''' -main.c -''') +src = ['main.c'] if GetDepend(['PKG_USING_NRF24L01']): - src += Glob('nrf24l01_init.c') + src += ['nrf24l01_init.c'] + +if GetDepend(['RT_USING_ARDUINO']): + src += ['arduino_main.cpp'] CPPPATH = [cwd] diff --git a/bsp/stm32/stm32l475-atk-pandora/applications/arduino_main.cpp b/bsp/stm32/stm32l475-atk-pandora/applications/arduino_main.cpp new file mode 100644 index 0000000000..455e8b8492 --- /dev/null +++ b/bsp/stm32/stm32l475-atk-pandora/applications/arduino_main.cpp @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-10 Meco Man first version + */ +#include + +void setup(void) +{ + // put your setup code here, to run once: + pinMode(LED_BUILTIN, OUTPUT); +} + +void loop(void) +{ + // put your main code here, to run repeatedly: + digitalWrite(LED_BUILTIN, !digitalRead(LED_BUILTIN)); + delay(200); +} diff --git a/bsp/stm32/stm32l475-atk-pandora/applications/nrf24l01_init.c b/bsp/stm32/stm32l475-atk-pandora/applications/nrf24l01_init.c index 59c27ee558..e291154233 100644 --- a/bsp/stm32/stm32l475-atk-pandora/applications/nrf24l01_init.c +++ b/bsp/stm32/stm32l475-atk-pandora/applications/nrf24l01_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l475-atk-pandora/board/.ignore_format.yml b/bsp/stm32/stm32l475-atk-pandora/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l475-atk-pandora/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/STM32L475VE.ioc b/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/STM32L475VE.ioc index e7711fa510..f9229d26f0 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/STM32L475VE.ioc +++ b/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/STM32L475VE.ioc @@ -37,66 +37,67 @@ Mcu.Name=STM32L475V(C-E-G)Tx Mcu.Package=LQFP100 Mcu.Pin0=PE2 Mcu.Pin1=PE3 -Mcu.Pin10=PA3 -Mcu.Pin11=PA4 -Mcu.Pin12=PA5 -Mcu.Pin13=PA6 -Mcu.Pin14=PA7 -Mcu.Pin15=PC5 -Mcu.Pin16=PE9 -Mcu.Pin17=PE10 -Mcu.Pin18=PE11 -Mcu.Pin19=PE12 +Mcu.Pin10=PA2 +Mcu.Pin11=PA3 +Mcu.Pin12=PA4 +Mcu.Pin13=PA5 +Mcu.Pin14=PA6 +Mcu.Pin15=PA7 +Mcu.Pin16=PC5 +Mcu.Pin17=PE9 +Mcu.Pin18=PE10 +Mcu.Pin19=PE11 Mcu.Pin2=PE4 -Mcu.Pin20=PE13 -Mcu.Pin21=PE14 -Mcu.Pin22=PE15 -Mcu.Pin23=PB10 -Mcu.Pin24=PB11 -Mcu.Pin25=PB13 -Mcu.Pin26=PB14 -Mcu.Pin27=PB15 -Mcu.Pin28=PC8 -Mcu.Pin29=PC9 +Mcu.Pin20=PE12 +Mcu.Pin21=PE13 +Mcu.Pin22=PE14 +Mcu.Pin23=PE15 +Mcu.Pin24=PB10 +Mcu.Pin25=PB11 +Mcu.Pin26=PB13 +Mcu.Pin27=PB14 +Mcu.Pin28=PB15 +Mcu.Pin29=PC8 Mcu.Pin3=PE5 -Mcu.Pin30=PA9 -Mcu.Pin31=PA10 -Mcu.Pin32=PA11 -Mcu.Pin33=PA12 -Mcu.Pin34=PA13 (JTMS-SWDIO) -Mcu.Pin35=PA14 (JTCK-SWCLK) -Mcu.Pin36=PC10 -Mcu.Pin37=PC11 -Mcu.Pin38=PC12 -Mcu.Pin39=PD2 +Mcu.Pin30=PC9 +Mcu.Pin31=PA9 +Mcu.Pin32=PA10 +Mcu.Pin33=PA11 +Mcu.Pin34=PA12 +Mcu.Pin35=PA13 (JTMS-SWDIO) +Mcu.Pin36=PA14 (JTCK-SWCLK) +Mcu.Pin37=PC10 +Mcu.Pin38=PC11 +Mcu.Pin39=PC12 Mcu.Pin4=PE6 -Mcu.Pin40=PB3 (JTDO-TRACESWO) -Mcu.Pin41=PB5 -Mcu.Pin42=PB7 -Mcu.Pin43=PB8 -Mcu.Pin44=VP_IWDG_VS_IWDG -Mcu.Pin45=VP_LPTIM1_VS_LPTIM_counterModeInternalClock -Mcu.Pin46=VP_RTC_VS_RTC_Activate -Mcu.Pin47=VP_SAI1_VP_$IpInstance_SAIA_SAI_BASIC -Mcu.Pin48=VP_SAI1_VP_$IpInstance_SAIB_SAI_BASIC -Mcu.Pin49=VP_SYS_VS_Systick +Mcu.Pin40=PD2 +Mcu.Pin41=PB3 (JTDO-TRACESWO) +Mcu.Pin42=PB5 +Mcu.Pin43=PB7 +Mcu.Pin44=PB8 +Mcu.Pin45=VP_IWDG_VS_IWDG +Mcu.Pin46=VP_LPTIM1_VS_LPTIM_counterModeInternalClock +Mcu.Pin47=VP_RTC_VS_RTC_Activate +Mcu.Pin48=VP_SAI1_VP_$IpInstance_SAIA_SAI_BASIC +Mcu.Pin49=VP_SAI1_VP_$IpInstance_SAIB_SAI_BASIC Mcu.Pin5=PC14-OSC32_IN (PC14) -Mcu.Pin50=VP_TIM1_VS_ClockSourceINT -Mcu.Pin51=VP_TIM2_VS_ClockSourceINT -Mcu.Pin52=VP_TIM4_VS_ClockSourceINT -Mcu.Pin53=VP_TIM15_VS_ClockSourceINT -Mcu.Pin54=VP_TIM16_VS_ClockSourceINT -Mcu.Pin55=VP_TIM17_VS_ClockSourceINT +Mcu.Pin50=VP_SYS_VS_Systick +Mcu.Pin51=VP_TIM1_VS_ClockSourceINT +Mcu.Pin52=VP_TIM2_VS_ClockSourceINT +Mcu.Pin53=VP_TIM4_VS_ClockSourceINT +Mcu.Pin54=VP_TIM15_VS_ClockSourceINT +Mcu.Pin55=VP_TIM16_VS_ClockSourceINT +Mcu.Pin56=VP_TIM17_VS_ClockSourceINT Mcu.Pin6=PC15-OSC32_OUT (PC15) Mcu.Pin7=PH0-OSC_IN (PH0) Mcu.Pin8=PH1-OSC_OUT (PH1) -Mcu.Pin9=PA2 -Mcu.PinsNb=56 +Mcu.Pin9=PC2 +Mcu.PinsNb=57 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32L475VETx -MxCube.Version=6.2.1 -MxDb.Version=DB.6.0.21 +MxCube.Version=6.4.0 +MxDb.Version=DB.6.0.40 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.ForceEnableDMAVector=true @@ -171,6 +172,8 @@ PC14-OSC32_IN\ (PC14).Mode=LSE-External-Oscillator PC14-OSC32_IN\ (PC14).Signal=RCC_OSC32_IN PC15-OSC32_OUT\ (PC15).Mode=LSE-External-Oscillator PC15-OSC32_OUT\ (PC15).Signal=RCC_OSC32_OUT +PC2.Locked=true +PC2.Signal=ADCx_IN3 PC5.Signal=ADCx_IN14 PC8.Mode=SD_4_bits_Wide_bus PC8.Signal=SDMMC1_D0 @@ -309,6 +312,8 @@ SAI1.VirtualProtocol-SAI_A_BASIC=VM_BASIC_PROTOCOL SAI1.VirtualProtocol-SAI_B_BASIC=VM_BASIC_PROTOCOL SH.ADCx_IN14.0=ADC1_IN14,IN14-Single-Ended SH.ADCx_IN14.ConfNb=1 +SH.ADCx_IN3.0=ADC1_IN3,IN3-Single-Ended +SH.ADCx_IN3.ConfNb=1 SH.COMP_DAC11_group.0=DAC1_OUT1,DAC_OUT1 SH.COMP_DAC11_group.ConfNb=1 SH.S_TIM1_CH1.0=TIM1_CH1,PWM Generation1 CH1 diff --git a/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Src/main.c b/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Src/main.c index 2a9dcd82a7..9c8957addc 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Src/main.c +++ b/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Src/main.c @@ -101,6 +101,7 @@ PCD_HandleTypeDef hpcd_USB_OTG_FS; /* Private function prototypes -----------------------------------------------*/ void SystemClock_Config(void); +void PeriphCommonClock_Config(void); static void MX_GPIO_Init(void); static void MX_USART1_UART_Init(void); static void MX_USART2_UART_Init(void); @@ -154,6 +155,9 @@ int main(void) /* Configure the system clock */ SystemClock_Config(); +/* Configure the peripherals common clocks */ + PeriphCommonClock_Config(); + /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ @@ -205,8 +209,13 @@ void SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + /** Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) + { + Error_Handler(); + } /** Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); @@ -243,16 +252,22 @@ void SystemClock_Config(void) { Error_Handler(); } - PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1 - |RCC_PERIPHCLK_USART2|RCC_PERIPHCLK_LPTIM1 - |RCC_PERIPHCLK_SAI1|RCC_PERIPHCLK_USB +} + +/** + * @brief Peripherals Common Clock Configuration + * @retval None + */ +void PeriphCommonClock_Config(void) +{ + RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + + /** Initializes the peripherals clock + */ + PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SAI1|RCC_PERIPHCLK_USB |RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_ADC; - PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; - PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; - PeriphClkInit.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_PCLK; PeriphClkInit.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLLSAI1; PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1; - PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1; PeriphClkInit.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLLSAI1; PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE; @@ -267,12 +282,6 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Configure the main internal regulator output voltage - */ - if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) - { - Error_Handler(); - } } /** @@ -1190,4 +1199,3 @@ void assert_failed(uint8_t *file, uint32_t line) } #endif /* USE_FULL_ASSERT */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c b/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c index 77fb0eecc6..12993e3513 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c +++ b/bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Src/stm32l4xx_hal_msp.c @@ -118,9 +118,10 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) __HAL_RCC_GPIOC_CLK_ENABLE(); /**ADC1 GPIO Configuration + PC2 ------> ADC1_IN3 PC5 ------> ADC1_IN14 */ - GPIO_InitStruct.Pin = GPIO_PIN_5; + GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_5; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG_ADC_CONTROL; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); @@ -149,9 +150,10 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) __HAL_RCC_ADC_CLK_DISABLE(); /**ADC1 GPIO Configuration + PC2 ------> ADC1_IN3 PC5 ------> ADC1_IN14 */ - HAL_GPIO_DeInit(GPIOC, GPIO_PIN_5); + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_2|GPIO_PIN_5); /* USER CODE BEGIN ADC1_MspDeInit 1 */ diff --git a/bsp/stm32/stm32l475-atk-pandora/board/Kconfig b/bsp/stm32/stm32l475-atk-pandora/board/Kconfig index 0a9f253d5d..67571d48fa 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/Kconfig +++ b/bsp/stm32/stm32l475-atk-pandora/board/Kconfig @@ -15,6 +15,19 @@ menu "Onboard Peripheral Drivers" select BSP_USING_UART1 default y + config BSP_USING_ARDUINO_UNO + bool "Support Arduino UNO" + select RT_USING_ARDUINO + select RT_USING_ARDUINO_UNO_LAYOUT + select BSP_USING_PWM + select BSP_USING_PWM1 + select BSP_USING_PWM1_CH1 + select BSP_USING_PWM4 + select BSP_USING_PWM4_CH3 + select BSP_USING_ADC + select BSP_USING_ADC1 + default n + config BSP_USING_KEY bool "Enable onboard keys" select RT_USING_PIN diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/SConscript b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/SConscript new file mode 100644 index 0000000000..f8f52e280d --- /dev/null +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/SConscript @@ -0,0 +1,12 @@ +from building import * + +cwd = GetCurrentDir() +src = [] +inc = [cwd] + +if GetDepend('RT_USING_ARDUINO_UNO_LAYOUT'): + src += ['arduino_layout.c'] + +group = DefineGroup('Arduino', src, depend = ['RT_USING_ARDUINO'], CPPPATH = inc) + +Return('group') diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.c b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.c new file mode 100644 index 0000000000..dce9988127 --- /dev/null +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.c @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-10 Meco Man first version + */ +#include +#include + +const pin_map_t pin_map_table[ARDUINO_LAYOUT_PIN_MAX]= +{ + /* + {Arduino Pin, RT-Thread Pin [, Device Name(PWM or ADC), Channel]} + [] means optional + Digital pins must NOT give the device name and channel. + Analog pins MUST give the device name and channel(ADC or PWM). + */ + {0}, /* D0, RX */ + {1}, /* D1, TX */ + {2, GET_PIN(D,10)}, /* D2, BSP:KEY0 */ + {3}, /* D3, PWM */ + {4, GET_PIN(D,9)}, /* D4, BSP:KEY1 */ + {5, GET_PIN(D,8)}, /* D5, BSP:KEY2 */ + {6}, /* D6, PWM */ + {7}, /* D7 */ + {8, GET_PIN(E,7)}, /* D8, BSP: RED-LED */ + {9}, /* D9, PWM */ + {10, GET_PIN(E,9), "pwm1", 1}, /* D10, PWM, BSP: BLUE-LED */ + {11, GET_PIN(B,8), "pwm4", 3}, /* D11, PWM */ + {12, GET_PIN(B,2)}, /* D12, BSP: BEEP */ + {13, GET_PIN(E,8)}, /* D13, LED_BUILTIN, BSP: GREEN-LED */ + {14, GET_PIN(C,2), "adc1", 3}, /* D14, A0 */ + {15}, /* D15, A1 */ + {16}, /* D16, A2 */ + {17}, /* D17, A3 */ + {18}, /* D18, A4 */ + {19} /* D19, A5 */ +}; + +/* initialization for BSP; maybe a blank function */ +void initVariant(void) +{ + /* Nothing needs to initialize for this BSP */ +} diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.h b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.h new file mode 100644 index 0000000000..f5a1b8f958 --- /dev/null +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-10 Meco Man first version + */ +#ifndef __UNO_LAYOUT_H__ +#define __UNO_LAYOUT_H__ + +#include + +#define LED_BUILTIN 13 /* Built-in LED */ + +#define ARDUINO_PWM_HZ 500 /* Arduino UNO's PWM is around 500Hz */ +#define ARDUINO_LAYOUT_PIN_MAX 20 + +#define A0 (14) +#define A1 (15) +#define A2 (16) +#define A3 (17) +#define A4 (18) +#define A5 (19) +#define A6 (20) +#define A7 (21) + +#endif -- cgit v1.3.1 From 05d15b11629244dd54bb2ce1610c73343288bc57 Mon Sep 17 00:00:00 2001 From: Meco Man <920369182@qq.com> Date: Sun, 12 Dec 2021 23:45:29 -0500 Subject: [stm32][drv_common] add LOW_E for Error_Handler --- bsp/stm32/libraries/HAL_Drivers/drv_common.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'bsp') diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_common.c b/bsp/stm32/libraries/HAL_Drivers/drv_common.c index 87707d68ea..5ff50e5f40 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_common.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_common.c @@ -16,8 +16,12 @@ #include "drv_usart_v2.h" #else #include "drv_usart.h" -#endif -#endif +#endif /* RT_USING_SERIAL */ +#endif /* RT_USING_SERIAL_V2 */ + +#define DBG_TAG "drv_common" +#define DBG_LVL DBG_INFO +#include #ifdef RT_USING_FINSH #include @@ -115,6 +119,7 @@ void _Error_Handler(char *s, int num) { /* USER CODE BEGIN Error_Handler */ /* User can add his own implementation to report the HAL error return state */ + LOG_E("Error_Handler at file:%s num:%d", s, num); while (1) { } -- cgit v1.3.1 From 878ecd14f42839a437badfd8d4c28878a93a2a12 Mon Sep 17 00:00:00 2001 From: Meco Man <920369182@qq.com> Date: Sun, 12 Dec 2021 23:44:27 -0500 Subject: [stm32] add ignore_format.yml --- bsp/stm32/stm32f072-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f091-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f103-atk-nano/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f103-atk-warshipv3/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f103-blue-pill/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f103-dofly-M3S/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f103-dofly-lyc8/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f103-fire-arbitrary/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f103-gizwits-gokitv21/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f103-hw100k-ibox/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f103-onenet-nbiot/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f103-yf-ufun/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f107-uc-eval/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f207-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f302-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f401-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f405-smdz-breadfruit/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f407-armfly-v5/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f407-atk-explorer/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f407-robomaster-c/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f407-st-discovery/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f410-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f411-atk-nano/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f411-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f411-weact-MiniF4/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f413-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f427-robomaster-a/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f429-armfly-v6/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f429-atk-apollo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f429-fire-challenger/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f429-st-disco/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f446-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f469-st-disco/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f746-st-disco/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f746-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f767-atk-apollo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f767-fire-challenger-v1/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32f769-st-disco/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32g070-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32g071-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32g431-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32g474-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32h743-armfly-V7/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32h743-atk-apollo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32h743-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32h747-st-discovery/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32h750-armfly-h7-tool/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32h750-artpi-h750/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32l010-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32l053-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32l412-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32l431-BearPi/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32l432-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32l433-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32l452-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32l475-st-discovery/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32l476-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32l496-ali-developer/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32l496-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32l4r5-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32l4r9-st-eval/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32l4r9-st-sensortile-box/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32mp157a-st-discovery/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32mp157a-st-ev1/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32wb55-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32wl55-st-nucleo/board/.ignore_format.yml | 6 ++++++ bsp/stm32/stm32wle5-yizhilian-lm401/board/.ignore_format.yml | 6 ++++++ 67 files changed, 402 insertions(+) create mode 100644 bsp/stm32/stm32f072-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f091-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f103-atk-nano/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f103-atk-warshipv3/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f103-blue-pill/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f103-dofly-M3S/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f103-dofly-lyc8/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f103-fire-arbitrary/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f103-gizwits-gokitv21/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f103-hw100k-ibox/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f103-onenet-nbiot/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f103-yf-ufun/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f107-uc-eval/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f207-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f302-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f401-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f405-smdz-breadfruit/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f407-armfly-v5/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f407-atk-explorer/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f407-robomaster-c/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f407-st-discovery/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f410-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f411-atk-nano/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f411-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f411-weact-MiniF4/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f413-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f427-robomaster-a/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f429-armfly-v6/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f429-atk-apollo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f429-fire-challenger/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f429-st-disco/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f446-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f469-st-disco/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f746-st-disco/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f746-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f767-atk-apollo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f767-fire-challenger-v1/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32f769-st-disco/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32g070-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32g071-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32g431-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32g474-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32h743-armfly-V7/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32h743-atk-apollo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32h743-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32h747-st-discovery/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32h750-armfly-h7-tool/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32h750-artpi-h750/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l010-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l053-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l412-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l431-BearPi/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l432-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l433-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l452-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l475-st-discovery/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l476-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l496-ali-developer/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l496-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l4r5-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l4r9-st-eval/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32l4r9-st-sensortile-box/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32mp157a-st-discovery/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32mp157a-st-ev1/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32wb55-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32wl55-st-nucleo/board/.ignore_format.yml create mode 100644 bsp/stm32/stm32wle5-yizhilian-lm401/board/.ignore_format.yml (limited to 'bsp') diff --git a/bsp/stm32/stm32f072-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32f072-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f072-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f091-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32f091-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f091-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f103-atk-nano/board/.ignore_format.yml b/bsp/stm32/stm32f103-atk-nano/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f103-atk-nano/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/.ignore_format.yml b/bsp/stm32/stm32f103-atk-warshipv3/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f103-blue-pill/board/.ignore_format.yml b/bsp/stm32/stm32f103-blue-pill/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f103-blue-pill/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f103-dofly-M3S/board/.ignore_format.yml b/bsp/stm32/stm32f103-dofly-M3S/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f103-dofly-M3S/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f103-dofly-lyc8/board/.ignore_format.yml b/bsp/stm32/stm32f103-dofly-lyc8/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f103-dofly-lyc8/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f103-fire-arbitrary/board/.ignore_format.yml b/bsp/stm32/stm32f103-fire-arbitrary/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f103-fire-arbitrary/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f103-gizwits-gokitv21/board/.ignore_format.yml b/bsp/stm32/stm32f103-gizwits-gokitv21/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f103-gizwits-gokitv21/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f103-hw100k-ibox/board/.ignore_format.yml b/bsp/stm32/stm32f103-hw100k-ibox/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f103-hw100k-ibox/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f103-onenet-nbiot/board/.ignore_format.yml b/bsp/stm32/stm32f103-onenet-nbiot/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f103-onenet-nbiot/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f103-yf-ufun/board/.ignore_format.yml b/bsp/stm32/stm32f103-yf-ufun/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f103-yf-ufun/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f107-uc-eval/board/.ignore_format.yml b/bsp/stm32/stm32f107-uc-eval/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f107-uc-eval/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f207-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32f207-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f207-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f302-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32f302-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f302-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f401-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32f401-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f401-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f405-smdz-breadfruit/board/.ignore_format.yml b/bsp/stm32/stm32f405-smdz-breadfruit/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f405-smdz-breadfruit/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f407-armfly-v5/board/.ignore_format.yml b/bsp/stm32/stm32f407-armfly-v5/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f407-armfly-v5/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f407-atk-explorer/board/.ignore_format.yml b/bsp/stm32/stm32f407-atk-explorer/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f407-atk-explorer/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f407-robomaster-c/board/.ignore_format.yml b/bsp/stm32/stm32f407-robomaster-c/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f407-robomaster-c/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f407-st-discovery/board/.ignore_format.yml b/bsp/stm32/stm32f407-st-discovery/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f407-st-discovery/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f410-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32f410-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f410-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f411-atk-nano/board/.ignore_format.yml b/bsp/stm32/stm32f411-atk-nano/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f411-atk-nano/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f411-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32f411-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f411-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f411-weact-MiniF4/board/.ignore_format.yml b/bsp/stm32/stm32f411-weact-MiniF4/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f411-weact-MiniF4/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f413-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32f413-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f413-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f427-robomaster-a/board/.ignore_format.yml b/bsp/stm32/stm32f427-robomaster-a/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f427-robomaster-a/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f429-armfly-v6/board/.ignore_format.yml b/bsp/stm32/stm32f429-armfly-v6/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f429-armfly-v6/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f429-atk-apollo/board/.ignore_format.yml b/bsp/stm32/stm32f429-atk-apollo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f429-atk-apollo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f429-fire-challenger/board/.ignore_format.yml b/bsp/stm32/stm32f429-fire-challenger/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f429-fire-challenger/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f429-st-disco/board/.ignore_format.yml b/bsp/stm32/stm32f429-st-disco/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f429-st-disco/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f446-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32f446-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f446-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f469-st-disco/board/.ignore_format.yml b/bsp/stm32/stm32f469-st-disco/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f469-st-disco/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f746-st-disco/board/.ignore_format.yml b/bsp/stm32/stm32f746-st-disco/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f746-st-disco/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f746-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32f746-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f746-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f767-atk-apollo/board/.ignore_format.yml b/bsp/stm32/stm32f767-atk-apollo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f767-atk-apollo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f767-fire-challenger-v1/board/.ignore_format.yml b/bsp/stm32/stm32f767-fire-challenger-v1/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f767-fire-challenger-v1/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32f769-st-disco/board/.ignore_format.yml b/bsp/stm32/stm32f769-st-disco/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32f769-st-disco/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32g070-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32g070-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32g070-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32g071-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32g071-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32g071-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32g431-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32g431-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32g431-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32g474-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32g474-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32g474-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32h743-armfly-V7/board/.ignore_format.yml b/bsp/stm32/stm32h743-armfly-V7/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32h743-armfly-V7/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32h743-atk-apollo/board/.ignore_format.yml b/bsp/stm32/stm32h743-atk-apollo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32h743-atk-apollo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32h743-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32h743-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32h743-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32h747-st-discovery/board/.ignore_format.yml b/bsp/stm32/stm32h747-st-discovery/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32h747-st-discovery/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32h750-armfly-h7-tool/board/.ignore_format.yml b/bsp/stm32/stm32h750-armfly-h7-tool/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32h750-armfly-h7-tool/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32h750-artpi-h750/board/.ignore_format.yml b/bsp/stm32/stm32h750-artpi-h750/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32h750-artpi-h750/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l010-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32l010-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l010-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l053-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32l053-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l053-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l412-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32l412-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l412-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l431-BearPi/board/.ignore_format.yml b/bsp/stm32/stm32l431-BearPi/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l431-BearPi/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l432-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32l432-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l432-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l433-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32l433-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l433-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l452-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32l452-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l452-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l475-st-discovery/board/.ignore_format.yml b/bsp/stm32/stm32l475-st-discovery/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l475-st-discovery/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l476-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32l476-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l476-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l496-ali-developer/board/.ignore_format.yml b/bsp/stm32/stm32l496-ali-developer/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l496-ali-developer/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l496-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32l496-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l496-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l4r5-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32l4r5-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l4r5-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l4r9-st-eval/board/.ignore_format.yml b/bsp/stm32/stm32l4r9-st-eval/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-eval/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32l4r9-st-sensortile-box/board/.ignore_format.yml b/bsp/stm32/stm32l4r9-st-sensortile-box/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32l4r9-st-sensortile-box/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32mp157a-st-discovery/board/.ignore_format.yml b/bsp/stm32/stm32mp157a-st-discovery/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32mp157a-st-discovery/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/.ignore_format.yml b/bsp/stm32/stm32mp157a-st-ev1/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32mp157a-st-ev1/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32wb55-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32wb55-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32wb55-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32wl55-st-nucleo/board/.ignore_format.yml b/bsp/stm32/stm32wl55-st-nucleo/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32wl55-st-nucleo/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config diff --git a/bsp/stm32/stm32wle5-yizhilian-lm401/board/.ignore_format.yml b/bsp/stm32/stm32wle5-yizhilian-lm401/board/.ignore_format.yml new file mode 100644 index 0000000000..0d7f3e360c --- /dev/null +++ b/bsp/stm32/stm32wle5-yizhilian-lm401/board/.ignore_format.yml @@ -0,0 +1,6 @@ +# files format check exclude path, please follow the instructions below to modify; +# If you need to exclude an entire folder, add the folder path in dir_path; +# If you need to exclude a file, add the path to the file in file_path. + +dir_path: +- CubeMX_Config -- cgit v1.3.1 From d83bea2ba38e6ad066e2dba7569b51645aa77d6c Mon Sep 17 00:00:00 2001 From: Meco Man <920369182@qq.com> Date: Mon, 13 Dec 2021 00:50:41 -0500 Subject: [stm32l475] 修正port/Arduino的宏定义 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/stm32/stm32l475-atk-pandora/board/Kconfig | 5 ++--- bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/SConscript | 5 +---- 2 files changed, 3 insertions(+), 7 deletions(-) (limited to 'bsp') diff --git a/bsp/stm32/stm32l475-atk-pandora/board/Kconfig b/bsp/stm32/stm32l475-atk-pandora/board/Kconfig index 67571d48fa..627ef48251 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/Kconfig +++ b/bsp/stm32/stm32l475-atk-pandora/board/Kconfig @@ -15,10 +15,9 @@ menu "Onboard Peripheral Drivers" select BSP_USING_UART1 default y - config BSP_USING_ARDUINO_UNO - bool "Support Arduino UNO" + config BSP_USING_ARDUINO + bool "Support Arduino" select RT_USING_ARDUINO - select RT_USING_ARDUINO_UNO_LAYOUT select BSP_USING_PWM select BSP_USING_PWM1 select BSP_USING_PWM1_CH1 diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/SConscript b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/SConscript index f8f52e280d..69deb86a15 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/SConscript +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/SConscript @@ -1,12 +1,9 @@ from building import * cwd = GetCurrentDir() -src = [] +src = ['arduino_layout.c'] inc = [cwd] -if GetDepend('RT_USING_ARDUINO_UNO_LAYOUT'): - src += ['arduino_layout.c'] - group = DefineGroup('Arduino', src, depend = ['RT_USING_ARDUINO'], CPPPATH = inc) Return('group') -- cgit v1.3.1 From 5a53afd00a9b3620852ba7dd4244c8b8ed1017c1 Mon Sep 17 00:00:00 2001 From: Rbb666 Date: Mon, 13 Dec 2021 17:28:42 +0800 Subject: Add BSP-ART-PI download algorithm --- bsp/stm32/stm32h750-artpi-h750/project.uvoptx | 802 ++++++++++++++++++++++++- bsp/stm32/stm32h750-artpi-h750/project.uvprojx | 296 +++------ bsp/stm32/stm32h750-artpi-h750/template.uvoptx | 2 +- 3 files changed, 898 insertions(+), 202 deletions(-) (limited to 'bsp') diff --git a/bsp/stm32/stm32h750-artpi-h750/project.uvoptx b/bsp/stm32/stm32h750-artpi-h750/project.uvoptx index 790ef328e8..8f6875ca5c 100644 --- a/bsp/stm32/stm32h750-artpi-h750/project.uvoptx +++ b/bsp/stm32/stm32h750-artpi-h750/project.uvoptx @@ -10,7 +10,7 @@ *.s*; *.src; *.a* *.obj; *.o *.lib - *.txt; *.h; *.inc + *.txt; *.h; *.inc; *.md *.plm *.cpp 0 @@ -125,7 +125,7 @@ 0 ST-LINKIII-KEIL_SWO - -U066BFF393732484257162540 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32H7x_128k -FS08000000 -FL020000 + -U066BFF393732484257162540 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC4000 -FN1 -FF0ART-PI_W25Q64 -FS090000000 -FL0800000 @@ -173,7 +173,7 @@ 1 - 1 + 0 0 2 10000000 @@ -181,4 +181,800 @@ + + Applications + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + applications\main.c + main.c + 0 + 0 + + + + + CPU + 0 + 0 + 0 + 0 + + 2 + 2 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\backtrace.c + backtrace.c + 0 + 0 + + + 2 + 3 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\showmem.c + showmem.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\common\div0.c + div0.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m7\cpu_cache.c + cpu_cache.c + 0 + 0 + + + 2 + 6 + 2 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m7\context_rvds.S + context_rvds.S + 0 + 0 + + + 2 + 7 + 1 + 0 + 0 + 0 + ..\..\..\libcpu\arm\cortex-m7\cpuport.c + cpuport.c + 0 + 0 + + + + + DeviceDrivers + 0 + 0 + 0 + 0 + + 3 + 8 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\misc\pin.c + pin.c + 0 + 0 + + + 3 + 9 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\serial\serial.c + serial.c + 0 + 0 + + + 3 + 10 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\workqueue.c + workqueue.c + 0 + 0 + + + 3 + 11 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\waitqueue.c + waitqueue.c + 0 + 0 + + + 3 + 12 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\dataqueue.c + dataqueue.c + 0 + 0 + + + 3 + 13 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\ringblk_buf.c + ringblk_buf.c + 0 + 0 + + + 3 + 14 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\ringbuffer.c + ringbuffer.c + 0 + 0 + + + 3 + 15 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\pipe.c + pipe.c + 0 + 0 + + + 3 + 16 + 1 + 0 + 0 + 0 + ..\..\..\components\drivers\src\completion.c + completion.c + 0 + 0 + + + + + Drivers + 0 + 0 + 0 + 0 + + 4 + 17 + 1 + 0 + 0 + 0 + board\CubeMX_Config\Core\Src\stm32h7xx_hal_msp.c + stm32h7xx_hal_msp.c + 0 + 0 + + + 4 + 18 + 2 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\CMSIS\Device\ST\STM32H7xx\Source\Templates\arm\startup_stm32h750xx.s + startup_stm32h750xx.s + 0 + 0 + + + 4 + 19 + 1 + 0 + 0 + 0 + board\board.c + board.c + 0 + 0 + + + 4 + 20 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_gpio.c + drv_gpio.c + 0 + 0 + + + 4 + 21 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_usart.c + drv_usart.c + 0 + 0 + + + 4 + 22 + 1 + 0 + 0 + 0 + ..\libraries\HAL_Drivers\drv_common.c + drv_common.c + 0 + 0 + + + + + Finsh + 0 + 0 + 0 + 0 + + 5 + 23 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\shell.c + shell.c + 0 + 0 + + + 5 + 24 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\msh.c + msh.c + 0 + 0 + + + 5 + 25 + 1 + 0 + 0 + 0 + ..\..\..\components\finsh\cmd.c + cmd.c + 0 + 0 + + + + + Kernel + 0 + 0 + 0 + 0 + + 6 + 26 + 1 + 0 + 0 + 0 + ..\..\..\src\clock.c + clock.c + 0 + 0 + + + 6 + 27 + 1 + 0 + 0 + 0 + ..\..\..\src\mempool.c + mempool.c + 0 + 0 + + + 6 + 28 + 1 + 0 + 0 + 0 + ..\..\..\src\device.c + device.c + 0 + 0 + + + 6 + 29 + 1 + 0 + 0 + 0 + ..\..\..\src\mem.c + mem.c + 0 + 0 + + + 6 + 30 + 1 + 0 + 0 + 0 + ..\..\..\src\timer.c + timer.c + 0 + 0 + + + 6 + 31 + 1 + 0 + 0 + 0 + ..\..\..\src\components.c + components.c + 0 + 0 + + + 6 + 32 + 1 + 0 + 0 + 0 + ..\..\..\src\thread.c + thread.c + 0 + 0 + + + 6 + 33 + 1 + 0 + 0 + 0 + ..\..\..\src\irq.c + irq.c + 0 + 0 + + + 6 + 34 + 1 + 0 + 0 + 0 + ..\..\..\src\idle.c + idle.c + 0 + 0 + + + 6 + 35 + 1 + 0 + 0 + 0 + ..\..\..\src\object.c + object.c + 0 + 0 + + + 6 + 36 + 1 + 0 + 0 + 0 + ..\..\..\src\kservice.c + kservice.c + 0 + 0 + + + 6 + 37 + 1 + 0 + 0 + 0 + ..\..\..\src\scheduler.c + scheduler.c + 0 + 0 + + + 6 + 38 + 1 + 0 + 0 + 0 + ..\..\..\src\ipc.c + ipc.c + 0 + 0 + + + + + libc + 0 + 0 + 0 + 0 + + 7 + 39 + 1 + 0 + 0 + 0 + ..\..\..\components\libc\compilers\common\time.c + time.c + 0 + 0 + + + + + Libraries + 0 + 0 + 0 + 0 + + 8 + 40 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc.c + stm32h7xx_hal_rcc.c + 0 + 0 + + + 8 + 41 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr.c + stm32h7xx_hal_pwr.c + 0 + 0 + + + 8 + 42 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc_ex.c + stm32h7xx_hal_rcc_ex.c + 0 + 0 + + + 8 + 43 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_sram.c + stm32h7xx_hal_sram.c + 0 + 0 + + + 8 + 44 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cortex.c + stm32h7xx_hal_cortex.c + 0 + 0 + + + 8 + 45 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cryp_ex.c + stm32h7xx_hal_cryp_ex.c + 0 + 0 + + + 8 + 46 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma_ex.c + stm32h7xx_hal_dma_ex.c + 0 + 0 + + + 8 + 47 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cryp.c + stm32h7xx_hal_cryp.c + 0 + 0 + + + 8 + 48 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_usart.c + stm32h7xx_hal_usart.c + 0 + 0 + + + 8 + 49 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_crc_ex.c + stm32h7xx_hal_crc_ex.c + 0 + 0 + + + 8 + 50 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_gpio.c + stm32h7xx_hal_gpio.c + 0 + 0 + + + 8 + 51 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart_ex.c + stm32h7xx_hal_uart_ex.c + 0 + 0 + + + 8 + 52 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_mdma.c + stm32h7xx_hal_mdma.c + 0 + 0 + + + 8 + 53 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal.c + stm32h7xx_hal.c + 0 + 0 + + + 8 + 54 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma.c + stm32h7xx_hal_dma.c + 0 + 0 + + + 8 + 55 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart.c + stm32h7xx_hal_uart.c + 0 + 0 + + + 8 + 56 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_comp.c + stm32h7xx_hal_comp.c + 0 + 0 + + + 8 + 57 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rng.c + stm32h7xx_hal_rng.c + 0 + 0 + + + 8 + 58 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_crc.c + stm32h7xx_hal_crc.c + 0 + 0 + + + 8 + 59 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cec.c + stm32h7xx_hal_cec.c + 0 + 0 + + + 8 + 60 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr_ex.c + stm32h7xx_hal_pwr_ex.c + 0 + 0 + + + 8 + 61 + 1 + 0 + 0 + 0 + ..\libraries\STM32H7xx_HAL\CMSIS\Device\ST\STM32H7xx\Source\Templates\system_stm32h7xx.c + system_stm32h7xx.c + 0 + 0 + + + diff --git a/bsp/stm32/stm32h750-artpi-h750/project.uvprojx b/bsp/stm32/stm32h750-artpi-h750/project.uvprojx index 3e744ce57f..2ad2ab4e3b 100644 --- a/bsp/stm32/stm32h750-artpi-h750/project.uvprojx +++ b/bsp/stm32/stm32h750-artpi-h750/project.uvprojx @@ -1,7 +1,10 @@ + 2.1 +
### uVision Project, (C) Keil Software
+ rt-thread @@ -13,31 +16,31 @@ STM32H750XBHx STMicroelectronics - Keil.STM32H7xx_DFP.2.5.0 + Keil.STM32H7xx_DFP.2.7.0 http://www.keil.com/pack/ IRAM(0x20000000,0x00020000) IRAM2(0x24000000,0x00080000) IROM(0x08000000,0x00020000) XRAM(0x30000000,0x00048000) XRAM2(0x38000000,0x00010000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE - - + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32H7x_128k -FS08000000 -FL020000 -FP0($$Device:STM32H750XBHx$CMSIS\Flash\STM32H7x_128k.FLM)) 0 $$Device:STM32H750XBHx$Drivers\CMSIS\Device\ST\STM32H7xx\Include\stm32h7xx.h - - - - - - - - - + + + + + + + + + $$Device:STM32H750XBHx$CMSIS\SVD\STM32H750x.svd 0 0 - - - - - + + + + + 0 0 @@ -59,8 +62,8 @@ 0 0 - - + + 0 0 0 @@ -69,8 +72,8 @@ 0 0 - - + + 0 0 0 @@ -80,14 +83,14 @@ 1 0 fromelf --bin !L --output rtthread.bin - + 0 0 0 0 0 - + 0 @@ -101,8 +104,8 @@ 0 0 3 - - + + 1 @@ -135,11 +138,11 @@ 1 BIN\UL2CM3.DLL - - - - - + + + + + 0 @@ -172,7 +175,7 @@ 0 0 "Cortex-M7" - + 0 0 0 @@ -182,6 +185,7 @@ 0 3 0 + 0 1 0 8 @@ -305,7 +309,7 @@ 0x80000 - + 1 @@ -332,9 +336,9 @@ 0 0 - + STM32H750xx, USE_HAL_DRIVER, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND - + ..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m7;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;board;board\CubeMX_Config\Core\Inc;board\port;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\components\finsh;.;..\..\..\include;..\..\..\components\libc\compilers\common;..\..\..\components\libc\compilers\common\nogcc;..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Inc;..\libraries\STM32H7xx_HAL\CMSIS\Device\ST\STM32H7xx\Include;..\libraries\STM32H7xx_HAL\CMSIS\Include;..\..\..\examples\utest\testcases\kernel @@ -348,12 +352,12 @@ 0 0 0 - 0 + 4 - - - - + + + + @@ -365,13 +369,13 @@ 0 0x08000000 0x20000000 - + .\board\linker_scripts\link.sct - - - - - + + + + + @@ -389,45 +393,35 @@ CPU + + backtrace.c + 1 + ..\..\..\libcpu\arm\common\backtrace.c + showmem.c 1 ..\..\..\libcpu\arm\common\showmem.c - - div0.c 1 ..\..\..\libcpu\arm\common\div0.c - - - backtrace.c - 1 - ..\..\..\libcpu\arm\common\backtrace.c - - - - - cpuport.c + cpu_cache.c 1 - ..\..\..\libcpu\arm\cortex-m7\cpuport.c + ..\..\..\libcpu\arm\cortex-m7\cpu_cache.c - - context_rvds.S 2 ..\..\..\libcpu\arm\cortex-m7\context_rvds.S - - - cpu_cache.c + cpuport.c 1 - ..\..\..\libcpu\arm\cortex-m7\cpu_cache.c + ..\..\..\libcpu\arm\cortex-m7\cpuport.c @@ -439,61 +433,45 @@ 1 ..\..\..\components\drivers\misc\pin.c - - serial.c 1 ..\..\..\components\drivers\serial\serial.c - - - completion.c + workqueue.c 1 - ..\..\..\components\drivers\src\completion.c + ..\..\..\components\drivers\src\workqueue.c - - - dataqueue.c + waitqueue.c 1 - ..\..\..\components\drivers\src\dataqueue.c + ..\..\..\components\drivers\src\waitqueue.c - - - ringbuffer.c + dataqueue.c 1 - ..\..\..\components\drivers\src\ringbuffer.c + ..\..\..\components\drivers\src\dataqueue.c - - - workqueue.c + ringblk_buf.c 1 - ..\..\..\components\drivers\src\workqueue.c + ..\..\..\components\drivers\src\ringblk_buf.c - - - waitqueue.c + ringbuffer.c 1 - ..\..\..\components\drivers\src\waitqueue.c + ..\..\..\components\drivers\src\ringbuffer.c - - pipe.c 1 ..\..\..\components\drivers\src\pipe.c - - - ringblk_buf.c + completion.c 1 - ..\..\..\components\drivers\src\ringblk_buf.c + ..\..\..\components\drivers\src\completion.c @@ -505,36 +483,26 @@ 1 board\CubeMX_Config\Core\Src\stm32h7xx_hal_msp.c - - startup_stm32h750xx.s 2 ..\libraries\STM32H7xx_HAL\CMSIS\Device\ST\STM32H7xx\Source\Templates\arm\startup_stm32h750xx.s - - board.c 1 board\board.c - - drv_gpio.c 1 ..\libraries\HAL_Drivers\drv_gpio.c - - drv_usart.c 1 ..\libraries\HAL_Drivers\drv_usart.c - - drv_common.c 1 @@ -550,15 +518,11 @@ 1 ..\..\..\components\finsh\shell.c - - msh.c 1 ..\..\..\components\finsh\msh.c - - cmd.c 1 @@ -570,93 +534,69 @@ Kernel - timer.c - 1 - ..\..\..\src\timer.c - - - - - device.c - 1 - ..\..\..\src\device.c - - - - - object.c - 1 - ..\..\..\src\object.c - - - - - ipc.c + clock.c 1 - ..\..\..\src\ipc.c + ..\..\..\src\clock.c - - mempool.c 1 ..\..\..\src\mempool.c - - - irq.c + device.c 1 - ..\..\..\src\irq.c + ..\..\..\src\device.c - - mem.c 1 ..\..\..\src\mem.c - - + + timer.c + 1 + ..\..\..\src\timer.c + components.c 1 ..\..\..\src\components.c - - thread.c 1 ..\..\..\src\thread.c - - + + irq.c + 1 + ..\..\..\src\irq.c + idle.c 1 ..\..\..\src\idle.c - - - scheduler.c + object.c 1 - ..\..\..\src\scheduler.c + ..\..\..\src\object.c - - kservice.c 1 ..\..\..\src\kservice.c - - - clock.c + scheduler.c 1 - ..\..\..\src\clock.c + ..\..\..\src\scheduler.c + + + ipc.c + 1 + ..\..\..\src\ipc.c @@ -678,148 +618,106 @@ 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc.c - - stm32h7xx_hal_pwr.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr.c - - stm32h7xx_hal_rcc_ex.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rcc_ex.c - - stm32h7xx_hal_sram.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_sram.c - - stm32h7xx_hal_cortex.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cortex.c - - stm32h7xx_hal_cryp_ex.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cryp_ex.c - - stm32h7xx_hal_dma_ex.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma_ex.c - - stm32h7xx_hal_cryp.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cryp.c - - stm32h7xx_hal_usart.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_usart.c - - stm32h7xx_hal_crc_ex.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_crc_ex.c - - stm32h7xx_hal_gpio.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_gpio.c - - stm32h7xx_hal_uart_ex.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart_ex.c - - stm32h7xx_hal_mdma.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_mdma.c - - stm32h7xx_hal.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal.c - - stm32h7xx_hal_dma.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_dma.c - - stm32h7xx_hal_uart.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_uart.c - - stm32h7xx_hal_comp.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_comp.c - - stm32h7xx_hal_rng.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_rng.c - - stm32h7xx_hal_crc.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_crc.c - - stm32h7xx_hal_cec.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_cec.c - - stm32h7xx_hal_pwr_ex.c 1 ..\libraries\STM32H7xx_HAL\STM32H7xx_HAL_Driver\Src\stm32h7xx_hal_pwr_ex.c - - system_stm32h7xx.c 1 @@ -830,9 +728,11 @@ + - - - + + + + diff --git a/bsp/stm32/stm32h750-artpi-h750/template.uvoptx b/bsp/stm32/stm32h750-artpi-h750/template.uvoptx index 790ef328e8..6ea03b6d88 100644 --- a/bsp/stm32/stm32h750-artpi-h750/template.uvoptx +++ b/bsp/stm32/stm32h750-artpi-h750/template.uvoptx @@ -125,7 +125,7 @@ 0 ST-LINKIII-KEIL_SWO - -U066BFF393732484257162540 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32H7x_128k -FS08000000 -FL020000 + -U066BFF393732484257162540 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(6BA02477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC4000 -FN1 -FF0ART-PI_W25Q64 -FS090000000 -FL0800000 -- cgit v1.3.1 From 8ba68a0617bf43090eb367c20653d565c0896f50 Mon Sep 17 00:00:00 2001 From: Puhan Zhou Date: Mon, 13 Dec 2021 21:07:07 +0800 Subject: fix doc error --- bsp/stm32/stm32f411-st-nucleo/README_zh.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'bsp') diff --git a/bsp/stm32/stm32f411-st-nucleo/README_zh.md b/bsp/stm32/stm32f411-st-nucleo/README_zh.md index ec84e51601..778cd90b09 100644 --- a/bsp/stm32/stm32f411-st-nucleo/README_zh.md +++ b/bsp/stm32/stm32f411-st-nucleo/README_zh.md @@ -22,7 +22,7 @@ 该开发板常用 ** 板载资源 ** 如下： -- MCU：STM32F407ZGT6，主频 100MHz，512KB FLASH ，128KB RAM。 +- MCU：STM32F411RET6，主频 100MHz，512KB FLASH ，128KB RAM。 - 常用外设 - LED：3 个，USB communication (LD1), user LED (LD2), power LED (LD3) 。 - 按键，2 个，USER and RESET 。 -- cgit v1.3.1 From 7455e2487bd420c06ba7198228b0dcca297f83cc Mon Sep 17 00:00:00 2001 From: 张世争 Date: Sun, 5 Dec 2021 09:07:23 +0800 Subject: [components] PM框架更新 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- bsp/stm32/stm32l475-atk-pandora/board/pm_cfg.h | 25 ++ components/drivers/Kconfig | 36 +++ components/drivers/include/drivers/lptimer.h | 38 +++ components/drivers/include/drivers/pm.h | 38 ++- components/drivers/pm/SConscript | 1 + components/drivers/pm/lptimer.c | 176 ++++++++++ components/drivers/pm/pm.c | 427 +++++++++++++++++++++++-- 7 files changed, 700 insertions(+), 41 deletions(-) create mode 100644 bsp/stm32/stm32l475-atk-pandora/board/pm_cfg.h create mode 100644 components/drivers/include/drivers/lptimer.h create mode 100644 components/drivers/pm/lptimer.c (limited to 'bsp') diff --git a/bsp/stm32/stm32l475-atk-pandora/board/pm_cfg.h b/bsp/stm32/stm32l475-atk-pandora/board/pm_cfg.h new file mode 100644 index 0000000000..bb4c3cf22d --- /dev/null +++ b/bsp/stm32/stm32l475-atk-pandora/board/pm_cfg.h @@ -0,0 +1,25 @@ +#ifndef __PM_CFG_H__ +#define __PM_CFG_H__ + +enum pm_module_id +{ + PM_NONE_ID = 0, + PM_POWER_ID, + PM_BOARD_ID, + PM_LCD_ID, + PM_KEY_ID, + PM_TP_ID, + PM_OTA_ID, + PM_SPI_ID, + PM_I2C_ID, + PM_ADC_ID, + PM_RTC_ID, + PM_GPIO_ID, + PM_UART_ID, + PM_SENSOR_ID, + PM_ALARM_ID, + PM_BLE_ID, + PM_MODULE_MAX_ID, /* enum must! */ +}; + +#endif diff --git a/components/drivers/Kconfig b/components/drivers/Kconfig index 8d340da3f5..d197bd246e 100755 --- a/components/drivers/Kconfig +++ b/components/drivers/Kconfig @@ -145,6 +145,42 @@ config RT_USING_PM bool "Using Power Management device drivers" default n + if RT_USING_PM + config PM_TICKLESS_THRESHOLD_TIME + int "PM tickless threashold time" + default 2 + + config PM_USING_CUSTOM_CONFIG + bool "PM using custom pm config" + default n + + config PM_ENABLE_DEBUG + bool "PM Enable Debug" + default n + + config PM_ENABLE_SUSPEND_SLEEP_MODE + bool "PM Device suspend change sleep mode" + default n + + config PM_ENABLE_THRESHOLD_SLEEP_MODE + bool "PM using threshold time change sleep mode" + default n + + if PM_ENABLE_THRESHOLD_SLEEP_MODE + config PM_LIGHT_THRESHOLD_TIME + int "PM light mode threashold time" + default 5 + + config PM_DEEP_THRESHOLD_TIME + int "PM deep mode threashold time" + default 20 + + config PM_STANDBY_THRESHOLD_TIME + int "PM standby mode threashold time" + default 100 + endif + endif + config RT_USING_RTC bool "Using RTC device drivers" default n diff --git a/components/drivers/include/drivers/lptimer.h b/components/drivers/include/drivers/lptimer.h new file mode 100644 index 0000000000..e59ce61d22 --- /dev/null +++ b/components/drivers/include/drivers/lptimer.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-11 zhangsz the first version + */ + +#ifndef __LPTIMER_H__ +#define __LPTIMER_H__ + +#include + +struct rt_lptimer +{ + struct rt_timer timer; + rt_list_t list; +}; +typedef struct rt_lptimer *rt_lptimer_t; + +void rt_lptimer_init(rt_lptimer_t timer, + const char *name, + void (*timeout)(void *parameter), + void *parameter, + rt_tick_t time, + rt_uint8_t flag); + +rt_err_t rt_lptimer_detach(rt_lptimer_t timer); +rt_err_t rt_lptimer_start(rt_lptimer_t timer); +rt_err_t rt_lptimer_stop(rt_lptimer_t timer); + +rt_err_t rt_lptimer_control(rt_lptimer_t timer, int cmd, void *arg); + +rt_tick_t rt_lptimer_next_timeout_tick(void); + +#endif diff --git a/components/drivers/include/drivers/pm.h b/components/drivers/include/drivers/pm.h index d38c0a4e2a..2deee83692 100644 --- a/components/drivers/include/drivers/pm.h +++ b/components/drivers/include/drivers/pm.h @@ -17,8 +17,7 @@ #include #include - -#ifndef PM_HAS_CUSTOM_CONFIG +#include /* All modes used for rt_pm_request() and rt_pm_release() */ enum @@ -48,10 +47,6 @@ enum RT_PM_FREQUENCY_PENDING = 0x01, }; -#define RT_PM_DEFAULT_SLEEP_MODE PM_SLEEP_MODE_NONE -#define RT_PM_DEFAULT_DEEPSLEEP_MODE PM_SLEEP_MODE_DEEP -#define RT_PM_DEFAULT_RUN_MODE PM_RUN_MODE_NORMAL_SPEED - /* The name of all modes used in the msh command "pm_dump" */ #define PM_SLEEP_MODE_NAMES \ { \ @@ -71,6 +66,7 @@ enum "Low Mode", \ } +#ifndef PM_USING_CUSTOM_CONFIG /** * Modules used for * pm_module_request(PM_BOARD_ID, PM_SLEEP_MODE_IDLE) @@ -98,11 +94,23 @@ enum pm_module_id { PM_MODULE_MAX_ID, /* enum must! */ }; -#else /* PM_HAS_CUSTOM_CONFIG */ +#else #include -#endif /* PM_HAS_CUSTOM_CONFIG */ +#endif /* PM_USING_CUSTOM_CONFIG */ + +#ifndef RT_PM_DEFAULT_SLEEP_MODE +#define RT_PM_DEFAULT_SLEEP_MODE PM_SLEEP_MODE_NONE +#endif + +#ifndef RT_PM_DEFAULT_DEEPSLEEP_MODE +#define RT_PM_DEFAULT_DEEPSLEEP_MODE PM_SLEEP_MODE_DEEP +#endif + +#ifndef RT_PM_DEFAULT_RUN_MODE +#define RT_PM_DEFAULT_RUN_MODE PM_RUN_MODE_NORMAL_SPEED +#endif /** * device control flag to request or release power @@ -160,6 +168,9 @@ struct rt_pm /* modules request status*/ struct rt_pm_module module_status[PM_MODULE_MAX_ID]; + /* sleep request table */ + rt_uint32_t sleep_status[PM_SLEEP_MODE_MAX - 1][(PM_MODULE_MAX_ID + 31) / 32]; + /* the list of device, which has PM feature */ rt_uint8_t device_pm_number; struct rt_device_pm *device_pm; @@ -203,5 +214,16 @@ void rt_pm_module_release_all(uint8_t module_id, rt_uint8_t sleep_mode); void rt_pm_module_delay_sleep(rt_uint8_t module_id, rt_tick_t timeout); rt_uint32_t rt_pm_module_get_status(void); rt_uint8_t rt_pm_get_sleep_mode(void); +struct rt_pm *rt_pm_get_handle(void); + +/* sleep : request or release */ +void rt_pm_sleep_request(rt_uint16_t module_id, rt_uint8_t mode); +void rt_pm_sleep_release(rt_uint16_t module_id, rt_uint8_t mode); +void rt_pm_sleep_none_request(rt_uint16_t module_id); +void rt_pm_sleep_none_release(rt_uint16_t module_id); +void rt_pm_sleep_idle_request(rt_uint16_t module_id); +void rt_pm_sleep_idle_release(rt_uint16_t module_id); +void rt_pm_sleep_light_request(rt_uint16_t module_id); +void rt_pm_sleep_light_release(rt_uint16_t module_id); #endif /* __PM_H__ */ diff --git a/components/drivers/pm/SConscript b/components/drivers/pm/SConscript index a94fc11f57..fd23e8293c 100644 --- a/components/drivers/pm/SConscript +++ b/components/drivers/pm/SConscript @@ -7,6 +7,7 @@ group = [] if GetDepend(['RT_USING_PM']): src = src + ['pm.c'] + src = src + ['lptimer.c'] if len(src): group = DefineGroup('DeviceDrivers', src, depend = [''], CPPPATH = CPPPATH) diff --git a/components/drivers/pm/lptimer.c b/components/drivers/pm/lptimer.c new file mode 100644 index 0000000000..144270cf7f --- /dev/null +++ b/components/drivers/pm/lptimer.c @@ -0,0 +1,176 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-10-11 zhangsz the first version + */ + +#include +#include +#include + +static rt_list_t rt_soft_lptimer_list = RT_LIST_OBJECT_INIT(rt_soft_lptimer_list); + +/* lptimer init */ +void rt_lptimer_init(rt_lptimer_t timer, + const char *name, + void (*timeout)(void *parameter), + void *parameter, + rt_tick_t time, + rt_uint8_t flag) +{ + rt_timer_init(&timer->timer, name, timeout, parameter, time, flag); + rt_list_init(&timer->list); +} + +/* lptimer detach */ +rt_err_t rt_lptimer_detach(rt_lptimer_t timer) +{ + rt_base_t level; + rt_err_t ret = RT_EOK; + RT_ASSERT(timer != RT_NULL); + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + ret = rt_timer_detach(&timer->timer); + rt_list_remove(&timer->list); + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + return ret; +} + +/* lptimer start */ +rt_err_t rt_lptimer_start(rt_lptimer_t timer) +{ + rt_base_t level; + + RT_ASSERT(timer != RT_NULL); + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + rt_list_remove(&timer->list); /* remove first */ + if (rt_timer_start(&timer->timer) == RT_EOK) + { + /* insert to lptimer list */ + rt_list_insert_after(&rt_soft_lptimer_list, &(timer->list)); + } + else + { + /* enable interrupt */ + rt_hw_interrupt_enable(level); + return -RT_ERROR; + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + return RT_EOK; +} + +/* lptimer stop */ +rt_err_t rt_lptimer_stop(rt_lptimer_t timer) +{ + rt_base_t level; + RT_ASSERT(timer != RT_NULL); + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + rt_list_remove(&timer->list); + if (rt_timer_stop(&timer->timer) == RT_EOK) + { + /* enable interrupt */ + rt_hw_interrupt_enable(level); + return RT_EOK; + } + else + { + /* enable interrupt */ + rt_hw_interrupt_enable(level); + return -RT_ERROR; + } +} + +rt_err_t rt_lptimer_control(rt_lptimer_t timer, int cmd, void *arg) +{ + RT_ASSERT(timer != RT_NULL); + + return rt_timer_control(&timer->timer, cmd, arg); +} + +/* get the next soft lptimer timeout */ +rt_tick_t rt_lptimer_next_timeout_tick(void) +{ + struct rt_lptimer *timer; + rt_base_t level; + rt_tick_t timeout_tick = RT_TICK_MAX; + struct rt_list_node *node = RT_NULL; + rt_tick_t temp_tick = 0; + rt_tick_t min_tick = RT_TICK_MAX; + rt_tick_t cur_tick = rt_tick_get(); + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + if (!rt_list_isempty(&rt_soft_lptimer_list)) + { + /* find the first active timer's timeout */ + rt_list_for_each(node, &rt_soft_lptimer_list) + { + timer = rt_list_entry(node, struct rt_lptimer, list); + if (timer->timer.parent.flag & RT_TIMER_FLAG_ACTIVATED) + { + temp_tick = timer->timer.timeout_tick - cur_tick; + + /* find the least timeout_tick */ + if (min_tick > temp_tick) + { + min_tick = temp_tick; + timeout_tick = timer->timer.timeout_tick; + } + } + } + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + + return timeout_tick; +} + +void lptimer_dump(void) +{ + struct rt_lptimer *timer; + rt_base_t level; + struct rt_list_node *node = RT_NULL; + + /* disable interrupt */ + level = rt_hw_interrupt_disable(); + + rt_kprintf("| lptimer | periodic | timeout | flag |\n"); + rt_kprintf("+---------------+------------+------------+-------------+\n"); + + if (!rt_list_isempty(&rt_soft_lptimer_list)) + { + rt_list_for_each(node, &rt_soft_lptimer_list) + { + timer = rt_list_entry(node, struct rt_lptimer, list); + rt_kprintf("| %-13s | 0x%08x | 0x%08x |", + timer->timer.parent.name, timer->timer.init_tick, + timer->timer.timeout_tick); + if (timer->timer.parent.flag & RT_TIMER_FLAG_ACTIVATED) + rt_kprintf(" activated |\n"); + else + rt_kprintf(" deactivated |\n"); + } + } + + /* enable interrupt */ + rt_hw_interrupt_enable(level); + rt_kprintf("+---------------+------------+------------+-------------+\n"); +} + +MSH_CMD_EXPORT(lptimer_dump, soft lptimer dump); diff --git a/components/drivers/pm/pm.c b/components/drivers/pm/pm.c index cf488a9ce1..b3ebbeb078 100644 --- a/components/drivers/pm/pm.c +++ b/components/drivers/pm/pm.c @@ -15,9 +15,44 @@ #include #include #include +#include #ifdef RT_USING_PM +/* tickless threshold time */ +#ifndef PM_TICKLESS_THRESHOLD_TIME +#define PM_TICKLESS_THRESHOLD_TIME 2 +#endif + +/* tickless threshold : sleep mode */ +#ifndef PM_TICKLESS_THRESHOLD_MODE +#define PM_TICKLESS_THRESHOLD_MODE PM_SLEEP_MODE_IDLE +#endif + +/* busy : sleep mode */ +#ifndef PM_BUSY_SLEEP_MODE +#define PM_BUSY_SLEEP_MODE PM_SLEEP_MODE_IDLE +#endif + +/* suspend : suspend sleep mode */ +#ifndef PM_SUSPEND_SLEEP_MODE +#define PM_SUSPEND_SLEEP_MODE PM_SLEEP_MODE_IDLE +#endif + +#ifdef PM_ENABLE_THRESHOLD_SLEEP_MODE +#ifndef PM_LIGHT_THRESHOLD_TIME +#define PM_LIGHT_THRESHOLD_TIME 5 +#endif + +#ifndef PM_DEEP_THRESHOLD_TIME +#define PM_DEEP_THRESHOLD_TIME 20 +#endif + +#ifndef PM_STANDBY_THRESHOLD_TIME +#define PM_STANDBY_THRESHOLD_TIME 100 +#endif +#endif + static struct rt_pm _pm; /* default mode : system power on */ @@ -29,8 +64,6 @@ static rt_uint8_t _pm_default_deepsleep = RT_PM_DEFAULT_DEEPSLEEP_MODE; static struct rt_pm_notify _pm_notify; static rt_uint8_t _pm_init_flag = 0; -#define RT_PM_TICKLESS_THRESH (2) - RT_WEAK rt_uint32_t rt_pm_enter_critical(rt_uint8_t sleep_mode) { return rt_hw_interrupt_disable(); @@ -41,6 +74,48 @@ RT_WEAK void rt_pm_exit_critical(rt_uint32_t ctx, rt_uint8_t sleep_mode) rt_hw_interrupt_enable(ctx); } +/* lptimer start */ +static void pm_lptimer_start(struct rt_pm *pm, uint32_t timeout) +{ + if (_pm.ops == RT_NULL) + return; + + if (_pm.ops->timer_start != RT_NULL) + _pm.ops->timer_start(pm, timeout); +} + +/* lptimer stop */ +static void pm_lptimer_stop(struct rt_pm *pm) +{ + if (_pm.ops == RT_NULL) + return; + + if (_pm.ops->timer_stop != RT_NULL) + _pm.ops->timer_stop(pm); +} + +/* lptimer get timeout tick */ +static rt_tick_t pm_lptimer_get_timeout(struct rt_pm *pm) +{ + if (_pm.ops == RT_NULL) + return RT_TICK_MAX; + + if (_pm.ops->timer_get_tick != RT_NULL) + return _pm.ops->timer_get_tick(pm); + + return RT_TICK_MAX; +} + +/* enter sleep mode */ +static void pm_sleep(struct rt_pm *pm, uint8_t sleep_mode) +{ + if (_pm.ops == RT_NULL) + return; + + if (_pm.ops->sleep != RT_NULL) + _pm.ops->sleep(pm, sleep_mode); +} + /** * This function will suspend all registered devices */ @@ -111,6 +186,30 @@ static void _pm_frequency_scaling(struct rt_pm *pm) } } +/** + * judge sleep mode from sleep request + * + * @param none + * + * @return sleep mode + */ +static rt_uint8_t _judge_sleep_mode(void) +{ + rt_uint16_t index; + rt_uint16_t len; + + for (index = 0; index < PM_SLEEP_MODE_MAX -1; index++) + { + for (len = 0; len < ((PM_MODULE_MAX_ID + 31) / 32); len++) + { + if (_pm.sleep_status[index][len] != 0x00) + return index; + } + } + + return PM_SLEEP_MODE_MAX; /* default sleep mode */ +} + /** * This function selects the sleep mode according to the rt_pm_request/rt_pm_release count. */ @@ -120,6 +219,7 @@ static rt_uint8_t _pm_select_sleep_mode(struct rt_pm *pm) rt_uint8_t mode; mode = _pm_default_deepsleep; + rt_uint8_t request_mode = _judge_sleep_mode(); for (index = PM_SLEEP_MODE_NONE; index < PM_SLEEP_MODE_MAX; index ++) { if (pm->modes[index]) @@ -128,7 +228,10 @@ static rt_uint8_t _pm_select_sleep_mode(struct rt_pm *pm) break; } } - pm->sleep_mode = mode; + + /* select the high power mode */ + if (request_mode < mode) + mode = request_mode; return mode; } @@ -185,6 +288,72 @@ static rt_bool_t _pm_device_check_idle(void) return RT_TRUE; } +RT_WEAK rt_tick_t pm_timer_next_timeout_tick(rt_uint8_t mode) +{ + switch (mode) + { + case PM_SLEEP_MODE_LIGHT: + return rt_timer_next_timeout_tick(); + case PM_SLEEP_MODE_DEEP: + case PM_SLEEP_MODE_STANDBY: + return rt_lptimer_next_timeout_tick(); + } + + return RT_TICK_MAX; +} + +/** + * This function will judge sleep mode from threshold timeout. + * + * @param cur_mode the current pm sleep mode + * @param timeout_tick the threshold timeout + * + * @return none + */ +RT_WEAK rt_uint8_t pm_get_sleep_threshold_mode(rt_uint8_t cur_mode, rt_tick_t timeout_tick) +{ + rt_uint8_t sleep_mode = cur_mode; + + if (_pm_init_flag == 0) + return sleep_mode; + + if (cur_mode >= PM_SLEEP_MODE_MAX) + return sleep_mode; + +#ifdef PM_ENABLE_THRESHOLD_SLEEP_MODE + switch (cur_mode) + { + case PM_SLEEP_MODE_NONE: + case PM_SLEEP_MODE_IDLE: + break; + case PM_SLEEP_MODE_LIGHT: + if (timeout_tick < PM_LIGHT_THRESHOLD_TIME) + sleep_mode = PM_SLEEP_MODE_IDLE; + break; + case PM_SLEEP_MODE_DEEP: + if (timeout_tick < PM_LIGHT_THRESHOLD_TIME) + sleep_mode = PM_SLEEP_MODE_IDLE; + else if (timeout_tick < PM_DEEP_THRESHOLD_TIME) + sleep_mode = PM_SLEEP_MODE_LIGHT; + break; + case PM_SLEEP_MODE_STANDBY: + if (timeout_tick < PM_LIGHT_THRESHOLD_TIME) + sleep_mode = PM_SLEEP_MODE_IDLE; + else if (timeout_tick < PM_DEEP_THRESHOLD_TIME) + sleep_mode = PM_SLEEP_MODE_LIGHT; + else if (timeout_tick < PM_STANDBY_THRESHOLD_TIME) + sleep_mode = PM_SLEEP_MODE_DEEP; + } +#else + if (timeout_tick < PM_TICKLESS_THRESHOLD_TIME) + { + cur_mode = PM_SLEEP_MODE_IDLE; + } +#endif + + return cur_mode; +} + /** * This function changes the power sleep mode base on the result of selection */ @@ -192,16 +361,21 @@ static void _pm_change_sleep_mode(struct rt_pm *pm) { rt_tick_t timeout_tick, delta_tick; rt_base_t level; - int ret = RT_EOK; + uint8_t sleep_mode = PM_SLEEP_MODE_DEEP; level = rt_pm_enter_critical(pm->sleep_mode); - /* module busy request */ + /* judge sleep mode from module request */ + pm->sleep_mode = _pm_select_sleep_mode(pm); + + /* module busy request check */ if (_pm_device_check_idle() == RT_FALSE) { - pm->ops->sleep(pm, PM_SLEEP_MODE_NONE); - rt_pm_exit_critical(level, pm->sleep_mode); - return; + sleep_mode = PM_BUSY_SLEEP_MODE; + if (sleep_mode < pm->sleep_mode) + { + pm->sleep_mode = sleep_mode; /* judge the highest sleep mode */ + } } if (_pm.sleep_mode == PM_SLEEP_MODE_NONE) @@ -216,50 +390,54 @@ static void _pm_change_sleep_mode(struct rt_pm *pm) _pm_notify.notify(RT_PM_ENTER_SLEEP, pm->sleep_mode, _pm_notify.data); /* Suspend all peripheral device */ - ret = _pm_device_suspend(pm->sleep_mode); +#ifdef PM_ENABLE_SUSPEND_SLEEP_MODE + int ret = _pm_device_suspend(pm->sleep_mode); if (ret != RT_EOK) { _pm_device_resume(pm->sleep_mode); if (_pm_notify.notify) _pm_notify.notify(RT_PM_EXIT_SLEEP, pm->sleep_mode, _pm_notify.data); + if (pm->sleep_mode > PM_SUSPEND_SLEEP_MODE) + { + pm->sleep_mode = PM_SUSPEND_SLEEP_MODE; + } + pm->ops->sleep(pm, pm->sleep_mode); /* suspend failed */ rt_pm_exit_critical(level, pm->sleep_mode); - return; } - +#else + _pm_device_suspend(pm->sleep_mode); +#endif /* Tickless*/ if (pm->timer_mask & (0x01 << pm->sleep_mode)) { - timeout_tick = rt_timer_next_timeout_tick(); - if (timeout_tick == RT_TICK_MAX) - { - if (pm->ops->timer_start) - { - pm->ops->timer_start(pm, RT_TICK_MAX); - } - } - else + timeout_tick = pm_timer_next_timeout_tick(pm->sleep_mode); + timeout_tick = timeout_tick - rt_tick_get(); + + /* Judge sleep_mode from threshold time */ + pm->sleep_mode = pm_get_sleep_threshold_mode(pm->sleep_mode, timeout_tick); + + if (pm->timer_mask & (0x01 << pm->sleep_mode)) { - timeout_tick = timeout_tick - rt_tick_get(); - if (timeout_tick < RT_PM_TICKLESS_THRESH) + if (timeout_tick == RT_TICK_MAX) { - pm->sleep_mode = PM_SLEEP_MODE_IDLE; + pm_lptimer_start(pm, RT_TICK_MAX); } else { - pm->ops->timer_start(pm, timeout_tick); + pm_lptimer_start(pm, timeout_tick); } } } /* enter lower power state */ - pm->ops->sleep(pm, pm->sleep_mode); + pm_sleep(pm, pm->sleep_mode); /* wake up from lower power state*/ if (pm->timer_mask & (0x01 << pm->sleep_mode)) { - delta_tick = pm->ops->timer_get_tick(pm); - pm->ops->timer_stop(pm); + delta_tick = pm_lptimer_get_timeout(pm); + pm_lptimer_stop(pm); if (delta_tick) { rt_tick_set(rt_tick_get() + delta_tick); @@ -320,7 +498,6 @@ void rt_pm_request(rt_uint8_t mode) pm = &_pm; if (pm->modes[mode] < 255) pm->modes[mode] ++; - _pm_select_sleep_mode(pm); rt_hw_interrupt_enable(level); } @@ -346,7 +523,6 @@ void rt_pm_release(rt_uint8_t mode) pm = &_pm; if (pm->modes[mode] > 0) pm->modes[mode] --; - _pm_select_sleep_mode(pm); rt_hw_interrupt_enable(level); } @@ -371,7 +547,6 @@ void rt_pm_release_all(rt_uint8_t mode) level = rt_hw_interrupt_disable(); pm = &_pm; pm->modes[mode] = 0; - _pm_select_sleep_mode(pm); rt_hw_interrupt_enable(level); } @@ -401,7 +576,6 @@ void rt_pm_module_request(uint8_t module_id, rt_uint8_t mode) pm->module_status[module_id].req_status = 0x01; if (pm->modes[mode] < 255) pm->modes[mode] ++; - _pm_select_sleep_mode(pm); rt_hw_interrupt_enable(level); } @@ -433,7 +607,6 @@ void rt_pm_module_release(uint8_t module_id, rt_uint8_t mode) pm->modes[mode] --; if (pm->modes[mode] == 0) pm->module_status[module_id].req_status = 0x00; - _pm_select_sleep_mode(pm); rt_hw_interrupt_enable(level); } @@ -460,10 +633,135 @@ void rt_pm_module_release_all(uint8_t module_id, rt_uint8_t mode) pm = &_pm; pm->modes[mode] = 0; pm->module_status[module_id].req_status = 0x00; - _pm_select_sleep_mode(pm); rt_hw_interrupt_enable(level); } +/** + * This function will let current module work with specified sleep mode. + * + * @param module_id the pm module id + * @param mode the pm sleep mode + * + * @return none + */ +void rt_pm_sleep_request(rt_uint16_t module_id, rt_uint8_t mode) +{ + rt_uint32_t level; + + if (module_id >= PM_MODULE_MAX_ID) + { + return; + } + + if (mode >= (PM_SLEEP_MODE_MAX - 1)) + { + return; + } + + level = rt_hw_interrupt_disable(); + _pm.sleep_status[mode][module_id / 32] |= 1 << (module_id % 32); + rt_hw_interrupt_enable(level); +} + +/** + * This function will let current module work with PM_SLEEP_MODE_NONE mode. + * + * @param module_id the pm module id + * + * @return NULL + */ +void rt_pm_sleep_none_request(rt_uint16_t module_id) +{ + rt_pm_sleep_request(module_id, PM_SLEEP_MODE_NONE); +} + +/** + * This function will let current module work with PM_SLEEP_MODE_IDLE mode. + * + * @param module_id the pm module id + * + * @return NULL + */ +void rt_pm_sleep_idle_request(rt_uint16_t module_id) +{ + rt_pm_sleep_request(module_id, PM_SLEEP_MODE_IDLE); +} + +/** + * This function will let current module work with PM_SLEEP_MODE_LIGHT mode. + * + * @param module_id the pm module id + * + * @return NULL + */ +void rt_pm_sleep_light_request(rt_uint16_t module_id) +{ + rt_pm_sleep_request(module_id, PM_SLEEP_MODE_LIGHT); +} + +/** + * When current module don't work, release requested sleep mode. + * + * @param module_id the pm module id + * @param mode the pm sleep mode + * + * @return NULL + */ +void rt_pm_sleep_release(rt_uint16_t module_id, rt_uint8_t mode) +{ + rt_uint32_t level; + + if (module_id >= PM_MODULE_MAX_ID) + { + return; + } + + if (mode >= (PM_SLEEP_MODE_MAX - 1)) + { + return; + } + + level = rt_hw_interrupt_disable(); + _pm.sleep_status[mode][module_id / 32] &= ~(1 << (module_id % 32)); + rt_hw_interrupt_enable(level); +} + +/** + * The specified module release the requested PM_SLEEP_MODE_NONE mode + * + * @param module_id the pm module id + * + * @return none + */ +void rt_pm_sleep_none_release(rt_uint16_t module_id) +{ + rt_pm_sleep_release(module_id, PM_SLEEP_MODE_NONE); +} + +/** + * The specified module release the requested PM_SLEEP_MODE_IDLE mode + * + * @param module_id the pm module id + * + * @return none + */ +void rt_pm_sleep_idle_release(rt_uint16_t module_id) +{ + rt_pm_sleep_release(module_id, PM_SLEEP_MODE_IDLE); +} + +/** + * The specified module release the requested PM_SLEEP_MODE_LIGHT mode + * + * @param module_id the pm module id + * + * @return none + */ +void rt_pm_sleep_light_release(rt_uint16_t module_id) +{ + rt_pm_sleep_release(module_id, PM_SLEEP_MODE_LIGHT); +} + /** * Register a device with PM feature * @@ -853,6 +1151,69 @@ rt_uint8_t rt_pm_get_sleep_mode(void) return pm->sleep_mode; } +/* get pm entity pointer */ +struct rt_pm *rt_pm_get_handle(void) +{ + return &_pm; +} + +#ifdef PM_ENABLE_DEBUG +/** + * print current module sleep request list + * + * @param none + * + * @return none + */ +void pm_sleep_dump(void) +{ + uint8_t index; + uint16_t len; + + rt_kprintf("+-------------+--------------+\n"); + rt_kprintf("| Sleep Mode | Request List |\n"); + rt_kprintf("+-------------+--------------+\n"); + for (index = 0; index < PM_SLEEP_MODE_MAX -1; index++) + { + for (len = 0; len < ((PM_MODULE_MAX_ID + 31) / 32); len++) + { + rt_kprintf("| Mode[%d] : %d | 0x%08x |\n", index, len, + _pm.sleep_status[index][len]); + } + } + rt_kprintf("+-------------+--------------+\n"); +} +MSH_CMD_EXPORT(pm_sleep_dump, dump pm request list); + +static void pm_sleep_request(int argc, char **argv) +{ + int module = 0; + int mode = 0; + + if (argc >= 3) + { + module = atoi(argv[1]); + mode = atoi(argv[2]); + rt_pm_sleep_request(module, mode); + } +} +MSH_CMD_EXPORT(pm_sleep_request, pm_sleep_request module sleep_mode); + +static void pm_sleep_release(int argc, char **argv) +{ + int module = 0; + int mode = 0; + + if (argc >= 3) + { + module = atoi(argv[1]); + mode = atoi(argv[2]); + rt_pm_sleep_release(module, mode); + } +} +MSH_CMD_EXPORT(pm_sleep_release, pm_sleep_release module sleep_mode); +#endif + static void rt_pm_dump_status(void) { rt_uint32_t index; -- cgit v1.3.1 From 7f9546ada0601fdd46b8bfb2624ad386a4e9db00 Mon Sep 17 00:00:00 2001 From: Meco Man <920369182@qq.com> Date: Mon, 13 Dec 2021 19:53:12 -0500 Subject: [l475][arduino] 增加ADC PWM管脚定义 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../board/ports/arduino/SConscript | 2 +- .../board/ports/arduino/arduino_layout.c | 47 --------------------- .../board/ports/arduino/arduino_layout.h | 29 ------------- .../board/ports/arduino/arduino_pinout.c | 48 ++++++++++++++++++++++ .../board/ports/arduino/arduino_pinout.h | 28 +++++++++++++ 5 files changed, 77 insertions(+), 77 deletions(-) delete mode 100644 bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.c delete mode 100644 bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.h create mode 100644 bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_pinout.c create mode 100644 bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_pinout.h (limited to 'bsp') diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/SConscript b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/SConscript index 69deb86a15..2c5b27d9d2 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/SConscript +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/SConscript @@ -1,7 +1,7 @@ from building import * cwd = GetCurrentDir() -src = ['arduino_layout.c'] +src = ['arduino_pinout.c'] inc = [cwd] group = DefineGroup('Arduino', src, depend = ['RT_USING_ARDUINO'], CPPPATH = inc) diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.c b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.c deleted file mode 100644 index dce9988127..0000000000 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.c +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-12-10 Meco Man first version - */ -#include -#include - -const pin_map_t pin_map_table[ARDUINO_LAYOUT_PIN_MAX]= -{ - /* - {Arduino Pin, RT-Thread Pin [, Device Name(PWM or ADC), Channel]} - [] means optional - Digital pins must NOT give the device name and channel. - Analog pins MUST give the device name and channel(ADC or PWM). - */ - {0}, /* D0, RX */ - {1}, /* D1, TX */ - {2, GET_PIN(D,10)}, /* D2, BSP:KEY0 */ - {3}, /* D3, PWM */ - {4, GET_PIN(D,9)}, /* D4, BSP:KEY1 */ - {5, GET_PIN(D,8)}, /* D5, BSP:KEY2 */ - {6}, /* D6, PWM */ - {7}, /* D7 */ - {8, GET_PIN(E,7)}, /* D8, BSP: RED-LED */ - {9}, /* D9, PWM */ - {10, GET_PIN(E,9), "pwm1", 1}, /* D10, PWM, BSP: BLUE-LED */ - {11, GET_PIN(B,8), "pwm4", 3}, /* D11, PWM */ - {12, GET_PIN(B,2)}, /* D12, BSP: BEEP */ - {13, GET_PIN(E,8)}, /* D13, LED_BUILTIN, BSP: GREEN-LED */ - {14, GET_PIN(C,2), "adc1", 3}, /* D14, A0 */ - {15}, /* D15, A1 */ - {16}, /* D16, A2 */ - {17}, /* D17, A3 */ - {18}, /* D18, A4 */ - {19} /* D19, A5 */ -}; - -/* initialization for BSP; maybe a blank function */ -void initVariant(void) -{ - /* Nothing needs to initialize for this BSP */ -} diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.h b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.h deleted file mode 100644 index f5a1b8f958..0000000000 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_layout.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-12-10 Meco Man first version - */ -#ifndef __UNO_LAYOUT_H__ -#define __UNO_LAYOUT_H__ - -#include - -#define LED_BUILTIN 13 /* Built-in LED */ - -#define ARDUINO_PWM_HZ 500 /* Arduino UNO's PWM is around 500Hz */ -#define ARDUINO_LAYOUT_PIN_MAX 20 - -#define A0 (14) -#define A1 (15) -#define A2 (16) -#define A3 (17) -#define A4 (18) -#define A5 (19) -#define A6 (20) -#define A7 (21) - -#endif diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_pinout.c b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_pinout.c new file mode 100644 index 0000000000..bf9eb45c84 --- /dev/null +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_pinout.c @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-10 Meco Man first version + */ +#include +#include +#include "arduino_pinout.h" + +const pin_map_t pin_map_table[ARDUINO_PINOUT_PIN_MAX]= +{ + /* + {Arduino Pin, RT-Thread Pin [, Device Name(PWM or ADC), Channel]} + [] means optional + Digital pins must NOT give the device name and channel. + Analog pins MUST give the device name and channel(ADC or PWM). + */ + {0}, /* D0, RX */ + {1}, /* D1, TX */ + {2, GET_PIN(D,10)}, /* D2, BSP:KEY0 */ + {3}, /* D3, PWM */ + {4, GET_PIN(D,9)}, /* D4, BSP:KEY1 */ + {5, GET_PIN(D,8)}, /* D5, BSP:KEY2 */ + {6}, /* D6, PWM */ + {7}, /* D7 */ + {8, GET_PIN(E,7)}, /* D8, BSP: RED-LED */ + {9}, /* D9, PWM */ + {10, GET_PIN(E,9), "pwm1", 1}, /* D10, PWM, BSP: BLUE-LED */ + {11, GET_PIN(B,8), "pwm4", 3}, /* D11, PWM */ + {12, GET_PIN(B,2)}, /* D12, BSP: BEEP */ + {13, GET_PIN(E,8)}, /* D13, LED_BUILTIN, BSP: GREEN-LED */ + {14, GET_PIN(C,2), "adc1", 3}, /* D14, A0 */ + {15}, /* D15, A1 */ + {16}, /* D16, A2 */ + {17}, /* D17, A3 */ + {18}, /* D18, A4 */ + {19} /* D19, A5 */ +}; + +/* initialization for BSP; maybe a blank function */ +void initVariant(void) +{ + /* Nothing needs to initialize for this BSP */ +} diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_pinout.h b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_pinout.h new file mode 100644 index 0000000000..e3b7b8a47a --- /dev/null +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/arduino/arduino_pinout.h @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2006-2021, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-12-10 Meco Man first version + */ +#ifndef __UNO_PINOUT_H__ +#define __UNO_PINOUT_H__ + +#define LED_BUILTIN 13 /* Built-in LED */ + +#define ARDUINO_PWM_HZ 500 /* Arduino UNO's PWM is around 500Hz */ + +#define ARDUINO_PINOUT_PIN_MAX 20 /* Arduino UNO has 20 pins in total*/ +#define ARDUINO_PINOUT_ADC_MAX 6 /* Arduino UNO has 5 ADC pins */ +#define ARDUINO_PINOUT_PWM_MAX 5 /* Arduino UNO has 5 PWM pins */ + +#define A0 (14) +#define A1 (15) +#define A2 (16) +#define A3 (17) +#define A4 (18) +#define A5 (19) + +#endif /* __UNO_PINOUT_H__ */ -- cgit v1.3.1