From e7a40ae6ec1fdcb0d74a4902cfbd50aee7ee8e8f Mon Sep 17 00:00:00 2001 From: Yulong Wang <2302147681@qq.com> Date: Sat, 12 Jul 2025 13:10:48 +0000 Subject: [lwp][rv64] restore tp register in arch_thread_signal_enter to fix user-mode memory access --- components/lwp/arch/risc-v/rv64/lwp_gcc.S | 3 +++ 1 file changed, 3 insertions(+) (limited to 'components') diff --git a/components/lwp/arch/risc-v/rv64/lwp_gcc.S b/components/lwp/arch/risc-v/rv64/lwp_gcc.S index c207285c6f..9290923191 100644 --- a/components/lwp/arch/risc-v/rv64/lwp_gcc.S +++ b/components/lwp/arch/risc-v/rv64/lwp_gcc.S @@ -178,6 +178,9 @@ arch_thread_signal_enter: /* restore user GP */ LOAD gp, FRAME_OFF_GP(s3) + /* restore user TP */ + LOAD tp, FRAME_OFF_TP(s3) + /** * handler(signo, psi, ucontext); */ -- cgit v1.3.1