From 8fa9fde43a2e9cb978b52c0eb536fe2bafcc6e73 Mon Sep 17 00:00:00 2001 From: Yunjie Gu Date: Thu, 20 Oct 2022 04:41:13 +0100 Subject: [bsp][c28x] add support to not disable global interrupt in context-switch to enable zero-latency isr for critical interrupts. --- include/rtdef.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/rtdef.h b/include/rtdef.h index 89ac9edf6e..4a13c554a5 100644 --- a/include/rtdef.h +++ b/include/rtdef.h @@ -210,10 +210,18 @@ typedef __gnuc_va_list va_list; * GCC and MDK) compilers. See ARM Optimizing C/C++ Compiler 5.9.3 for more * details. */ #define RT_SECTION(x) __attribute__((section(x))) +#ifdef __TI_EABI__ +#define RT_USED __attribute__((retain)) __attribute__((used)) +#else #define RT_USED __attribute__((used)) +#endif #define PRAGMA(x) _Pragma(#x) #define ALIGN(n) __attribute__((aligned(n))) +#ifdef __TI_EABI__ #define RT_WEAK __attribute__((weak)) +#else +#define RT_WEAK +#endif #define rt_inline static inline #define RTT_API #elif defined (__TASKING__) -- cgit v1.3.1