From c802fcdcf821590f193608dda2233aecb722d2d6 Mon Sep 17 00:00:00 2001
From: emuzit <98307908+emuzit@users.noreply.github.com>
Date: Sat, 30 Jul 2022 14:10:51 +0800
Subject: WCH CH569W-R0-1v0 evt board bsp port, first version (#6167)

WCH CH569W-R0-1v0 evt board bsp port, first version

dev/test under Ubuntu 20.04
toolchain from MounRiver_Studio_Community_Linux_x64_V120

tested drivers : SysTick, gpio, gpio interrupt, uart1 (RX interrupt, TX polling)

libcpu/risc-v/SConscript :
group includes rtconfig.CPU only if folder exists

libcpu/risc-v/common/cpuport.c/rt_hw_context_switch_interrupt() :
make it RT_WEAK for customization
---
 libcpu/risc-v/SConscript | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'libcpu/risc-v/SConscript')

diff --git a/libcpu/risc-v/SConscript b/libcpu/risc-v/SConscript
index ffb2e7ae17..7e6b9947a3 100644
--- a/libcpu/risc-v/SConscript
+++ b/libcpu/risc-v/SConscript
@@ -24,7 +24,7 @@ else :
 # cpu porting code files
 if  rtconfig.CPU == "e9xx" :
     group = group + SConscript(os.path.join(rtconfig.VENDOR, rtconfig.CPU, 'SConscript'))
-else :
+elif rtconfig.CPU in list:
     group = group + SConscript(os.path.join(rtconfig.CPU, 'SConscript'))
 
 Return('group')
-- 
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