From 5889db68191a563bc0d8d2439a0e38e6bf9b4ecc Mon Sep 17 00:00:00 2001 From: Yaochenger <1516081466@qq.com> Date: Thu, 29 May 2025 11:30:04 +0800 Subject: [libcpu/common] 修正对RV32E的支持,RV32E不支持s2寄存器,修改为s1寄存器 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- libcpu/risc-v/common/interrupt_gcc.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'libcpu') diff --git a/libcpu/risc-v/common/interrupt_gcc.S b/libcpu/risc-v/common/interrupt_gcc.S index fc916dd821..6eb0ef371f 100644 --- a/libcpu/risc-v/common/interrupt_gcc.S +++ b/libcpu/risc-v/common/interrupt_gcc.S @@ -337,8 +337,8 @@ trap_entry: /* need to switch new thread */ la s0, rt_thread_switch_interrupt_flag - lw s2, 0(s0) - beqz s2, spurious_interrupt + lw s1, 0(s0) + beqz s1, spurious_interrupt sw zero, 0(s0) la s0, rt_interrupt_from_thread -- cgit v1.3.1