From 83e95bdff4c48c661b50e1eec56d5fd293b28fbb Mon Sep 17 00:00:00 2001 From: Shell Date: Thu, 28 Mar 2024 23:42:56 +0800 Subject: sync smart & dfs (#8672) Signed-off-by: xqyjlj Signed-off-by: Shell Co-authored-by: xqyjlj --- libcpu/aarch64/common/backtrace.c | 2 +- libcpu/aarch64/common/mmu.c | 2 +- libcpu/arm/cortex-a/pmu.c | 1 + 3 files changed, 3 insertions(+), 2 deletions(-) (limited to 'libcpu') diff --git a/libcpu/aarch64/common/backtrace.c b/libcpu/aarch64/common/backtrace.c index 440d02d6fb..0365ec71e4 100644 --- a/libcpu/aarch64/common/backtrace.c +++ b/libcpu/aarch64/common/backtrace.c @@ -85,7 +85,7 @@ rt_err_t rt_hw_backtrace_frame_unwind(rt_thread_t thread, struct rt_hw_backtrace if (fp && !((long)fp & 0x7)) { #ifdef RT_USING_SMART - if (thread && thread->lwp) + if (thread && thread->lwp && rt_scheduler_is_available()) { rt_lwp_t lwp = thread->lwp; void *this_lwp = lwp_self(); diff --git a/libcpu/aarch64/common/mmu.c b/libcpu/aarch64/common/mmu.c index d870a73b0f..92f1471118 100644 --- a/libcpu/aarch64/common/mmu.c +++ b/libcpu/aarch64/common/mmu.c @@ -602,7 +602,7 @@ static int _map_single_page_2M(unsigned long *lv0_tbl, unsigned long va, return 0; } -void *rt_hw_mmu_tbl_get() +void *rt_hw_mmu_tbl_get(void) { uintptr_t tbl; __asm__ volatile("MRS %0, TTBR0_EL1" : "=r"(tbl)); diff --git a/libcpu/arm/cortex-a/pmu.c b/libcpu/arm/cortex-a/pmu.c index 4b62849a1a..68abed4e19 100644 --- a/libcpu/arm/cortex-a/pmu.c +++ b/libcpu/arm/cortex-a/pmu.c @@ -21,4 +21,5 @@ void rt_hw_pmu_dump_feature(void) LOG_D("ARM PMU Implementor: %c, ID code: %02x, %d counters\n", reg >> 24, (reg >> 16) & 0xff, (reg >> 11) & 0x1f); RT_ASSERT(ARM_PMU_CNTER_NR == ((reg >> 11) & 0x1f)); + RT_UNUSED(reg); } -- cgit v1.3.1