From 99e9ea61bce6a0b1a2521e914f9d7cefd92e17e6 Mon Sep 17 00:00:00 2001 From: mazhiyuan Date: Wed, 13 Oct 2021 11:02:01 +0800 Subject: 修复部分bsp编译报错 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- libcpu/arm/cortex-a/gicv3.c | 6 +++--- libcpu/arm/cortex-a/gicv3.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'libcpu') diff --git a/libcpu/arm/cortex-a/gicv3.c b/libcpu/arm/cortex-a/gicv3.c index a3fb0e767b..ce9833ad05 100644 --- a/libcpu/arm/cortex-a/gicv3.c +++ b/libcpu/arm/cortex-a/gicv3.c @@ -187,7 +187,7 @@ void arm_gic_clear_pending_irq(rt_uint32_t index, int irq) } } -void arm_gic_set_configuration(rt_uint32_t index, int irq, uint32_t config) +void arm_gic_set_configuration(rt_uint32_t index, int irq, rt_uint32_t config) { rt_uint32_t icfgr; rt_uint32_t shift; @@ -428,8 +428,8 @@ rt_uint32_t arm_gic_get_interface_id(rt_uint32_t index) void arm_gic_set_group(rt_uint32_t index, int irq, rt_uint32_t group) { - uint32_t igroupr; - uint32_t shift; + rt_uint32_t igroupr; + rt_uint32_t shift; RT_ASSERT(index < ARM_GIC_MAX_NR); RT_ASSERT(group <= 1U); diff --git a/libcpu/arm/cortex-a/gicv3.h b/libcpu/arm/cortex-a/gicv3.h index 813a4f4c8d..d379552871 100644 --- a/libcpu/arm/cortex-a/gicv3.h +++ b/libcpu/arm/cortex-a/gicv3.h @@ -151,7 +151,7 @@ rt_uint32_t arm_gic_get_pending_irq(rt_uint32_t index, int irq); void arm_gic_set_pending_irq(rt_uint32_t index, int irq); void arm_gic_clear_pending_irq(rt_uint32_t index, int irq); -void arm_gic_set_configuration(rt_uint32_t index, int irq, uint32_t config); +void arm_gic_set_configuration(rt_uint32_t index, int irq, rt_uint32_t config); rt_uint32_t arm_gic_get_configuration(rt_uint32_t index, int irq); void arm_gic_clear_active(rt_uint32_t index, int irq); -- cgit v1.3.1