From b9f4daa97ad5bf68646b55a5abcce79e117de88e Mon Sep 17 00:00:00 2001 From: zhugengyu <85654684+zhugengyu@users.noreply.github.com> Date: Wed, 28 Aug 2024 10:06:13 +0800 Subject: [BSP][Phytium] add support for mainbranch cherryusb (xhci host + pusb2 device/host) --- libcpu/aarch64/link.lds.S | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'libcpu') diff --git a/libcpu/aarch64/link.lds.S b/libcpu/aarch64/link.lds.S index 156948ecd2..0fe8de7c76 100644 --- a/libcpu/aarch64/link.lds.S +++ b/libcpu/aarch64/link.lds.S @@ -81,6 +81,13 @@ SECTIONS PROVIDE(__rt_ofw_data_end = .); . = ALIGN(16); + /* section information for usb usbh_class_info */ + . = ALIGN(4); + __usbh_class_info_start__ = .; + KEEP(*(.usbh_class_info)) + . = ALIGN(4); + __usbh_class_info_end__ = .; + PROVIDE(__text_end = .); } -- cgit v1.3.1