From d3417aa0d757955497e3fde70d6c20ec0fbb8f2f Mon Sep 17 00:00:00 2001
From: GUI <39894654+GuEe-GUI@users.noreply.github.com>
Date: Wed, 2 Aug 2023 12:48:24 +0800
Subject: Prepare some api for DM (#7894)

Signed-off-by: GuEe-GUI <GuEe-GUI@github.com>
---
 libcpu/Kconfig                  |  8 +++-----
 libcpu/aarch64/Kconfig          |  4 ++--
 libcpu/aarch64/common/cpuport.h | 38 ++++++++++++++------------------------
 libcpu/aarch64/common/mmu.c     | 25 +++++++++++++++++++++++++
 4 files changed, 44 insertions(+), 31 deletions(-)

(limited to 'libcpu')

diff --git a/libcpu/Kconfig b/libcpu/Kconfig
index 9636ce5599..1b21511200 100644
--- a/libcpu/Kconfig
+++ b/libcpu/Kconfig
@@ -1,5 +1,3 @@
-menu "RT-Thread Architecture"
-
 config ARCH_CPU_64BIT
     bool
 
@@ -239,6 +237,6 @@ config ARCH_CPU_STACK_GROWS_UPWARD
     bool
     default n
 
-source "$RTT_DIR/libcpu/aarch64/Kconfig"
-
-endmenu
+if ARCH_ARMV8 && ARCH_CPU_64BIT
+    source "$RTT_DIR/libcpu/aarch64/Kconfig"
+endif
diff --git a/libcpu/aarch64/Kconfig b/libcpu/aarch64/Kconfig
index 4bb9f1ffe7..ac280832b4 100644
--- a/libcpu/aarch64/Kconfig
+++ b/libcpu/aarch64/Kconfig
@@ -1,4 +1,4 @@
-if ARCH_ARMV8 && ARCH_CPU_64BIT
+menu "AArch64 Architecture Configuration"
 
 config ARCH_TEXT_OFFSET
     hex "Text offset"
@@ -16,4 +16,4 @@ config ARCH_HAVE_EFFICIENT_UNALIGNED_ACCESS
     bool
     default y
 
-endif
+endmenu
diff --git a/libcpu/aarch64/common/cpuport.h b/libcpu/aarch64/common/cpuport.h
index 12719c4531..2fe6afb2b9 100644
--- a/libcpu/aarch64/common/cpuport.h
+++ b/libcpu/aarch64/common/cpuport.h
@@ -23,30 +23,20 @@ typedef union {
 } rt_hw_spinlock_t;
 #endif
 
-rt_inline void rt_hw_isb(void)
-{
-    __asm__ volatile ("isb":::"memory");
-}
-
-rt_inline void rt_hw_dmb(void)
-{
-    __asm__ volatile ("dmb ish":::"memory");
-}
-
-rt_inline void rt_hw_wmb(void)
-{
-    __asm__ volatile ("dmb ishst":::"memory");
-}
-
-rt_inline void rt_hw_rmb(void)
-{
-    __asm__ volatile ("dmb ishld":::"memory");
-}
-
-rt_inline void rt_hw_dsb(void)
-{
-    __asm__ volatile ("dsb ish":::"memory");
-}
+#define rt_hw_barrier(cmd, ...) \
+    __asm__ volatile (RT_STRINGIFY(cmd) " "RT_STRINGIFY(__VA_ARGS__):::"memory")
+
+#define rt_hw_isb() rt_hw_barrier(isb)
+#define rt_hw_dmb() rt_hw_barrier(dmb, ish)
+#define rt_hw_wmb() rt_hw_barrier(dmb, ishst)
+#define rt_hw_rmb() rt_hw_barrier(dmb, ishld)
+#define rt_hw_dsb() rt_hw_barrier(dsb, ish)
+
+#define rt_hw_wfi() rt_hw_barrier(wfi)
+#define rt_hw_wfe() rt_hw_barrier(wfe)
+#define rt_hw_sev() rt_hw_barrier(sev)
+
+#define rt_hw_cpu_relax() rt_hw_barrier(yield)
 
 void _thread_start(void);
 #endif  /*CPUPORT_H__*/
diff --git a/libcpu/aarch64/common/mmu.c b/libcpu/aarch64/common/mmu.c
index 88df1f89ff..cd38d74ef3 100644
--- a/libcpu/aarch64/common/mmu.c
+++ b/libcpu/aarch64/common/mmu.c
@@ -590,6 +590,31 @@ static int _map_single_page_2M(unsigned long *lv0_tbl, unsigned long va,
     return 0;
 }
 
+void *rt_ioremap_early(void *paddr, size_t size)
+{
+    size_t count;
+    static void *tbl = RT_NULL;
+
+    if (!size)
+    {
+        return RT_NULL;
+    }
+
+    if (!tbl)
+    {
+        tbl = rt_hw_mmu_tbl_get();
+    }
+
+    count = (size + ARCH_SECTION_MASK) >> ARCH_SECTION_SHIFT;
+
+    while (count --> 0)
+    {
+        _map_single_page_2M(tbl, (unsigned long)paddr, (unsigned long)paddr, MMU_MAP_K_DEVICE);
+    }
+
+    return paddr;
+}
+
 static int _init_map_2M(unsigned long *lv0_tbl, unsigned long va,
                         unsigned long pa, unsigned long count,
                         unsigned long attr)
-- 
cgit v1.3.1