From 8fa9fde43a2e9cb978b52c0eb536fe2bafcc6e73 Mon Sep 17 00:00:00 2001 From: Yunjie Gu Date: Thu, 20 Oct 2022 04:41:13 +0100 Subject: [bsp][c28x] add support to not disable global interrupt in context-switch to enable zero-latency isr for critical interrupts. --- src/irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/irq.c') diff --git a/src/irq.c b/src/irq.c index c417f253a6..e7465da305 100644 --- a/src/irq.c +++ b/src/irq.c @@ -78,7 +78,7 @@ volatile rt_uint8_t rt_interrupt_nest = 0; * * @see rt_interrupt_leave */ -void rt_interrupt_enter(void) +RT_WEAK void rt_interrupt_enter(void) { rt_base_t level; @@ -100,7 +100,7 @@ RTM_EXPORT(rt_interrupt_enter); * * @see rt_interrupt_enter */ -void rt_interrupt_leave(void) +RT_WEAK void rt_interrupt_leave(void) { rt_base_t level; -- cgit v1.3.1