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#ifndef __PLATFORM_WDT_H__
#define __PLATFORM_WDT_H__

#include "sunxi_hal_watchdog.h"

/* Base Address */
#if defined(CONFIG_ARCH_SUN8IW18P1)
#define WDT_BASE        0x030090a0  /* @TODO */
#elif defined(CONFIG_ARCH_SUN8IW19)
#define WDT_BASE        0x030090a0  /* @TODO */
#elif defined(CONFIG_SOC_SUN20IW1) /* RISC-V */
#define WDT_BASE                0x020500A0
#endif

/* watchdog register offset */
#define WDT_IRQ_EN              (WDT_BASE + 0x00)
#define WDT_STA                 (WDT_BASE + 0x04)
#define WDT_CTL                 (WDT_BASE + 0x10)
#define WDT_CFG                 (WDT_BASE + 0x14)
#define WDT_MODE                (WDT_BASE + 0x18)
//#define WDT_OUT_CFG             (WDT_BASE + 0x1C)

//#define WDT_TIMEOUT             16

#define WDT_CTRL_RESTART        (0x1 << 0)
#define WDT_CTRL_KEY            (0x0a57 << 1)

#define WDT_CFG_RESET           (0x1)
#define WDT_MODE_EN             (0x1)
#define KEY_FIELD_MAGIC         (0x16AA0000)

struct hal_sunxi_wdt {
        volatile u32 irq_en;    //0x00
        volatile u32 sta;       //0x04
        volatile u32 rsl[2];
        volatile u32 ctl;       //0x10
        volatile u32 cfg;       //0x14
        volatile u32 mode;      //0x18
};

#endif /* __PLATFORM_WDT_H__ */