/*
 * Copyright (c) 2006-2023, RT-Thread Development Team
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 * Change Logs:
 * Date           Author       Notes
 * 2023-02-25     GuEe-GUI     the first version
 */

/dts-v1/;
#include <dt-bindings/pinctrl/bcm2835.h>
#include <dt-bindings/clock/bcm2835.h>
#include <dt-bindings/clock/bcm2835-aux.h>
#include <dt-bindings/pin/pin.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/bcm2835-pm.h>
#include <dt-bindings/power/raspberrypi-power.h>
#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/*
 * NOTE: Just for QEMU, not the really board!
 */

/*
 * firmware-provided startup stubs live here, where the secondary CPUs are
 * spinning.
 */
/memreserve/ 0x00000000 0x00001000;

/ {
    compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
    model = "Raspberry Pi 4 Model B Rev 1.2";
    #address-cells = <2>;
    #size-cells = <1>;
    interrupt-parent = <&gicv2>;

    aliases {
        serial0 = "/soc/serial@7e215040";
        serial1 = "/soc/serial@7e201000";
        mmc0 = "/soc/mmcnr@7e300000";
        spi0 = "/soc/spi@7e204000";
        i2c0 = "/soc/i2c@7e205000";
        i2c1 = "/soc/i2c@7e804000";
        i2c2 = "/soc/i2c@7e805000";
    };

    chosen {
        stdout-path = "serial1:115200n8";
    };

    cpus: cpus {
        #address-cells = <1>;
        #size-cells = <0>;
        /* For ARM 32-bit */
        enable-method = "brcm,bcm2836-smp";

        /*
         * Source for d/i-cache-line-size and d/i-cache-sets
         * https://developer.arm.com/documentation/100095/0003
         * /Level-1-Memory-System/About-the-L1-memory-system?lang=en
         * Source for d/i-cache-size
         * https://www.raspberrypi.com/documentation/computers
         * /processors.html#bcm2711
         */
        cpu0: cpu@0 {
            device_type = "cpu";
            compatible = "arm,cortex-a72";
            reg = <0>;
            enable-method = "spin-table";
            cpu-release-addr = <0x0 0x000000d8>;
            d-cache-size = <0x8000>;
            d-cache-line-size = <64>;
            d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
            i-cache-size = <0xc000>;
            i-cache-line-size = <64>;
            i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set
            next-level-cache = <&l2>;
        };

        cpu1: cpu@1 {
            device_type = "cpu";
            compatible = "arm,cortex-a72";
            reg = <1>;
            enable-method = "spin-table";
            cpu-release-addr = <0x0 0x000000e0>;
            d-cache-size = <0x8000>;
            d-cache-line-size = <64>;
            d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
            i-cache-size = <0xc000>;
            i-cache-line-size = <64>;
            i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set
            next-level-cache = <&l2>;
        };

        cpu2: cpu@2 {
            device_type = "cpu";
            compatible = "arm,cortex-a72";
            reg = <2>;
            enable-method = "spin-table";
            cpu-release-addr = <0x0 0x000000e8>;
            d-cache-size = <0x8000>;
            d-cache-line-size = <64>;
            d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
            i-cache-size = <0xc000>;
            i-cache-line-size = <64>;
            i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set
            next-level-cache = <&l2>;
        };

        cpu3: cpu@3 {
            device_type = "cpu";
            compatible = "arm,cortex-a72";
            reg = <3>;
            enable-method = "spin-table";
            cpu-release-addr = <0x0 0x000000f0>;
            d-cache-size = <0x8000>;
            d-cache-line-size = <64>;
            d-cache-sets = <256>; // 32KiB(size)/64(line-size)=512ways/2-way set
            i-cache-size = <0xc000>;
            i-cache-line-size = <64>;
            i-cache-sets = <256>; // 48KiB(size)/64(line-size)=768ways/3-way set
            next-level-cache = <&l2>;
        };

        /*
         *  Source for d/i-cache-line-size and d/i-cache-sets
         *  https://developer.arm.com/documentation/100095/0003
         *  /Level-2-Memory-System/About-the-L2-memory-system?lang=en
         *  Source for d/i-cache-size
         *  https://www.raspberrypi.com/documentation/computers
         *  /processors.html#bcm2711
         */
        l2: l2-cache0 {
            compatible = "cache";
            cache-size = <0x100000>;
            cache-line-size = <64>;
            cache-sets = <1024>; // 1MiB(size)/64(line-size)=16384ways/16-way set
            cache-level = <2>;
        };
    };

    arm-pmu {
        compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3", "arm,cortex-a7-pmu";
        interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
        interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
    };

    timer {
        compatible = "arm,armv8-timer";
        interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
                     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
                     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
                     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
        /* This only applies to the ARMv7 stub */
        arm,cpu-registers-not-fw-configured;
    };

    thermal-zones {

        cpu-thermal {
            polling-delay-passive = <0>;
            polling-delay = <1000>;
            thermal-sensors = <&thermal>;
            coefficients = <(-487) 410040>;

            trips {
                cpu-crit {
                    temperature = <110000>;
                    hysteresis = <0>;
                    type = "critical";
                };
            };

            cooling-maps {
            };
        };
    };

    soc {
        compatible = "simple-bus";
        #address-cells = <1>;
        #size-cells = <1>;
        /*
         * Defined ranges:
         *   Common BCM283x peripherals
         *   BCM2711-specific peripherals
         *   ARM-local peripherals
         */
        ranges = <0x7e000000  0x0 0xfe000000  0x01800000>,
                 <0x7c000000  0x0 0xfc000000  0x02000000>,
                 <0x40000000  0x0 0xff800000  0x00800000>;
        /* Emulate a contiguous 30-bit address range for DMA */
        dma-ranges = <0xc0000000  0x0 0x00000000  0x40000000>,
                     <0x7c000000  0x0 0xfc000000  0x03800000>;

        system_timer: timer@7e003000 {
            compatible = "brcm,bcm2835-system-timer";
            reg = <0x7e003000 0x1000>;
            interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
            /*
             * This could be a reference to BCM2835_CLOCK_TIMER,
             * but we don't have the driver using the common clock
             * support yet.
             */
            clock-frequency = <1000000>;
        };

        dsi0: dsi@7e209000 {
            compatible = "brcm,bcm2711-dsi0","brcm,bcm2835-dsi0";
            reg = <0x7e209000 0x78>;
            interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
            #address-cells = <1>;
            #size-cells = <0>;
            #clock-cells = <1>;
            clocks = <&clocks BCM2835_PLLA_DSI0>,
                     <&clocks BCM2835_CLOCK_DSI0E>,
                     <&clocks BCM2835_CLOCK_DSI0P>;
            clock-names = "phy", "escape", "pixel";
            clock-output-names = "dsi0_byte", "dsi0_ddr2", "dsi0_ddr";
            status = "disabled";
        };

        dsi1: dsi@7e700000 {
            compatible = "brcm,bcm2711-dsi1","brcm,bcm2835-dsi1";
            reg = <0x7e700000 0x8c>;
            interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
            #address-cells = <1>;
            #size-cells = <0>;
            #clock-cells = <1>;
            clocks = <&clocks BCM2835_PLLD_DSI1>,
                     <&clocks BCM2835_CLOCK_DSI1E>,
                     <&clocks BCM2835_CLOCK_DSI1P>;
            clock-names = "phy", "escape", "pixel";
            clock-output-names = "dsi1_byte", "dsi1_ddr2", "dsi1_ddr";
            status = "disabled";
        };

        clocks: cprman@7e101000 {
            compatible = "brcm,bcm2835-cprman";
            #clock-cells = <1>;
            reg = <0x7e101000 0x2000>;

            /*
             * CPRMAN derives almost everything from the
             * platform's oscillator.  However, the DSI
             * pixel clocks come from the DSI analog PHY.
             */
            clocks = <&clk_osc>,
                     <&dsi0 0>,<&dsi0 1>,<&dsi0 2>,
                     <&dsi1 0>,<&dsi1 1>,<&dsi1 2>;
            firmware = <&firmware>;
        };

        mailbox: mailbox@7e00b880 {
            compatible = "brcm,bcm2835-mbox";
            reg = <0x7e00b880 0x40>;
            interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
            #mbox-cells = <0>;
        };

        gpio: gpio@7e200000 {
            compatible = "brcm,bcm2711-gpio";
            reg = <0x7e200000 0xb4>;
            interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;

            gpio-controller;
            #gpio-cells = <2>;

            interrupt-controller;
            #interrupt-cells = <2>;

            gpio-ranges = <&gpio 0 0 58>;
            pinctrl-names = "default";

            /*
             * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
             * the official GPU firmware DT blob.
             *
             * Legend:
             * "FOO" = GPIO line named "FOO" on the schematic
             * "FOO_N" = GPIO line named "FOO" on schematic, active low
             */
            gpio-line-names = "ID_SDA",         /*  0 */
                              "ID_SCL",
                              "SDA1",
                              "SCL1",
                              "GPIO_GCLK",
                              "GPIO5",          /*  5 */
                              "GPIO6",
                              "SPI_CE1_N",
                              "SPI_CE0_N",
                              "SPI_MISO",
                              "SPI_MOSI",       /* 10 */
                              "SPI_SCLK",
                              "GPIO12",
                              "GPIO13",
                              /* Serial port */
                              "TXD1",
                              "RXD1",           /* 15 */
                              "GPIO16",
                              "GPIO17",
                              "GPIO18",
                              "GPIO19",
                              "GPIO20",         /* 20 */
                              "GPIO21",
                              "GPIO22",
                              "GPIO23",
                              "GPIO24",
                              "GPIO25",         /* 25 */
                              "GPIO26",
                              "GPIO27",
                              "RGMII_MDIO",
                              "RGMIO_MDC",
                              /* Used by BT module */
                              "CTS0",           /* 30 */
                              "RTS0",
                              "TXD0",
                              "RXD0",
                              /* Used by Wifi */
                              "SD1_CLK",
                              "SD1_CMD",        /* 35 */
                              "SD1_DATA0",
                              "SD1_DATA1",
                              "SD1_DATA2",
                              "SD1_DATA3",
                              /* Shared with SPI flash */
                              "PWM0_MISO",      /* 40 */
                              "PWM1_MOSI",
                              "STATUS_LED_G_CLK",
                              "SPIFLASH_CE_N",
                              "SDA0",
                              "SCL0",           /* 45 */
                              "RGMII_RXCLK",
                              "RGMII_RXCTL",
                              "RGMII_RXD0",
                              "RGMII_RXD1",
                              "RGMII_RXD2",     /* 50 */
                              "RGMII_RXD3",
                              "RGMII_TXCLK",
                              "RGMII_TXCTL",
                              "RGMII_TXD0",
                              "RGMII_TXD1",     /* 55 */
                              "RGMII_TXD2",
                              "RGMII_TXD3";

            spi0_pins: spi0_pins {
                brcm,pins = <9 10 11>;
                brcm,function = <BCM2835_FSEL_ALT0>;
            };

            spi0_cs_pins: spi0_cs_pins {
                brcm,pins = <8 7>;
                brcm,function = <BCM2835_FSEL_GPIO_OUT>;
            };

            i2c0_gpio0: i2c0_gpio0 {
                brcm,pins = <0 1>;
                brcm,function = <BCM2835_FSEL_ALT0>;
            };

            i2c1_gpio2: i2c1_gpio2 {
                brcm,pins = <2 3>;
                brcm,function = <BCM2835_FSEL_ALT0>;
                brcm,pull = <BCM2835_PUD_UP>;
            };

            sdio_pins: sdio_pins {
                brcm,pins = <34 35 36 37 38 39>;
                brcm,function = <BCM2835_FSEL_ALT3>;
                brcm,pull = <BCM2835_PUD_OFF>,
                            <BCM2835_PUD_UP>,
                            <BCM2835_PUD_UP>,
                            <BCM2835_PUD_UP>,
                            <BCM2835_PUD_UP>,
                            <BCM2835_PUD_UP>;
            };

            bt_pins: bt_pins {
                brcm,pins = "-";
                brcm,function = <0>;
                brcm,pull = <BCM2835_PUD_UP>;
            };

            uart0_pins: uart0_pins {
                brcm,pins = <32 33>;
                brcm,function = <BCM2835_FSEL_ALT3>;
                brcm,pull = <BCM2835_PUD_OFF BCM2835_PUD_UP>;
            };

            uart0_gpio14: uart0-gpio14 {
                brcm,pins = <14 15>;
                brcm,function = <BCM2835_FSEL_ALT0>;
            };

            uart1_pins: uart1_pins {
                brcm,pins;
                brcm,function;
                brcm,pull;
            };
        };

        serial@7e201000 {
            compatible = "arm,pl011", "arm,primecell";
            reg = <0x7e201000 0x200>;
            interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&clocks BCM2835_CLOCK_UART>,
                     <&clocks BCM2835_CLOCK_VPU>;
            clock-names = "uartclk", "apb_pclk";
            arm,primecell-periphid = <0x241011>;
            cts-event-workaround;
            pinctrl-names = "default";
            pinctrl-0 = <&uart0_pins &bt_pins>;
            uart-has-rtscts;
            skip-init;
        };

        spi@7e204000 {
            compatible = "brcm,bcm2835-spi";
            reg = <0x7e204000 0x200>;
            interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&clocks BCM2835_CLOCK_VPU>;
            #address-cells = <1>;
            #size-cells = <0>;
            dmas = <&dma 6>, <&dma 7>;
            dma-names = "tx", "rx";
            pinctrl-names = "default";
            pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
            cs-gpios = <&gpio 8 1>, <&gpio 7 1>;

            flash@0 {
                compatible = "jedec,spi-nor";
                reg = <0x00>;
                spi-max-frequency = <50000000>;
                spi-tx-bus-width = <4>;
                spi-rx-bus-width = <4>;
            };
        };

        i2c@7e205000 {
            compatible = "brcm,bcm2835-i2c";
            reg = <0x7e205000 0x200>;
            interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&clocks BCM2835_CLOCK_VPU>;
            #address-cells = <1>;
            #size-cells = <0>;
            pinctrl-names = "default";
            pinctrl-0 = <&i2c0_gpio0>;
            clock-frequency = <100000>;

            rtc@68 {
                compatible = "st,m41t00", "dallas,ds1338";
                reg = <0x68>;
            };
        };

        i2c@7e804000 {
            compatible = "brcm,bcm2835-i2c";
            reg = <0x7e804000 0x1000>;
            interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&clocks BCM2835_CLOCK_VPU>;
            #address-cells = <1>;
            #size-cells = <0>;
            pinctrl-names = "default";
            pinctrl-0 = <&i2c1_gpio2>;
            clock-frequency = <100000>;
        };

        i2c@7e805000 {
            compatible = "brcm,bcm2835-i2c";
            reg = <0x7e805000 0x1000>;
            interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&clocks BCM2835_CLOCK_VPU>;
            #address-cells = <1>;
            #size-cells = <0>;
            clock-frequency = <100000>;
        };

        aux: aux@7e215000 {
            compatible = "brcm,bcm2835-aux";
            #clock-cells = <1>;
            reg = <0x7e215000 0x8>;
            clocks = <&clocks BCM2835_CLOCK_VPU>;
        };

        serial@7e215040 {
            compatible = "brcm,bcm2835-aux-uart";
            reg = <0x7e215040 0x40>;
            interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&aux BCM2835_AUX_CLOCK_UART>;
            pinctrl-names = "default";
            pinctrl-0 = <&uart1_pins>;
            skip-init;
        };

        usb: usb@7e980000 {
            compatible = "brcm,bcm2708-usb";
            reg = <0x7e980000 0x10000>,
                  <0x7e00b200 0x200>;
            interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
            interrupt-names = "usb", "soft";
            #address-cells = <1>;
            #size-cells = <0>;
            clocks = <&clk_usb>;
            clock-names = "otg";
            phys = <&usbphy>;
            phy-names = "usb2-phy";
            power-domains = <&power RPI_POWER_DOMAIN_USB>;
        };

        /*
         * This node is the provider for the enable-method for
         * bringing up secondary cores.
         */
        local_intc: local_intc@40000000 {
            compatible = "brcm,bcm2836-l1-intc";
            reg = <0x40000000 0x100>;
        };

        gicv2: interrupt-controller@40041000 {
            interrupt-controller;
            #interrupt-cells = <3>;
            compatible = "arm,gic-400";
            reg = <0x40041000 0x1000>,
                  <0x40042000 0x2000>,
                  <0x40044000 0x2000>,
                  <0x40046000 0x2000>;
            interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
        };

        avs_monitor: avs-monitor@7d5d2000 {
            compatible = "brcm,bcm2711-avs-monitor", "syscon", "simple-mfd";
            reg = <0x7d5d2000 0xf00>;

            thermal: thermal {
                compatible = "brcm,bcm2711-thermal";
                #thermal-sensor-cells = <0>;
            };
        };

        dma: dma@7e007000 {
            compatible = "brcm,bcm2835-dma";
            reg = <0x7e007000 0xb00>;
            interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
                         /* DMA lite 7 - 10 */
                         <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
            interrupt-names = "dma0",
                              "dma1",
                              "dma2",
                              "dma3",
                              "dma4",
                              "dma5",
                              "dma6",
                              "dma7",
                              "dma8",
                              "dma9",
                              "dma10";
            #dma-cells = <1>;
            brcm,dma-channel-mask = <0x07f5>;
        };

        pm: watchdog@7e100000 {
            compatible = "brcm,bcm2711-pm", "brcm,bcm2835-pm-wdt";
            #power-domain-cells = <1>;
            #reset-cells = <1>;
            reg = <0x7e100000 0x114>,
                  <0x7e00a000 0x24>,
                  <0x7ec11000 0x20>;
            reg-names = "pm", "asb", "rpivid_asb";
            clocks = <&clocks BCM2835_CLOCK_V3D>,
                     <&clocks BCM2835_CLOCK_PERI_IMAGE>,
                     <&clocks BCM2835_CLOCK_H264>,
                     <&clocks BCM2835_CLOCK_ISP>;
            clock-names = "v3d", "peri_image", "h264", "isp";
            system-power-controller;
        };

        random: rng@7e104000 {
            compatible = "brcm,bcm2711-rng200";
            reg = <0x7e104000 0x28>;
        };

        dvp: clock@7ef00000 {
            compatible = "brcm,brcm2711-dvp";
            reg = <0x7ef00000 0x10>;
            clocks = <&clk_108MHz>;
            #clock-cells = <1>;
            #reset-cells = <1>;
        };

        aon_intr: interrupt-controller@7ef00100 {
            compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc";
            reg = <0x7ef00100 0x30>;
            interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
            interrupt-controller;
            #interrupt-cells = <1>;
            status = "disabled";
        };

        mmcnr@7e300000 {
            compatible = "brcm,bcm2835-mmc", "brcm,bcm2835-sdhci";
            reg = <0x7e300000 0x100>;
            interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&clocks BCM2835_CLOCK_EMMC>;
            dmas = <&dma 11>;
            dma-names = "rx-tx";
            brcm,overclock-50 = <0>;
            non-removable;
            pinctrl-names = "default";
            pinctrl-0 = <&sdio_pins>;
            bus-width = <4>;
        };

        firmware: firmware {
            compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
            #address-cells = <1>;
            #size-cells = <1>;
            mboxes = <&mailbox>;
            dma-ranges;

            firmware_clocks: clocks {
                compatible = "raspberrypi,firmware-clocks";
                #clock-cells = <1>;
            };

            expgpio: gpio {
                compatible = "raspberrypi,firmware-gpio";
                gpio-controller;
                #gpio-cells = <2>;
            };

            reset: reset {
                compatible = "raspberrypi,firmware-reset";
                #reset-cells = <1>;
            };
        };

        power: power {
            compatible = "raspberrypi,bcm2835-power";
            firmware = <&firmware>;
            #power-domain-cells = <1>;
        };

        fb: fb {
            compatible = "brcm,bcm2708-fb";
            firmware = <&firmware>;
        };
    };

    clocks {

        clk_osc: clk-osc {
            compatible = "fixed-clock";
            #clock-cells = <0>;
            clock-output-names = "osc";
            clock-frequency = <54000000>;
        };

        clk_usb: clk-usb {
            compatible = "fixed-clock";
            #clock-cells = <0>;
            clock-output-names = "otg";
            clock-frequency = <480000000>;
        };
    };

    usbphy: phy {
        compatible = "usb-nop-xceiv";
        #phy-cells = <0>;
    };

    clk_27MHz: clk-27M {
        #clock-cells = <0>;
        compatible = "fixed-clock";
        clock-frequency = <27000000>;
        clock-output-names = "27MHz-clock";
    };

    clk_108MHz: clk-108M {
        #clock-cells = <0>;
        compatible = "fixed-clock";
        clock-frequency = <108000000>;
        clock-output-names = "108MHz-clock";
    };

    scb {
        compatible = "simple-bus";
        #address-cells = <2>;
        #size-cells = <1>;

        ranges = <0x0 0x7c000000  0x0 0xfc000000  0x03800000>,
                 <0x6 0x00000000  0x6 0x00000000  0x40000000>;

        pcie0: pcie@7d500000 {
            compatible = "brcm,bcm2711-pcie";
            reg = <0x0 0x7d500000 0x9310>;
            device_type = "pci";
            #address-cells = <3>;
            #interrupt-cells = <1>;
            #size-cells = <2>;
            interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
            interrupt-names = "pcie", "msi";
            interrupt-map-mask = <0x0 0x0 0x0 0x7>;
            interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
                            <0 0 0 2 &gicv2 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
                            <0 0 0 3 &gicv2 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
                            <0 0 0 4 &gicv2 GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
            msi-controller;
            msi-parent = <&pcie0>;

            ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;
            /*
             * The wrapper around the PCIe block has a bug
             * preventing it from accessing beyond the first 3GB of
             * memory.
             */
            dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x0 0xc0000000>;
            brcm,enable-ssc;

            pci@0,0 {
                device_type = "pci";
                #address-cells = <3>;
                #size-cells = <2>;
                ranges;

                reg = <0 0 0 0 0>;

                usb@0,0 {
                    reg = <0 0 0 0 0>;
                    resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
                };
            };
        };

        genet: ethernet@7d580000 {
            compatible = "brcm,bcm2711-genet-v5";
            reg = <0x0 0x7d580000 0x10000>;
            #address-cells = <1>;
            #size-cells = <1>;
            interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
                         <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
            phy-handle = <&mdio_phy>;
            phy-mode = "rgmii-rxid";

            genet_mdio: mdio@e14 {
                compatible = "brcm,genet-mdio-v5";
                reg = <0xe14 0x8>;
                reg-names = "mdio";
                #address-cells = <1>;
                #size-cells = <0>;

                mdio_phy: ethernet-phy@1 {
                    reg = <0x01>;
                    led-modes = <0x00 0x08>; /* link/activity link */
                };
            };
        };
    };

    leds {
        compatible = "gpio-leds";

        led-act {
            label = "ACT";
            default-state = "off";
            rt-thread,default-trigger = "mmc0";
            gpios = <&gpio 42 PIN_ACTIVE_HIGH>;
        };

        led-pwr {
            label = "PWR";
            default-state = "off";
            gpios = <&expgpio 2 PIN_ACTIVE_LOW>;
            rt-thread,default-trigger = "default-on";
        };
    };
};