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<text class="title" x="60" y="58">QEMU virt64 AArch64 SMP Bring-up Timeline</text>
<text class="subtitle" x="60" y="88">CPU0 enters the scheduler first, then main_thread_entry wakes the remaining CPUs through PSCI.</text>
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<text class="lane-title" x="395" y="150" text-anchor="middle">Boot CPU ASM</text>
<text class="lane-subtitle" x="395" y="171" text-anchor="middle">entry_point.S</text>
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<text class="lane-title" x="635" y="150" text-anchor="middle">Boot CPU C</text>
<text class="lane-subtitle" x="635" y="171" text-anchor="middle">components.c / setup.c</text>
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<text class="lane-title" x="875" y="150" text-anchor="middle">Secondary CPU ASM</text>
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<text class="lane-title" x="1115" y="150" text-anchor="middle">Secondary CPU C</text>
<text class="lane-subtitle" x="1115" y="171" text-anchor="middle">rt_hw_secondary_cpu_bsp_start</text>
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<text class="lane-subtitle" x="1355" y="171" text-anchor="middle">CPU0 first, then CPU1..N-1</text>
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<text class="step-text" x="250" y="254" text-anchor="middle">1</text>
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<text class="event-label" x="275" y="238" text-anchor="middle">jump to _start, x0 = DTB</text>
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<text class="event-label" x="505" y="329">EL1h, clear BSS, set SP_EL1, enable early MMU</text>
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<text class="step-text" x="520" y="439" text-anchor="middle">3</text>
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<text class="event-label" x="520" y="423" text-anchor="middle">branch to rtthread_startup()</text>
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<text class="step-text" x="725" y="534" text-anchor="middle">4</text>
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<text class="event-label" x="747" y="518">rt_hw_common_setup: full MMU, GIC, UART, GTIMER, SMP IPI</text>
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<text class="step-text" x="970" y="629" text-anchor="middle">5</text>
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<text class="event-label" x="995" y="613" text-anchor="middle">rt_system_scheduler_start() on CPU0</text>
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<text class="step-text" x="970" y="719" text-anchor="middle">6</text>
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<text class="event-label" x="995" y="703" text-anchor="middle">main_thread_entry becomes the first running thread</text>
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<text class="step-text" x="395" y="809" text-anchor="middle">7</text>
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<text class="event-label" x="395" y="793" text-anchor="middle">rt_hw_secondary_cpu_up(): resolve entry PA and issue CPU_ON</text>
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<text class="event-label" x="515" y="883" text-anchor="middle">firmware wakes the target core at _secondary_cpu_entry</text>
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<text class="step-text" x="960" y="964" text-anchor="middle">9</text>
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<text class="event-label" x="982" y="948">read MPIDR, set TPIDR/stack, reuse early MMU</text>
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<text class="step-text" x="990" y="1039" text-anchor="middle">10</text>
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<text class="event-label" x="995" y="1023" text-anchor="middle">branch to rt_hw_secondary_cpu_bsp_start()</text>
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<text class="callout-title" x="1360" y="892" text-anchor="middle">Convergence point</text>
<text class="callout-text" x="1360" y="916" text-anchor="middle">CPU0 arrives first through rtthread_startup().</text>
<text class="callout-text" x="1360" y="934" text-anchor="middle">CPU1..N-1 join after local BSP initialization.</text>
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