threadx.git, branch master

Updated artifact and Pages actions to current patch releases (#802)

2026-10-13T13:14:40Z

The production artifact and Pages workflows pin actions behind their current patch releases. Backported the action-pin updates from #801: upload-artifact v7.0.2, download-artifact v8.0.2 and deploy-pages v5.0.1. This changes only the action SHAs and version comments; it does not promote unreleased component changes. The dev PR passed the ThreadX, SMP, FreeRTOS and RISC-V regression jobs and repository checks. Pages deployment was not exercised. Production-branch CI is pending. Assisted-by: Copilot (gpt-6.1-sol) <223556219+Copilot@users.noreply.github.com>

Merge pull request #783 from eclipse-threadx/dev

2026-10-02T14:42:44Z

Merged changes ahead of the v6.5.2.202603 release

Stopped the RISC-V install pulling a desktop media stack (#789)

2026-10-02T14:26:18Z

The RISC-V job installs qemu-system-misc, ninja-build and cmake under a two-minute per-attempt budget. With recommends enabled that install fetches 67 packages and 87 MB of archives, 388 MB unpacked, because qemu-system-misc recommends gstreamer, pulseaudio, v4l and a set of codec libraries. Twenty-six of the 67 are that media stack, and the job runs qemu-system-riscv64 headless. On a slow mirror the download does not finish inside the budget, and all three attempts time out. The install now passes --no-install-recommends. Raising the budget was the alternative and is not available: TIMEOUT_LONG is already sized so that three attempts fit inside the ten-minute install step, as its own comment records. Observed on the run for #783, where all three attempts timed out while a second RISC-V run at the same minute succeeded, which is the mirror-speed dependence this removes. Assisted-by: Claude Code (Opus 5)

Made the build step timeout a template input (#791)

2026-09-30T16:42:59Z

The build step is capped at fifteen minutes for every consumer, on the same shape of assumption the install step carried: that a consumer builds once. Measured build steps are 0.5 minutes for LevelX, 1.1 for FileX and 6.4 for USBX, so fifteen is right for them. GUIX builds five configurations in that step, because its suite is staged across the three steps, and reaches 11.8 minutes. That is 79 per cent of the cap, and it grows with every regression test added -- six advisories landed tests this week. The cap is now an input defaulting to fifteen, matching install_timeout_minutes above. No consumer changes unless it asks to. Assisted-by: Claude Code (Opus 5)

Made the install step timeout a template input (#790)

2026-09-30T16:00:52Z

The install step is capped at ten minutes for every consumer. That suits a consumer that only installs packages, which is all of them bar one: measured install steps run 0.2 to 0.5 minutes, and NetX Duo's secure interoperability job, which builds OpenSSL and wolfSSL from source, takes 2.1 to 2.8. GUIX does not fit. Its regression suite is staged across the install, build and test steps to keep each inside its limit, so the install step also builds a configuration, and on a slow mirror the packages and the ThreadX checkout leave too little of the ten minutes for it. Three runs on dev were lost that way. The cap is now an input defaulting to ten, so a consumer that needs longer asks for it and every other consumer keeps the timeout it has today. Assisted-by: Claude Code (Opus 5)

Fixed Erbium interrupt masking and PLIC update races

2026-09-30T14:49:55Z

Polling UART output held machine interrupts off for an entire string, which could lose ThreadX ticks. PLIC enable-word changes could overwrite an update made by an interrupt handler. The UART now polls with interrupts enabled and protects only the final status check and byte write. PLIC enable and disable changes are protected across their read-modify-write. The README explains the new simulator tests. Both simulator tests failed on the original code and passed with these fixes. The 100-million-cycle demo run reported all eight threads and five thread 0 wakeups. AI disclosure and port consistency checks passed. No silicon run. Assisted-by: Codex (GPT-6-Sol)

Added simulator tests for Erbium interrupt regressions

2026-09-30T14:49:55Z

Long polling UART writes can mask timer interrupts across several tick periods. PLIC enable-word updates can overwrite a change made by an interrupt handler. The board example had no simulator tests for either case. Added two simulator images and a runner. One compares hardware timer progress with ThreadX ticks after a long print. The other toggles one PLIC source in timer context while a thread changes another. Both tests fail on the PR code and pass with the corresponding local fixes. GCC 15.2.0 and Ninja built both images. erbium_emu reproduced both failures; control runs passed both tests. Port consistency checks passed. No silicon run. Assisted-by: Codex (GPT-6-Sol)

Added an Erbium example to the RISC-V64 GNU port

2026-09-30T14:49:55Z

ThreadX had no board support for Erbium, the OpenHW Foundation CORE-ET RISC-V platform that Zephyr and NuttX support. Its hart implements only part of the F extension, needs a 4 KiB aligned mtvec and uses the original Shakti UART. The example runs the standard demo on hart 0 in machine mode. It builds the library and the demo for rv64imc_zicsr_zifencei with the soft-float lp64 ABI and links without libc or libgcc, so the pinned riscv64-unknown-elf toolchain can build it. It programs the machine timer, a polling UART console and the PLIC, writing the source priorities and threshold that silicon hardwires because the simulator resets them to 0. No shared file changes. The demo built without warnings and ran on erbium_emu from et-platform 836a4ab, with all eight threads reporting and five thread 0 wakeups in 100M cycles, which matches the 2 MHz tick. Separate test images took five PLIC UART interrupts through the ThreadX ISR path and halted with mcause 2 on an illegal instruction. check_ai_disclosure.sh and check_ports.sh passed. Assisted-by: Claude Code (Opus 5.5)

Stopped the version pass skipping ports in silence (#786)

2026-09-28T23:56:37Z

The port stage matched a version only where "Version" was followed immediately by four dotted numbers. A port writing three numbers, or a stray letter before the first, was passed over and kept its old release, and the pass reported success either way. The RISC-V32/IAR port is one of them. It reads "Version G6.5.0.202601", and the letter in front of the number has kept it out of every pass since, so it has advertised 6.5.0.202601 across two releases it was not part of. Its string now reads the current release. The pattern accepts three or four numbers and tolerates a leading letter. A check follows it: any port header that names a release other than the one being prepared is listed and the pass stops, so a port the substitution cannot reach fails the release instead of shipping a version that misreports itself. Verified: every ThreadX port header now advertises 6.5.2.202603. Against a FileX tree, a port the substitution cannot reach makes the pass name the file and exit non-zero, and correcting that string lets the pass complete. Assisted-by: Claude Code (Opus 5)

Added the release and disclosure passes to the blame ignore list (#782)

2026-09-28T18:50:27Z

Two commits on dev are mechanical and repository-wide, and neither is in the list. The disclosure normalisation is the second half of a pass whose first half, #740, is already listed, so blame behaves differently either side of it. The version pass is the same shape as the two release preparations above it. Both are now listed with their file counts. The const object names change is deliberately absent: it alters behaviour, and size is not the criterion. All thirteen revisions in the file resolve, and git accepts it as an ignore file. Assisted-by: Claude Code (Opus 5)