threadx.git/cmake/riscv32_gnu.cmake, branch masterUnnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/threadx.git/atom/cmake/riscv32_gnu.cmake?h=master2026-05-25T20:43:24ZImplemented lazy FPU, GP relaxation, and QEMU automation for GNU port in arch/risc-v32 (#513)2026-05-25T20:43:24ZWei-Chen Lai138997176+Winstonllllai@users.noreply.github.com2026-05-25T20:43:24Zurn:sha1:e031a3d506fdbc589fc6032eba618918e0c6719a
This PR adds three functional improvements to the RISC-V 32-bit GNU port.
Lazy FPU stacking (tx_thread_context_save.S, tx_thread_context_restore.S, tx_thread_schedule.S): FP register save/restore is now skipped whenmstatus.FS is Off, reducing context switch overhead for threads that do not use floating point.
GP relaxation (cmake/riscv32_gnu.cmake, entry.s, link.lds): Enables the -mrelax compiler flag and defines __global_pointer$ in the linker script.The entry stub initializes gp at startup. gp is not saved or restored during context switches.
WFI in idle loop (tx_thread_schedule.S): The scheduler issues wfi when no thread is ready, replacing busy-waiting with a low-power sleep.
A Python/QEMU/GDB functional test runner is added under ports/risc-v32/gnu/example_build/qemu_virt/test/. It validates context switching, FPUcontext preservation, timer interrupts, and preemption. To run:
cd ports/risc-v32/gnu/example_build/qemu_virt
make check-functional-riscv32
Tested on QEMU virt machine (rv32gc).
Co-authored-by: Wei-Chen Lai Winstonllllai@users.noreply.github.com
Co-authored-by: Frédéric Desbiens frederic.desbiens@eclipse-foundation.org
Co-authored-by: Copilot 223556219+Copilot@users.noreply.github.comAdded a riscv32 for the OpenHW CVA6 (#511)2026-05-13T11:46:54ZFrancisco Manuel Merino Torresfrancisco.merino@quintauris.com2026-05-13T11:46:54Zurn:sha1:42adda44573b7c0062138818749437e6baf1044fAdd RISC-V32 arch. port layer2026-02-16T12:15:13ZAkif Ejazakifejaz40@gmail.com2026-02-16T12:15:13Zurn:sha1:757db54d6d10edc655eee9cfe02ecd4d93be5fed
This update adapts the ThreadX low-level kernel routines
for RV32, including:
- startup and initialization logic
- context save/restore implementations
- interrupt control and scheduler entry
- thread stack build and system return paths
- timer interrupt handling
- made it complient as per new risc-v64/gnu
& threadx style
- added reademe for risc-v32/gnu port
These changes provide full low-level support needed to run
ThreadX on RISC-V32 targets.
Signed-off-by: Akif Ejaz <akif.ejaz@10xengineers.ai>