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<title>threadx.git/ports/cortex_m0/ac6, branch dev</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/threadx.git/atom/ports/cortex_m0/ac6?h=dev</id>
<link rel='self' href='http://cgit.235523.xyz/threadx.git/atom/ports/cortex_m0/ac6?h=dev'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/threadx.git/'/>
<updated>2026-09-28T18:36:10Z</updated>
<entry>
<title>Updated ThreadX version constants and port strings to 6.5.2.202603 (#781)</title>
<updated>2026-09-28T18:36:10Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-09-28T18:36:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/threadx.git/commit/?id=a7ded6a3b9e12985a6c52af4df419d2326cccc0a'/>
<id>urn:sha1:a7ded6a3b9e12985a6c52af4df419d2326cccc0a</id>
<content type='text'>
ThreadX still declares 6.5.1.202602 with hotfix 'a', which is the previous
release rather than the one being cut.

prepare_release.sh updated the five version constants in tx_api.h and the
version string in 211 port headers across ports, ports_smp, ports_arch and
ports_module. The hotfix letter is cleared, since the target has none. Nothing
else changed: every line in the port commit carries a version, and no file
outside an inc/tx_port.h was touched.

The port consistency checks passed before the branch was cut, which is what the
script gates on. Host regression 113/113 with zero warnings, and the AI
disclosure check passes.

Assisted-by: Claude Code (Opus 5) &lt;noreply@anthropic.com&gt;</content>
</entry>
<entry>
<title>Normalized the AI disclosure comment to one fixed line per file (#740)</title>
<updated>2026-09-15T21:17:26Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-09-15T21:17:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/threadx.git/commit/?id=9e4c57138dfa004cd512b60259c1c5047a8b3dd1'/>
<id>urn:sha1:9e4c57138dfa004cd512b60259c1c5047a8b3dd1</id>
<content type='text'>
The per-edit disclosure named the product and model, so every agent and every
model version appended another line. 74 files carried two to four of them, and
the same five products had accumulated 13 spellings -- Copilot against GitHub
Copilot, Claude Sonnet 4.6 against claude-sonnet-4.6, four spellings of Codex.
Twenty assembly lines carried a doubled comment marker, `; //` or `@ //`.

Every file now carries exactly one line, fixed text naming no product:

    Portions of this file were generated with AI assistance.

It is written with the comment character that file already uses, so the `;`
and `@` assembly files keep theirs and the doubled markers are gone. Precise
attribution stays on the commit, where the Assisted-by trailer is per-change,
dated and attached to the diff it describes. A header line cannot hold that
record honestly, because the code it names gets rewritten and the line stays.
A file-level flag answers whether; the history answers who.

Comment-only. 455 files, 455 insertions and 574 deletions: every removed line
was a disclosure line, every added line is the fixed text, and no file is left
with zero or with more than one. `scripts/check_ports.sh` passes, including the
reproducibility check that would catch a ports_arch master and its generated
copies drifting apart. Recompiled against dev, every file that builds without a
vendor toolchain gives a byte-identical object: 19 of 19 C files under common,
100 of 100 GNU assembly files, and all 16 assemblable files whose comment
marker changed. The 10 remaining marker changes are ac5 and IAR sources where
`;` already started the comment and only the redundant `//` was removed.

Assisted-by: Claude Code (Opus 5) &lt;noreply@anthropic.com&gt;</content>
</entry>
<entry>
<title>Replaced the GNU-only dsb/isb 0xF operands with the UAL sy form (#729)</title>
<updated>2026-09-15T20:24:45Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-09-15T20:24:45Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/threadx.git/commit/?id=9b2979e6b010edb27c741c3e58e9de5faa911528'/>
<id>urn:sha1:9b2979e6b010edb27c741c3e58e9de5faa911528</id>
<content type='text'>
Fixes #551

`_tx_thread_system_return_inline()` in the Cortex-M `tx_port.h` headers spells
its barriers `dsb 0xF` and `isb 0xF`. A bare hexadecimal operand is a GNU
assembler extension, and IAR rejects it with `operand syntax error`, so the
header cannot be included at all. The block is guarded for GCC, armclang and IAR
together, so every IAR user of an affected port hits it -- four independent
reports on Cortex-M33 and M7 with EWARM 9.50 and 9.70.

Both operands become `sy`, the Arm UAL name for exactly what `0xF` encodes. The
generated instruction is unchanged. Applied to the two `ports_arch` masters and
all 32 copies under `ports`, covering M0, M23, M3, M33, M4, M52, M55, M7 and M85
across ac5, ac6, gnu, iar and keil, plus the `scripts/check_ports.sh` probes that
matched the old spelling.

`check_ports.sh` passes, the copy scripts still reproduce every generated port
byte for byte, and `arm-none-eabi-gcc -O2` compiles a caller for every patched
header, emitting `dsb sy` and `isb sy`. Three headers that need toolchain
intrinsics GCC does not ship fail identically on `dev`.

Assisted-by: Copilot (Opus 5) &lt;noreply@github.com&gt;</content>
</entry>
<entry>
<title>Removed the vector table offset register and system stack pointer setup from the Cortex-M low-level initialization (#714)</title>
<updated>2026-09-09T20:28:59Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-09-09T20:28:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/threadx.git/commit/?id=383dd311cd3be0302f6621eb9c05457ee7b7d4b7'/>
<id>urn:sha1:383dd311cd3be0302f6621eb9c05457ee7b7d4b7</id>
<content type='text'>
_tx_initialize_low_level wrote VTOR and derived _tx_thread_system_stack_ptr from
the reset vector on every Cortex-M port. Programming VTOR is the job of the
low-level startup code that runs before the kernel is entered, and doing it again
inside ThreadX silently overrode a vector table that the application, a
bootloader or a firmware update had already installed. It also forced every
application to export a vector table symbol that the kernel itself never needed.

_tx_thread_system_stack_ptr is never read by any Cortex-M port, so the value
copied out of the reset vector served no purpose.

Both blocks are removed from all Cortex-M ports, together with the now-unused
symbol declarations. The GreenHills files keep the NVIC base address load that
the removed block used to leave in r0 for the SysTick setup that follows.

Applications that relied on ThreadX programming VTOR must now set it in their
startup code. The bundled examples link their vector table at address zero and
run on the reset default.

Fixes #370

Assisted-by: Copilot (Opus 5) &lt;noreply@github.com&gt;</content>
</entry>
<entry>
<title>Completed the Cortex-M0 barriers and made its example build with both toolchains (#595)</title>
<updated>2026-08-10T21:34:13Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-08-10T21:34:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/threadx.git/commit/?id=a8aebc52060502d13f9cedfaff64e33db7157776'/>
<id>urn:sha1:a8aebc52060502d13f9cedfaff64e33db7157776</id>
<content type='text'>
Two unrelated Cortex-M0 gaps, both left over from earlier work.

The memory barriers from #523 reached the Cortex-M0 gnu port but not its ac6 or
iar siblings, in either the inline system return in tx_port.h or the assembly
routine. Both take the same GNU or IAR code path, and iar already carried the
entry barrier, so the missing pieces were the entry pair for ac6 and the barrier
after restoring the interrupt posture for both. All three tools now match.

The Cortex-M0 example could not link with any toolchain. cortexm0_crt0.S
references 23 linker script symbols and the script defined only 12 of them, so
__text_start__, __text_end__, __text_load_start__, the rodata and fast section
symbols, and the ctors and dtors load addresses were all unresolved. The
Cortex-M4 script defines all 23, including a .fast section with no content whose
symbols exist so that the startup copy is a no-op, and its comment says as much.
The Cortex-M0 script is brought to that same shape.

That left the example failing under LLVM only, on instructions that ARMv6-M can
encode just one way. The file declared .code 16 but no syntax mode, so GNU as
used the legacy divided syntax in which a plain add or sub sets the flags
implicitly, while LLVM implements unified syntax only and rejected the
non-flag-setting spelling. Declaring .syntax unified and writing movs, adds and
subs makes both assemblers agree, and the encodings GNU produces are byte
identical before and after, verified by disassembling both objects.

The Cortex-M0 example now links with GNU at 22,520 bytes of text and with Arm
Toolchain for Embedded at 22,866, so it comes off the list of examples not
expected to link and scripts/check_clang.sh now links eight of eight.

Assisted-by: Claude Code (Opus 5) &lt;noreply@anthropic.com&gt;</content>
</entry>
<entry>
<title>Add SysTick counter reset in Cortex-M ports (#561)</title>
<updated>2026-06-24T16:16:51Z</updated>
<author>
<name>hefanbo</name>
<email>hefanbo@gmail.com</email>
</author>
<published>2026-06-24T16:16:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/threadx.git/commit/?id=d9e7dfea89046c901100b42afa230b37823718f7'/>
<id>urn:sha1:d9e7dfea89046c901100b42afa230b37823718f7</id>
<content type='text'>
* Add SysTick counter reset in Cortex-M ports

The SysTick counter value (SYST_CVR @0xE000E018) is indeterminate after
reset. Without clearing it prior to enabling the counter, the first tick
interval becomes unpredictable.

* Fixed missing comment and added generated-by header in Cortex-M0/AC6 port

Added the missing inline comment on the LDR r1, =0 instruction
(Build value for SysTick reset) and the required AI-generated
attribution comment under the copyright header.

---------

Co-authored-by: Frédéric Desbiens &lt;frederic.desbiens@eclipse-foundation.org&gt;
Co-authored-by: Copilot &lt;223556219+Copilot@users.noreply.github.com&gt;</content>
</entry>
<entry>
<title>Release 6.5.1.202602a preparation (#547)</title>
<updated>2026-06-08T14:59:04Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-06-08T14:59:04Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/threadx.git/commit/?id=df30b8b96e4c0c6d72e0bb80d2a2ec31666e5afe'/>
<id>urn:sha1:df30b8b96e4c0c6d72e0bb80d2a2ec31666e5afe</id>
<content type='text'>
* Updated version number constants

* Updated port version strings

---------

Co-authored-by: Copilot &lt;223556219+Copilot@users.noreply.github.com&gt;</content>
</entry>
<entry>
<title>Added copyright headers to files missing them</title>
<updated>2026-06-06T19:48:06Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-06-06T19:42:47Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/threadx.git/commit/?id=730b61874bc5cf40768987605ae5187fde0fa1e2'/>
<id>urn:sha1:730b61874bc5cf40768987605ae5187fde0fa1e2</id>
<content type='text'>
Applied the standard MIT license header to all project-owned C, header,
assembly, shell, and Python files that were missing a copyright notice.
Third-party, toolchain startup, and auto-generated files were excluded.

Co-authored-by: Copilot &lt;223556219+Copilot@users.noreply.github.com&gt;
</content>
</entry>
<entry>
<title>Release 6.5.1.202602 preparation (#543)</title>
<updated>2026-06-03T20:55:01Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-06-03T20:55:01Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/threadx.git/commit/?id=de1c6e9bbe13e2db480e4e0ed2d3589ebdd5db27'/>
<id>urn:sha1:de1c6e9bbe13e2db480e4e0ed2d3589ebdd5db27</id>
<content type='text'>
* Updated version number constants
* Updated port version strings

---------

Co-authored-by: Copilot &lt;223556219+Copilot@users.noreply.github.com&gt;</content>
</entry>
<entry>
<title>Updated copyright headers and version number constants (#509)</title>
<updated>2026-03-05T09:46:30Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-03-05T09:46:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/threadx.git/commit/?id=c3259a216026372e3833dd8996a68f77e8595fbd'/>
<id>urn:sha1:c3259a216026372e3833dd8996a68f77e8595fbd</id>
<content type='text'>
* Updated version number constants

* Removed revision history from all files

* Added Eclipse ThreadX contributors' copyright header </content>
</entry>
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