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<title>threadx.git/ports/cortex_m0/iar/example_build, branch dev</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/threadx.git/atom/ports/cortex_m0/iar/example_build?h=dev</id>
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<updated>2026-09-15T21:17:26Z</updated>
<entry>
<title>Normalized the AI disclosure comment to one fixed line per file (#740)</title>
<updated>2026-09-15T21:17:26Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-09-15T21:17:26Z</published>
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<id>urn:sha1:9e4c57138dfa004cd512b60259c1c5047a8b3dd1</id>
<content type='text'>
The per-edit disclosure named the product and model, so every agent and every
model version appended another line. 74 files carried two to four of them, and
the same five products had accumulated 13 spellings -- Copilot against GitHub
Copilot, Claude Sonnet 4.6 against claude-sonnet-4.6, four spellings of Codex.
Twenty assembly lines carried a doubled comment marker, `; //` or `@ //`.

Every file now carries exactly one line, fixed text naming no product:

    Portions of this file were generated with AI assistance.

It is written with the comment character that file already uses, so the `;`
and `@` assembly files keep theirs and the doubled markers are gone. Precise
attribution stays on the commit, where the Assisted-by trailer is per-change,
dated and attached to the diff it describes. A header line cannot hold that
record honestly, because the code it names gets rewritten and the line stays.
A file-level flag answers whether; the history answers who.

Comment-only. 455 files, 455 insertions and 574 deletions: every removed line
was a disclosure line, every added line is the fixed text, and no file is left
with zero or with more than one. `scripts/check_ports.sh` passes, including the
reproducibility check that would catch a ports_arch master and its generated
copies drifting apart. Recompiled against dev, every file that builds without a
vendor toolchain gives a byte-identical object: 19 of 19 C files under common,
100 of 100 GNU assembly files, and all 16 assemblable files whose comment
marker changed. The 10 remaining marker changes are ac5 and IAR sources where
`;` already started the comment and only the redundant `//` was removed.

Assisted-by: Claude Code (Opus 5) &lt;noreply@anthropic.com&gt;</content>
</entry>
<entry>
<title>Removed the vector table offset register and system stack pointer setup from the Cortex-M low-level initialization (#714)</title>
<updated>2026-09-09T20:28:59Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-09-09T20:28:59Z</published>
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<id>urn:sha1:383dd311cd3be0302f6621eb9c05457ee7b7d4b7</id>
<content type='text'>
_tx_initialize_low_level wrote VTOR and derived _tx_thread_system_stack_ptr from
the reset vector on every Cortex-M port. Programming VTOR is the job of the
low-level startup code that runs before the kernel is entered, and doing it again
inside ThreadX silently overrode a vector table that the application, a
bootloader or a firmware update had already installed. It also forced every
application to export a vector table symbol that the kernel itself never needed.

_tx_thread_system_stack_ptr is never read by any Cortex-M port, so the value
copied out of the reset vector served no purpose.

Both blocks are removed from all Cortex-M ports, together with the now-unused
symbol declarations. The GreenHills files keep the NVIC base address load that
the removed block used to leave in r0 for the SysTick setup that follows.

Applications that relied on ThreadX programming VTOR must now set it in their
startup code. The bundled examples link their vector table at address zero and
run on the reset default.

Fixes #370

Assisted-by: Copilot (Opus 5) &lt;noreply@github.com&gt;</content>
</entry>
<entry>
<title>Removed developer machine paths from the shipped project files (#603)</title>
<updated>2026-08-11T23:39:41Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-08-11T23:39:41Z</published>
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<id>urn:sha1:31fbe21d202b6825157888fa6268da73fa7454a6</id>
<content type='text'>
The Arm Development Studio launch configurations and the IAR project files
carried absolute paths from the machines they were last opened on: four
individuals' home directories, a Broadcom support build tree, and directories
such as C:\release\threadx, C:\temp1702\tx and D:\threadx. They are published in
the repository and none of them resolves for anyone else.

In the launch files all of it is saved session state, which files that were never
opened in a debugger simply do not have:

  breakpoints                  72 files, saved breakpoints anchored to source
                               paths under cortex_a35 on one machine. Emptied
                               rather than deleted, matching the 27 launch files
                               that already carry an empty list.
  scripts_view_script_links    70 files, a scripts view cache. The script the
                               launch actually runs is named one line earlier
                               through ${workspace_loc:...}, which is portable.
  substitutePath               65 files, source lookup remapping. 30 map a path
                               to itself, and the rest point at one machine's
                               copy of libgloss or a build directory.
  TREE_NODE_PROPERTIES         39 files, which rows the variables view had
                               expanded.
  DebugCommandLine.History      2 files, the debug console command history,
                               including a typed absolute path.

The two IAR cases are not session state and are corrected rather than removed:

  IarchiveOutput               23 files. The librarian output path pointed at
                               another machine, so the library was written
                               outside the project. Set to ###Unitialized###,
                               which 86 other option blocks already use, letting
                               IAR derive $EXE_DIR$\$PROJ_FNAME$.a.
  IlinkIcfFile                  1 file. The linker configuration file is load
                               bearing, so the file name is kept and the path
                               made project relative, as 33 other option blocks
                               spell it.

Seven of the files are ports_arch templates, so the generators would otherwise
have copied the paths back.

Verified: all 162 launch and IAR project files in the tree parse as well-formed
XML afterwards, no tracked launch or project file mentions any of the four user
names, and scripts/check_ports.sh passes, so the templates and their generated
copies still agree.

Assisted-by: Claude Code (Opus 5) &lt;noreply@anthropic.com&gt;</content>
</entry>
<entry>
<title>Added copyright headers to files missing them</title>
<updated>2026-06-06T19:48:06Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-06-06T19:42:47Z</published>
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<id>urn:sha1:730b61874bc5cf40768987605ae5187fde0fa1e2</id>
<content type='text'>
Applied the standard MIT license header to all project-owned C, header,
assembly, shell, and Python files that were missing a copyright notice.
Third-party, toolchain startup, and auto-generated files were excluded.

Co-authored-by: Copilot &lt;223556219+Copilot@users.noreply.github.com&gt;
</content>
</entry>
<entry>
<title>Merge pull request #278 from Polarisru/master</title>
<updated>2026-04-15T15:23:57Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-04-15T15:23:57Z</published>
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<id>urn:sha1:454ab56fcecb35c0b24dc2f0bed6b8551a797fac</id>
<content type='text'>
Fixed SysTick initialization problem in tx_initialize_low_level.s for Cortex-M0. </content>
</entry>
<entry>
<title>Updated copyright headers and version number constants (#509)</title>
<updated>2026-03-05T09:46:30Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-03-05T09:46:30Z</published>
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<id>urn:sha1:c3259a216026372e3833dd8996a68f77e8595fbd</id>
<content type='text'>
* Updated version number constants

* Removed revision history from all files

* Added Eclipse ThreadX contributors' copyright header </content>
</entry>
<entry>
<title>Comment style changed according to conversation</title>
<updated>2024-09-05T13:11:35Z</updated>
<author>
<name>Alex Kiselev</name>
<email>a.kiselev@volz-servos.com</email>
</author>
<published>2024-09-05T13:11:35Z</published>
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<id>urn:sha1:416dfac3fd596c6fcc5b299886426eb40a42ecaa</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Update the copyright for all assembly files.</title>
<updated>2024-02-23T01:39:05Z</updated>
<author>
<name>bo chen</name>
<email>boche@microsoft.com</email>
</author>
<published>2024-02-23T01:39:05Z</published>
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<id>urn:sha1:039a3463974f922f6dd6bfb8afb7ee2895eaebcf</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Update version id string.</title>
<updated>2024-01-30T00:39:18Z</updated>
<author>
<name>Bo Chen (from Dev Box)</name>
<email>boche@microsoft.com</email>
</author>
<published>2024-01-30T00:39:18Z</published>
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<id>urn:sha1:3e1da1f0b0973e6b833b08b10fb27c7c718835b3</id>
<content type='text'>
</content>
</entry>
<entry>
<title>SysTick initialization problem fixed in tx_initialize_low_level.s</title>
<updated>2023-06-21T07:08:45Z</updated>
<author>
<name>Alex Kiselev</name>
<email>a.kiselev@volz-servos.com</email>
</author>
<published>2023-06-21T07:08:45Z</published>
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<id>urn:sha1:5d619e5c4ba36fdf4fe5bc6ffb34f18dc7076ac5</id>
<content type='text'>
Problem with first system tick was detected, it needs much more time for the first tick as it's defined. The reason for this behavior is incorrect initialization of the SysTick timer in the port file for the Cortex-M0. It doesn't reset the SysTick Current Value Register despite the fact that its value is not initialized at startup (see https://developer.arm.com/documentation/dui0552/a/cortex-m3-peripherals/system-timer--systick). So if we have 0xFFFFFF (this register has 24-bit), it means we will get about 256*256*256 / 48000000 for the tact frequency of 48MHz to reach the zero, that makes 350ms delay at startup.
</content>
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