Unnamed repository; edit this file 'description' to name the repository. http://cgit.235523.xyz/threadx.git/atom/ports/xtensa/xcc/inc/xtensa_context.h?h=dev 2026-05-19T15:11:37Z 2026-05-19T15:11:37Z Ian Thompson 101299961+ianstcdns@users.noreply.github.com 2026-05-19T15:11:37Z urn:sha1:9ccdd5d82248736274a4cc5cad5e13d2ffc50de7 * Add LX8 support for > 32 interrupts Also fix inconsistent SWPRI define in interrupt handler * ThreadX: Fix context switch logic - Disable interrupts prior to allocating a large exception frame; only reenable them after deallocating the extra memory. - Any user tasks with stacks based on TX_MINIMUM_STACK do not have sufficient space for both a context switch frame and an ISR frame; ill-timed interrupts were causing stack overruns. * ThreadX: Interrupt fixes for TX_ENABLE_EXECUTION_CHANGE_NOTIFY - Must reload register trashed by notify hook function call - Must ensure PS.WOE is set before using call8 - Remove unused XT_USE_INT_WRAPPER define and associated changes, which had a bug in XEA2 usage - Fix another case where enabling the thread notify hooks for call0 ABI corrupted a register * ThreadX: Support for __DYNAMIC_REENT__ - ThreadX change to handle dynamic reent for both newlib and xclib - Adapt ThreadX xclib interface code to handle dynamic reent pointers * ThreadX: Xtensa execution profiling support - Update upstream execution profiling for Xtensa port * ThreadX: Update xtensa port readme * ThreadX: Add Xtensa example to EPK - tx_execution_profile.h now defines an Xtensa example in addition to the existing Cortex example * ThreadX: Add xtensa.cmake * ThreadX: Update XSHAL_CLIB ifdefs in __getreent() - Prevent a fall-through with no return value when neither xclib nor newlib are used. 2026-03-05T09:46:30Z Frédéric Desbiens frederic.desbiens@eclipse-foundation.org 2026-03-05T09:46:30Z urn:sha1:c3259a216026372e3833dd8996a68f77e8595fbd * Updated version number constants * Removed revision history from all files * Added Eclipse ThreadX contributors' copyright header 2022-12-16T08:16:32Z Scott Larson sclarson@microsoft.com 2022-12-16T08:16:32Z urn:sha1:4e62226eeaf870827facbeef40bd1767db5cf9f0 b5d5df511 #include tx_user.h in assembly files for cortex-m ports 33e04e3d5 initial port of MIPS SMP for GHS and GNU 2eda2c17d capitalize extensions for M23 asm files 21c354ccb Fix armv7-m MPU settings for corner case, unify txm_module_port.h files 4a1ff93f9 remove uneeded include for ac6 c823e91ff update riscv iar example for latest iar tools 5559d185d check module stack for overlap (not kernel stack) efa9ce7b7 apply patch from mobileye to fix time slice processing 75fdcb722 Updated copy_armv7_cm.yml de04b9904 initialize unused MPU settings so that aliasing will work 79b317b60 add config directory to IAR RISC-V port in order to use simulator 2021-01-08T21:31:36Z Scott Larson sclarson@microsoft.com 2021-01-08T21:31:36Z urn:sha1:f108ebdbafc16dc1725f4afbab73ac6084ee4302