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<title>threadx.git/scripts/test_tx_riscv.sh, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/threadx.git/atom/scripts/test_tx_riscv.sh?h=master</id>
<link rel='self' href='http://cgit.235523.xyz/threadx.git/atom/scripts/test_tx_riscv.sh?h=master'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/threadx.git/'/>
<updated>2026-06-06T19:48:06Z</updated>
<entry>
<title>Added copyright headers to files missing them</title>
<updated>2026-06-06T19:48:06Z</updated>
<author>
<name>Frédéric Desbiens</name>
<email>frederic.desbiens@eclipse-foundation.org</email>
</author>
<published>2026-06-06T19:42:47Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/threadx.git/commit/?id=730b61874bc5cf40768987605ae5187fde0fa1e2'/>
<id>urn:sha1:730b61874bc5cf40768987605ae5187fde0fa1e2</id>
<content type='text'>
Applied the standard MIT license header to all project-owned C, header,
assembly, shell, and Python files that were missing a copyright notice.
Third-party, toolchain startup, and auto-generated files were excluded.

Co-authored-by: Copilot &lt;223556219+Copilot@users.noreply.github.com&gt;
</content>
</entry>
<entry>
<title>Add QEMU based CI regression test infra for RV32 and RV64 (#526)</title>
<updated>2026-05-19T15:03:23Z</updated>
<author>
<name>Akif Ejaz</name>
<email>akifejaz40@gmail.com</email>
</author>
<published>2026-05-19T15:03:23Z</published>
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<id>urn:sha1:c1e3678797d5249268756287a33e5aca729a7631</id>
<content type='text'>
Added a QEMU virt-machine BSP and CTest infrastructure to run the
ThreadX regression suite on both RISC-V 32-bit and 64-bit targets
in CI.

New components:
- BSP (entry, trap, PLIC, CLINT timer, UART, linker script) targeting
  QEMU virt machine for RV32 and RV64
- CMake build system with Ninja, supporting multiple build configs
- CI scripts: install_riscv.sh (toolchain + QEMU), build_tx_riscv.sh,
  test_tx_riscv.sh
- GitHub Actions workflow job for RISC-V regression gating

Port fixes:
- RV32 tx_thread_context_restore.S: set MPIE alongside MPP (0x1800 →
  0x1880) so mret re-enables interrupts
- RV32/RV64 tx_port.h: add TX_REGRESSION_TEST extension macros needed
  by the test harness
- RV32/RV64 example_build scripts: add compile and QEMU launch steps

Regression test portability fixes:
- Block memory tests: increase pool sizes (320 → 340) to accommodate
  larger RISC-V block-header alignment
- Byte memory test: replace hardcoded offsets with BYTE_POOL_OVERHEAD
  macro for portable pool-size computation
- Event flag timeout test: make counter tolerance unconditional,
  removing linux-only guard

Signed-off-by: Akif Ejaz &lt;akif.ejaz@10xengineers.ai&gt;</content>
</entry>
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