Covered the MISRA shim's stack check and its two conversions

2026-09-20T21:55:38Z

Three regions of tx_misra.c had no caller in any of the eight build configurations. The thread stack check is reached through TX_THREAD_STACK_CHECK, whose call sites sit inside TX_ENABLE_STACK_CHECKING and which is redirected to the shim only under TX_MISRA_ENABLE, and no configuration defines both. The user timer derivation's six call sites are behind TX_TIMER_ENABLE_PERFORMANCE_INFO, three of them behind TX_TIMER_PROCESS_IN_ISR as well. The trace entry conversion has no caller in common_smp/src at all. A new test drives all three through the macro the kernel itself uses, so the shim and the in-line form the other builds compile are asserted to agree. The stack check is the one with logic in it, and is given a scratch thread one fault at a time: a cleared identifier, either stack fence overwritten, the recorded high-water mark moved above the stack pointer and below the stack. That thread is created with TX_DONT_START on a fenced buffer of the test's own and never runs, so no faulted state is ever visible to the scheduler. tx_misra.c goes from 138/163 lines and 16/30 branch outcomes to 163/163 and 30/30 on the union of the eight configurations. 133/133 in each of the eight, and 50 standalone repeats of the new test green in every one of them. Assisted-by: Claude Code (Opus 5)

threadx.git/test/smp/regression/threadx_misra_shim_test.c, branch v6.4.1_cert

Covered the MISRA shim's stack check and its two conversions