diff options
| author | Tiejun Zhou <[email protected]> | 2023-03-08 08:26:22 +0000 |
|---|---|---|
| committer | Tiejun Zhou <[email protected]> | 2023-03-08 08:26:22 +0000 |
| commit | 2aa19f3de0b6cf09bb9dca78c8a53fe337b8f0f7 (patch) | |
| tree | 8ec91a64e0831e3100a6ad9a5dec41d9fd7fc74f /ports/cortex_a5/ac5 | |
| parent | 745395d6a2f931c85c4428425db21eb7d03b4324 (diff) | |
Release 6.2.1 on 08 Mar 2023. Expand to see details.v6.2.1_rel
cee19603d Include tx_user.h conditionally.
e40e08007 Update owners
d69641273 Update release date and version
394aee52f Add tx_user.h to GNU port assembly files
5cca2ddd0 RISC-V 64 bit port for Microchip
e0f2c373c Link Winmm.lib that required by the high-resolution timer.
6af472a68 Update Win32 port with high resolution timer.
aea7b556a Add DMB ISH barrier inst in ARMv8-A SMP scheduler
19091a262 Add .section .preamble to m3 m4 m7 module ports
ced60e1b7 Add missing parenthesis in ports assembly file
309dc77ca Modules Cortex-A7 IAR new port
c752a4063 Modules Cortex-A7 GNU new port
dc224b90f Fix race condition in tx_thread_wait_abort and update regression test
6e261f5b7 create threadx cmsis-pack
Diffstat (limited to 'ports/cortex_a5/ac5')
| -rw-r--r-- | ports/cortex_a5/ac5/inc/tx_port.h | 2 | ||||
| -rw-r--r-- | ports/cortex_a5/ac5/src/tx_thread_context_restore.s | 2 | ||||
| -rw-r--r-- | ports/cortex_a5/ac5/src/tx_thread_fiq_context_restore.s | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/ports/cortex_a5/ac5/inc/tx_port.h b/ports/cortex_a5/ac5/inc/tx_port.h index 3e73e330..bcbb80cb 100644 --- a/ports/cortex_a5/ac5/inc/tx_port.h +++ b/ports/cortex_a5/ac5/inc/tx_port.h @@ -327,7 +327,7 @@ void tx_thread_vfp_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/AC5 Version 6.1.9 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-A5/AC5 Version 6.2.1 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports/cortex_a5/ac5/src/tx_thread_context_restore.s b/ports/cortex_a5/ac5/src/tx_thread_context_restore.s index d0b82fbb..6a2f7517 100644 --- a/ports/cortex_a5/ac5/src/tx_thread_context_restore.s +++ b/ports/cortex_a5/ac5/src/tx_thread_context_restore.s @@ -140,7 +140,7 @@ _tx_thread_context_restore __tx_thread_not_nested_restore ; ; /* Determine if a thread was interrupted and no preemption is required. */ -; else if (((_tx_thread_current_ptr) && (_tx_thread_current_ptr == _tx_thread_execute_ptr) +; else if (((_tx_thread_current_ptr) && (_tx_thread_current_ptr == _tx_thread_execute_ptr)) ; || (_tx_thread_preempt_disable)) ; { ; diff --git a/ports/cortex_a5/ac5/src/tx_thread_fiq_context_restore.s b/ports/cortex_a5/ac5/src/tx_thread_fiq_context_restore.s index 9a7bc396..63109fcc 100644 --- a/ports/cortex_a5/ac5/src/tx_thread_fiq_context_restore.s +++ b/ports/cortex_a5/ac5/src/tx_thread_fiq_context_restore.s @@ -132,7 +132,7 @@ _tx_thread_fiq_context_restore __tx_thread_fiq_not_nested_restore ; ; /* Determine if a thread was interrupted and no preemption is required. */ -; else if (((_tx_thread_current_ptr) && (_tx_thread_current_ptr == _tx_thread_execute_ptr) +; else if (((_tx_thread_current_ptr) && (_tx_thread_current_ptr == _tx_thread_execute_ptr)) ; || (_tx_thread_preempt_disable)) ; { ; |