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| author | Frédéric Desbiens <[email protected]> | 2026-06-29 16:07:12 -0400 |
|---|---|---|
| committer | GitHub <[email protected]> | 2026-06-29 16:07:12 -0400 |
| commit | 3fcfb4e4c984c66eaeaafcff908afb7e2dfb72fa (patch) | |
| tree | baf3b8d7717601c0066d4e989305199ac13b92ba /ports/cortex_m3/ac6 | |
| parent | d9e7dfea89046c901100b42afa230b37823718f7 (diff) | |
Updated Cortex-M BASEPRI zero immediates (#564)
Use explicit immediate syntax when clearing BASEPRI in GNU and AC6 Cortex-M scheduler assembly.
Co-authored-by: Codex <[email protected]>
Diffstat (limited to 'ports/cortex_m3/ac6')
| -rw-r--r-- | ports/cortex_m3/ac6/src/tx_thread_schedule.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/ports/cortex_m3/ac6/src/tx_thread_schedule.S b/ports/cortex_m3/ac6/src/tx_thread_schedule.S index 98d21f36..f1a6deed 100644 --- a/ports/cortex_m3/ac6/src/tx_thread_schedule.S +++ b/ports/cortex_m3/ac6/src/tx_thread_schedule.S @@ -8,6 +8,7 @@ * * SPDX-License-Identifier: MIT **************************************************************************/ +// Some portions generated by Codex (GPT-5). /**************************************************************************/ @@ -139,7 +140,7 @@ __tx_ts_handler: BL _tx_execution_thread_exit // Call the thread exit function POP {r0, lr} // Recover LR #ifdef TX_PORT_USE_BASEPRI - MOV r0, 0 // Disable BASEPRI masking (enable interrupts) + MOV r0, #0 // Disable BASEPRI masking (enable interrupts) MSR BASEPRI, r0 #else CPSIE i // Enable interrupts |