diff options
| author | hefanbo <[email protected]> | 2026-06-25 00:16:51 +0800 |
|---|---|---|
| committer | GitHub <[email protected]> | 2026-06-24 12:16:51 -0400 |
| commit | d9e7dfea89046c901100b42afa230b37823718f7 (patch) | |
| tree | dc41cc1734b73509859efdad6d9ef0d1a8280b27 /ports_arch/ARMv8-M/threadx/gnu | |
| parent | 2dfe5acfb0927c5b32d4810dbdbc18aeae5860a1 (diff) | |
Add SysTick counter reset in Cortex-M ports (#561)
* Add SysTick counter reset in Cortex-M ports
The SysTick counter value (SYST_CVR @0xE000E018) is indeterminate after
reset. Without clearing it prior to enabling the counter, the first tick
interval becomes unpredictable.
* Fixed missing comment and added generated-by header in Cortex-M0/AC6 port
Added the missing inline comment on the LDR r1, =0 instruction
(Build value for SysTick reset) and the required AI-generated
attribution comment under the copyright header.
---------
Co-authored-by: Frédéric Desbiens <[email protected]>
Co-authored-by: Copilot <[email protected]>
Diffstat (limited to 'ports_arch/ARMv8-M/threadx/gnu')
| -rw-r--r-- | ports_arch/ARMv8-M/threadx/gnu/src/tx_initialize_low_level.S | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/ports_arch/ARMv8-M/threadx/gnu/src/tx_initialize_low_level.S b/ports_arch/ARMv8-M/threadx/gnu/src/tx_initialize_low_level.S index 842dcdf4..f0b326a1 100644 --- a/ports_arch/ARMv8-M/threadx/gnu/src/tx_initialize_low_level.S +++ b/ports_arch/ARMv8-M/threadx/gnu/src/tx_initialize_low_level.S @@ -106,6 +106,9 @@ _tx_initialize_low_level: /* Configure SysTick. */ MOV r0, #0xE000E000 // Build address of NVIC registers + MOV r1, #0 // Build value for SysTick reset + STR r1, [r0, #0x10] // Reset SysTick Control + STR r1, [r0, #0x18] // Reset SysTick Counter Value LDR r1, =SYSTICK_CYCLES STR r1, [r0, #0x14] // Setup SysTick Reload Value MOV r1, #0x7 // Build SysTick Control Enable Value |