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2026-05-27Refactored, consolidated, and cleaned up RV32/RV64 ports (#536)Frédéric Desbiens
risc-v: refactor, consolidate, and fix RV32/RV64 ports Consolidates the RISC-V 32-bit and 64-bit GNU/Clang port sources, fixes two pre-existing assembly bugs discovered during testing, and hardens the build infrastructure for both the regression suite and the CORE-V MCU example. --- Port consolidation (RV32 GNU + Clang) --- - Delete ports/risc-v32/clang/src/ (8 .S files had no Clang-specific directives; diverged from GNU only due to missing bug fixes). The Clang port CMakeLists.txt now compiles from ../gnu/src/. - Change .global -> .weak for _tx_initialize_low_level in gnu/src/ to allow BSP-level override without a linker conflict (adopted from Clang port). - Create ports/risc-v32/common/tx_port_riscv32_common.h with all definitions shared between GNU and Clang ports. Reduce both tx_port.h files to thin wrappers. - Add a prominent comment in risc-v64/gnu/inc/tx_port.h explaining why LONG/ULONG are intentionally 32-bit on RV64 (ThreadX ABI requirement, mirrors win64/MSVC LLP64). --- Shared CMake helper --- - Add cmake/threadx_riscv_port.cmake with threadx_add_riscv_port(). All three port CMakeLists.txt files are reduced to ~8 lines each. Include path is relative to CMAKE_CURRENT_LIST_DIR so the helper works whether ports are built standalone or as a subdirectory of the test framework. --- Shared example-build drivers --- - Create canonical driver files under ports/risc-v_common/: inc/csr.h (uintptr_t-based; portable RV32 + RV64) example_build/plic/ (plic.c, plic.h) example_build/uart/ (uart_qemu_ns16550.c/h; static inline putc_nolock) example_build/trap/ (trap_qemu.c; XLEN-portable mcause constants) - Replace per-example copies with symlinks in all qemu_virt and cva6_ariane example directories. - Fix OS_IS_INTERRUPT typo (was OS_IS_INTERUPT) in shared trap_qemu.c. - Gate print_hex() behind TX_RISCV_TRAP_DEBUG. --- Bug fixes in RV32 assembly --- tx_thread_schedule.S: - Solicited-return FP path: reload t0 from the mepc stack slot before csrw mepc, t0. After the FP restore block, t0 held the fcsr value (0 for new threads), which caused mepc = 0 and an immediate instruction-address fault on the first context switch. - Same path: reload t0 from the mstatus stack slot before csrw mstatus, t0 to avoid writing the stale fcsr value into mstatus. tx_thread_system_return.S: - FP callee-saved registers were saved unconditionally before the mstatus.FS check, causing an illegal instruction trap (mcause=0x2) when a thread with FS=Off (lazy FPU, thread has never used FP) voluntarily yielded. - Apply the same FS guard pattern used in tx_thread_context_save.S: read mstatus first, isolate FS[1:0], and skip fsw/fsd if FS == Off. Both bugs were pre-existing on origin/dev and are unrelated to the consolidation changes. --- RV64 64-bit pointer compatibility --- - Add TX_TIMER_INTERNAL_EXTENSION, TX_THREAD_CREATE_TIMEOUT_SETUP, and TX_THREAD_TIMEOUT_POINTER_SETUP to risc-v64/gnu/inc/tx_port.h to store the thread timeout pointer in a VOID * extension field rather than truncating it into a 32-bit ULONG. Mirrors the win64 port pattern. - Define TX_TIMER_EXTENSION_PTR_DEFINED as a portable sentinel. - Update threadx_thread_basic_execution_test.c guard from #if defined(_WIN64) to #if defined(_WIN64) || defined(TX_TIMER_EXTENSION_PTR_DEFINED). - Disable -Wconversion for the RV64 test build: ULONG = unsigned int (32-bit) is intentional for ThreadX ABI but triggers spurious warnings when sizeof() (8 bytes on RV64) appears in arithmetic with ULONG in common/src/. --- Regression suite cmake fixes --- test/tx/cmake/riscv/regression/CMakeLists.txt: - Build testcontrol_weak_defaults.c as a separate OBJECT library and include it in every test executable via $<TARGET_OBJECTS:>. GNU ld does not extract objects from a static archive to satisfy weak symbols, so bundling it in test_utility was insufficient for the standalone threadx_initialize_kernel_setup_test. test/tx/cmake/regression/CMakeLists.txt, test/smp/cmake/regression/CMakeLists.txt: - Same fix applied to the Linux and SMP regression builds. The symbols abort_all_threads_suspended_on_mutex, suspend_lowest_priority, and abort_and_resume_byte_allocating_thread were introduced by the win64 merge and left the standalone test unlinkable. --- CORE-V MCU toolchain and build fixes --- cmake/riscv64-gcc-rv32imc.cmake: - Resolve riscv64-unknown-elf-gcc via PATH so the riscv-collab toolchain in /opt/riscv/bin is preferred when it appears first. ports/risc-v32/gnu/example_build/core_v_mcu/bsp/clz.c (new): - The riscv-collab toolchain is built without rv32 multilib, so its libgcc does not define __clzsi2 (the helper emitted for __builtin_clz() in fll.c). Add a weak __clzsi2 fallback so the build is self-contained with any riscv64-unknown-elf toolchain. The weak attribute yields to a libgcc-provided strong symbol when the Ubuntu multilib package is used. core_v_mcu/CMakeLists.txt: - Add bsp/clz.c to sources. - Reference CMAKE_TOOLCHAIN_FILE via message(STATUS) to suppress the false- positive "Manually-specified variables were not used by the project" CMake warning and to show the active toolchain at configure time. --- Housekeeping --- - Rename azrtos_test_* -> threadx_test_* (eliminate Azure RTOS branding). - Add RV64 QEMU CI test script: ports/risc-v64/gnu/example_build/qemu_virt/test/ threadx_test_tx_gnu_riscv64_qemu.py - Normalize entry.s -> entry.S in all 4 example directories. - .gitignore: exclude build_m7/ and .codex local artifacts. - CI: comment out the riscv regression workflow job and remove it from the deploy job's needs list (preserved in-place for easy re-enablement). --- Verified --- - 95/95 RV32 regression tests pass (QEMU virt) - 95/95 RV64 regression tests pass (QEMU virt) - All 5 Linux build configurations build cleanly (default_build_coverage, disable_notify_callbacks_build, stack_checking_build, stack_checking_rand_fill_build, trace_build) - CORE-V MCU example_build links cleanly with /opt/riscv toolchain Co-authored-by: Copilot [email protected]
2026-05-19Add QEMU based CI regression test infra for RV32 and RV64 (#526)Akif Ejaz
Added a QEMU virt-machine BSP and CTest infrastructure to run the ThreadX regression suite on both RISC-V 32-bit and 64-bit targets in CI. New components: - BSP (entry, trap, PLIC, CLINT timer, UART, linker script) targeting QEMU virt machine for RV32 and RV64 - CMake build system with Ninja, supporting multiple build configs - CI scripts: install_riscv.sh (toolchain + QEMU), build_tx_riscv.sh, test_tx_riscv.sh - GitHub Actions workflow job for RISC-V regression gating Port fixes: - RV32 tx_thread_context_restore.S: set MPIE alongside MPP (0x1800 → 0x1880) so mret re-enables interrupts - RV32/RV64 tx_port.h: add TX_REGRESSION_TEST extension macros needed by the test harness - RV32/RV64 example_build scripts: add compile and QEMU launch steps Regression test portability fixes: - Block memory tests: increase pool sizes (320 → 340) to accommodate larger RISC-V block-header alignment - Byte memory test: replace hardcoded offsets with BYTE_POOL_OVERHEAD macro for portable pool-size computation - Event flag timeout test: make counter tolerance unconditional, removing linux-only guard Signed-off-by: Akif Ejaz <[email protected]>
2026-03-05Updated copyright headers and version number constants (#509)Frédéric Desbiens
* Updated version number constants * Removed revision history from all files * Added Eclipse ThreadX contributors' copyright header
2025-07-29Fixed code coverage report download step in deploy_code_coverage.Frédéric Desbiens
2025-07-29Added condition to "Coverage Report Name". Corrected formatting.Frédéric Desbiens
2025-07-29Fixed code coverage artefacts uploadFrédéric Desbiens
2025-07-17Updated all actions to their latest release.Frédéric Desbiens
Signed-off-by: Frédéric Desbiens <[email protected]>
2025-07-17Added workflow permissions.Frédéric Desbiens
Signed-off-by: Frédéric Desbiens <[email protected]>
2025-02-27Merge pull request #387 from netomi/patch-1Frédéric Desbiens
Add new label for all created issues, enforce the use of issue templates
2025-02-13Upgrading upload-artifact version to 4.6.0.Frédéric Desbiens
2024-09-03Bump actions/download-artifact from 3 to 4.1.7 in /.github/workflowsdependabot[bot]
Bumps [actions/download-artifact](https://github.com/actions/download-artifact) from 3 to 4.1.7. - [Release notes](https://github.com/actions/download-artifact/releases) - [Commits](https://github.com/actions/download-artifact/compare/v3...v4.1.7) --- updated-dependencies: - dependency-name: actions/download-artifact dependency-type: direct:production ... Signed-off-by: dependabot[bot] <[email protected]>
2024-05-27Add new labelThomas Neidhart
2024-05-27Add new labelThomas Neidhart
2024-05-27Add new labelThomas Neidhart
2024-05-27Add new labelThomas Neidhart
2024-05-27Create config.ymlThomas Neidhart
2024-03-10Update hardware-or-architecture-support.mdStefan Wick
2024-03-10Update feature_request.mdStefan Wick
2024-03-10Update bug_report.mdStefan Wick
2024-01-18Delete .github/workflows/codeql.ymlEric Wolz
2024-01-11Update CODEOWNERSEric Wolz
2023-12-22Add sudo to move coverage folder created by root user.Wenhui Xie
2023-11-30Correct condition syntax in "Prepare Coverage GitHub Pages" step.l (#329)Ting Zhu
* Correct syntax. * Update regression_template.yml * Update regression_template.yml
2023-11-29Add additional condition for "Prepare Coverage GitHub Pages" step.Ting Zhu
2023-11-27Added input skip_coverage and coverage_name for customiziing. (#327)CQ Xiao
* Update regression_template.yml * Update regression_template.yml * Update regression_template.yml * Update regression_template.yml * Update regression_template.yml * Update regression_template.yml Coverage name of all -> default_build_coverage * Update regression_template.yml * Update regression_template.yml Check inputs.skip_coverage to do steps. * Update regression_template.yml * Update regression_template.yml * Update regression_template.yml * Update regression_template.yml Enable coverage upload when manually triggered. * Update regression_template.yml * Update regression_template.yml * Update regression_template.yml * Update .github/workflows/regression_template.yml Fix comments. Co-authored-by: TiejunZhou <[email protected]> --------- Co-authored-by: TiejunZhou <[email protected]>
2023-11-24Fix action to run on fork repo for cortex-m builds and unify them (#326)TiejunZhou
2023-11-24Restrict deploy run condition (#325)TiejunZhou
* Restrict deploy run condition * Fail the job for testing purpose * Revert "Fail the job for testing purpose" This reverts commit 6ae18cafe285f07443137b85493f69f95e738c3d.
2023-11-24Split artifacts for multiple jobs (#324)TiejunZhou
* Test multiple code coverage pages * Add affix to artifacts * Test uploading code coverage as artifact * Deploy GitHub pages at last for multiple jobs * Test using unified upload pages * Disable test cases to accelerate experiment * Fix escape character $ * Revert "Test using unified upload pages" This reverts commit 3668d9f67253651c8cea38e9aba639dff081168d. * Set destination for downloaded artifact * Use a different artifact name * Fix escape value * Revert "Disable test cases to accelerate experiment" This reverts commit 8468f17d0298a483692ab613524bc6ab5443a67a. * Override duplicated github-pages in artifact * Revert "Override duplicated github-pages in artifact" This reverts commit 17a83aa97df4233417e20d31d36aa61e976dbebf. * Delete Duplicate Code Coverage Artifact
2023-11-23Convert ADO pipelines to GitHub actions (#321)TiejunZhou
* Convert ADO pipelines to GitHub actions * Remove version in uses as not valid for local workflows * Fix cmake path and add deploy url affix * Add SMP build job * Fix code coverage URL * Add affix to titles of steps * Remove ADO pipelines * Add affix to titles of code coverage * separate PR results for multiple jobs * Revert "separate PR results for multiple jobs" This reverts commit 6da13540fd460b6571c6bfe0196abe52e4b1cccf. * separate PR results for multiple jobs
2023-07-13Allow manual trigger for CodeQL action (#286)TiejunZhou
2023-07-13Enable CodeQL (#285)TiejunZhou
* Enable CodeQL * Build cortex-m0 in CodeQL * Trigger the CodeQL by cron only
2023-06-21Unify ThreadX and SMP for ARMv8-A. (#275)TiejunZhou
* Unify ThreadX and SMP for ARMv8-A. * Fix path in pipeline to check ports arch. * Add ignore folders for ARM DS * Generate ThreadX and SMP ports for ARMv8-A. * Ignore untracked files for ports_arch check. * Use arch instead of CPU to simplify the project management.
2023-06-06Add a pull request template (#272)TiejunZhou
2023-04-19Release ARMv7-A architecture ports and add tx_user.h to GNU port assembly ↵TiejunZhou
files (#250) * Release ARMv7-A architecture ports * Add tx_user.h to GNU port assembly files * Update GitHub action to perform check for Cortex-A ports
2023-04-18Release ARMv7-M and ARMv8-M architecture ports (#249)TiejunZhou
* Release ARMv7-M and ARMv8-M architecture ports * Add a pipeline to check ports_arch
2023-04-17Filter the path for PR trigger and add codeowners (#248)TiejunZhou
* Filter the path for PR trigger * Add codeowners * Fix syntax in pipeline
2022-11-15Update issue templatesLiya Du
2022-11-15Update issue templatesLiya Du
2022-11-15Update issue templatesLiya Du
2020-12-09update workflowsScott Larson
2020-12-07Update ci_cortex_m0.ymlScott Larson
2020-12-07Update ci_cortex_m0.ymlScott Larson
2020-05-15Cache update every 3 days is betterPProvost
2020-05-14Added cortex m0 and m3 to cloud CIPProvost
2020-05-14Updated GH actions to cache arm-none-eabiPProvost
2020-05-14Still working on path issuesPProvost
2020-05-14Add cached folder to pathPProvost
2020-05-14Typo in cache updaterPProvost
2020-05-14Scheduled cache updaterPProvost
2020-05-14Caching arm compiler for buildsPProvost
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-13 14:14:25 +0000