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Age	Commit message (Collapse)	Author
2026-09-18	Stopped tx_thread_relinquish discarding the rebalance it requests	Frédéric Desbiens
	_tx_thread_relinquish walks the ready list at the relinquishing thread's priority for a thread to hand its core to. When the walk reaches one it cannot place, carrying preemption-threshold or excluded from that thread's mapped core, it sets the rebalance flag and breaks. That exit falls into the block concluding no other thread is ready, which is not what the walk found, and that block sets the finished flag. The rebalance at the end of the function is guarded on that flag, so it never runs. Every rebalance requested from inside the walk is discarded, because that exit always reaches the block first. A ready thread behind the obstacle then never reaches a core while the others hold them and relinquish to each other. The tick keeps arriving, so it is a livelock rather than a deadlock. The early return now applies only when no rebalance was requested, which lets control reach the rebalance path the other three request sites already use. threadx_smp_relinquish_rebalance_test fills the cores with threads of one priority relinquishing in a loop, places a thread excluded from every core behind them and a runnable thread behind that, and fails if the runnable one has not run within 100 ticks. It fails 3 of 3 before this change and passes 5 of 5 after. Instrumenting a passing run of threadx_thread_relinquish_test counted 12 rebalance requests from the walk against 4 performed, all 4 from sites outside it. 109/109 in all eight configurations, twice from clean. Assisted-by: Claude Code (Opus 5) <[email protected]>
2024-01-30	Update version id string.	Bo Chen (from Dev Box)

2024-01-29	Update copyright.	Bo Chen (from Dev Box)

2023-10-23	Update release version to 6.3.0 and date to 10-31-2023 (#308)v6.3.0_rel	TiejunZhou

2023-05-18	Fix MISRA issues for ThreadX SMP (#263)	TiejunZhou
	* Fixed MISRA2012 rule 10.4_a The operands `pool_ptr->tx_byte_pool_fragments' and `2' have essential type categories unsigned 32-bit int and signed 8-bit int, which do not match. * Fixed MISRA2012 rule 10.4_a The operands `next_priority' and `TX_MAX_PRIORITIES' have essential type categories unsigned 32-bit int and signed 8-bit int, which do not match. * Fixed MISRA2012 rule 8.3 Declaration/definition of `_tx_thread_smp_preemptable_threads_get' is inconsistent with previous declaration/definition in types and/or type qualifiers
2023-05-12	Add random number stack filling option. (#257)	Xiuwen Cai
	Co-authored-by: TiejunZhou <[email protected]>
2023-03-08	Release 6.2.1 on 08 Mar 2023. Expand to see details.v6.2.1_rel	Tiejun Zhou
	cee19603d Include tx_user.h conditionally. e40e08007 Update owners d69641273 Update release date and version 394aee52f Add tx_user.h to GNU port assembly files 5cca2ddd0 RISC-V 64 bit port for Microchip e0f2c373c Link Winmm.lib that required by the high-resolution timer. 6af472a68 Update Win32 port with high resolution timer. aea7b556a Add DMB ISH barrier inst in ARMv8-A SMP scheduler 19091a262 Add .section .preamble to m3 m4 m7 module ports ced60e1b7 Add missing parenthesis in ports assembly file 309dc77ca Modules Cortex-A7 IAR new port c752a4063 Modules Cortex-A7 GNU new port dc224b90f Fix race condition in tx_thread_wait_abort and update regression test 6e261f5b7 create threadx cmsis-pack
2022-10-26	Release 6.2.0v6.2.0_rel	Tiejun Zhou

2022-07-26	Release 6.1.12v6.1.12_rel	Yuxin Zhou

2022-04-20	Release 6.1.11	Yuxin Zhou

2021-10-14	Release 6.1.9	Yuxin Zhou

2021-07-28	Release 6.1.8v6.1.8_rel	Yuxin Zhou

2021-06-02	Release 6.1.7	Bo Chen

2021-01-08	update to v6.1.3	Scott Larson

2020-10-16	6.1.1 patch: add stack sealing to armv8-m, fix misra warning, fix stack ↵v6.1.1_rel	Scott Larson
	check link error
2020-09-30	6.1 minor release	Scott Larson

2020-08-07	add SMP, Modules, and more processor/tools releases	Scott Larson