| Age | Commit message (Collapse) | Author |
|---|
|
|
|
* Updated version number constants
* Removed revision history from all files
* Added Eclipse ThreadX contributors' copyright header
|
|
Added a RV32 Clang port
|
|
Added support for the XuanTie E906 CPU.
|
|
Fixed VFP build failure in Cortex-A tx_thread_schedule.S
|
|
|
|
Signed-off-by: Akif Ejaz <[email protected]>
|
|
- removed the REGBYTES, STORE/LOAD macros
Signed-off-by: Akif Ejaz <[email protected]>
|
|
|
|
|
|
Added a RISC-V32 QEMU-virt example
|
|
Removed dead code from riscv64/gnu port
|
|
- Place the E906 implementation in the ports/risc-v32/gnu directory;
- Remove code unrelated to the xuantie_smartl_fpga demo;
|
|
This update adapts the ThreadX low-level kernel routines
for RV32, including:
- startup and initialization logic
- context save/restore implementations
- interrupt control and scheduler entry
- thread stack build and system return paths
- timer interrupt handling
- made it complient as per new risc-v64/gnu
& threadx style
- added reademe for risc-v32/gnu port
These changes provide full low-level support needed to run
ThreadX on RISC-V32 targets.
Signed-off-by: Akif Ejaz <[email protected]>
|
|
Added a RISC-V32 architecture port layer for GCC.
|
|
This update adapts the ThreadX low-level kernel routines
for RV32, including:
- startup and initialization logic
- context save/restore implementations
- interrupt control and scheduler entry
- thread stack build and system return paths
- timer interrupt handling
- made it complient as per new risc-v64/gnu
& threadx style
- added reademe for risc-v32/gnu port
These changes provide full low-level support needed to run
ThreadX on RISC-V32 targets.
Signed-off-by: Akif Ejaz <[email protected]>
|
|
Signed-off-by: Akif Ejaz <[email protected]>
|
|
- add ThreadX porting codes for XuanTie E906.
- add example for XuanTie E906 running on QEMU smartl.
|
|
Added missing ULONG64 definition for RX ports needed by USBX and NetX Duo
|
|
Improved RV64/GNU port robustness, portability, and CSR handling
|
|
- removed the trailing whitespaces
Signed-off-by: Akif Ejaz <[email protected]>
|
|
Signed-off-by: Akif Ejaz <[email protected]>
|
|
- removed tx_port.h dependency from .S files
- replaced tx_timer_interrupt.c with tx_timer_interrupt.S
- made some cleanups, formatting to better readability
- removed macros (LOAD/STORE/REGBYTES)
changed register nomenclature to use RISC-V ABI
names (ra, sp, t0, etc.)
- added readme_threadx.txt
Signed-off-by: Akif Ejaz <[email protected]>
|
|
|
|
When TX_ENABLE_VFP_SUPPORT is defined, the build fails due to missing
IRQ_MASK and FIQ_MASK symbols in the restore logic.
This adds the local definitions (0x80 and 0x40) to tx_thread_schedule.S
to match tx_thread_interrupt_restore.S, enabling successful compilation
on GNU and AC6 Cortex-A ports.
|
|
This commit introduces the complete example build environment for the
RISC-V32/GNU port targeting the QEMU virt machine. It includes basic BSP
components, startup code, drivers, linker script, and a minimal ThreadX
demo application.
Signed-off-by: Akif Ejaz <[email protected]>
|
|
Fix IAR include typo.
|
|
|
|
|
|
|
|
riscv : add riscv qemu virt support and fix fs bit error in mstatus
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
* Add error handling in lock initialization.
* Update release data and version.
|
|
* Update version number in API header
* Update release date and version
|
|
* Added thumb mode support for threadX GNU ports on armv7a platforms.
https://msazure.visualstudio.com/One/_workitems/edit/26105175/
* move the swi interrupt to tx_initialize_low_level.S.
* update the test log.
|
|
|
|
tool in cortex-A5 GNU port (#306)
https://msazure.visualstudio.com/One/_workitems/edit/25153813/
|
|
tool in cortex-A9 GNU port. (#303)
https://msazure.visualstudio.com/One/_workitems/edit/25153785/
|
|
tool in cortex-A8 GNU port. (#302)
https://msazure.visualstudio.com/One/_workitems/edit/25139203/
|
|
* Fixed the issue of the data/bss section cannot be read from ARM FVP debug tool in cortex-A7 GNU port.
https://msazure.visualstudio.com/One/_workitems/edit/24597276/
* remove untracked files.
|
|
* Unify ThreadX and SMP for ARMv8-A.
* Fix path in pipeline to check ports arch.
* Add ignore folders for ARM DS
* Generate ThreadX and SMP ports for ARMv8-A.
* Ignore untracked files for ports_arch check.
* Use arch instead of CPU to simplify the project management.
|
|
Problem with first system tick was detected, it needs much more time for the first tick as it's defined. The reason for this behavior is incorrect initialization of the SysTick timer in the port file for the Cortex-M0. It doesn't reset the SysTick Current Value Register despite the fact that its value is not initialized at startup (see https://developer.arm.com/documentation/dui0552/a/cortex-m3-peripherals/system-timer--systick). So if we have 0xFFFFFF (this register has 24-bit), it means we will get about 256*256*256 / 48000000 for the tact frequency of 48MHz to reach the zero, that makes 350ms delay at startup.
|
|
|
